verilog-apple-one/rtl/uart
2018-01-31 00:48:47 +11:00
..
async_tx_rx.v Made core neater and trying to get naming better 2018-01-29 21:00:38 +11:00
uart.v Initial VGA working with the apple one output. YAY! 2018-01-31 00:48:47 +11:00