mirror of https://github.com/stid/woz64.git
151 lines
3.7 KiB
NASM
151 lines
3.7 KiB
NASM
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#importonce
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#import "../core/module.asm"
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// ========================================================
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// ////// MACROS //////////////////////////////////////////
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// ========================================================
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.macro inc16(addreess) {
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inc addreess
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bne !+
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inc addreess +1
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!:
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}
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.macro dec16(addreess) {
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lda addreess
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bne !+
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dec addreess+1
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!: dec addreess
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}
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.macro asl16(valueA, resultAddress) {
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.if (valueA > resultAddress) {
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clc
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lda valueA
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asl
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sta resultAddress
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lda valueA+1
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rol
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sta resultAddress+1
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} else {
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asl valueA+0
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rol valueA+1
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}
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}
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.macro add16(valueA, valueB, resultAddress) {
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.if (valueA != valueB) {
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clc
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lda valueA
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adc valueB
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sta resultAddress
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lda valueA+1
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adc valueB+1
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sta resultAddress+1
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}
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else {
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.break
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asl16(valueA, resultAddress)
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}
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}
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.macro sub16(valueA, valueB, resultAddress) {
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sec
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lda valueA
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sbc valueB
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sta resultAddress
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lda valueA+1
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sbc valueB+1
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sta resultAddress+1
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}
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.filenamespace Math
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* = * "Math Lib"
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// ========================================================
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// ////// METHODS /////////////////////////////////////////
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// ========================================================
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// --------------------------------------------------------
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// init -
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// Module Init.
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// --------------------------------------------------------
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init: {
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rts
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}
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// --------------------------------------------------------
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// toDebug -
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// Print debug info.
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// --------------------------------------------------------
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toDebug: {
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ModuleToDebug(module_type, module_name, version)
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rts
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}
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// --------------------------------------------------------
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// multiply -
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// 8 Bit in to 16 Bit out Multiplier
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//
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// Parameters:
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// MemMap.MATH.factor1 = 8 Bit Factor 1
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// MemMap.MATH.factor2 = 8 Bit Factor 2
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//
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// Result
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// MemMap.MATH.result = 16 bit result
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// --------------------------------------------------------
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multiply: {
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sei
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pha
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txa
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pha
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lda #$00
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ldx #$08
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clc
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m0: bcc m1
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clc
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adc MemMap.MATH.factor2
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m1: ror
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ror MemMap.MATH.factor1
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dex
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bpl m0
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ldx MemMap.MATH.factor1
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sta MemMap.MATH.result
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stx MemMap.MATH.result+1
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pla
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tax
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pla
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cli
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rts
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}
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// ========================================================
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// ////// DATA ////////////////////////////////////////////
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// ========================================================
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* = * "Math Lib Data"
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module_type: .byte Module.TYPES.LIB
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version: .byte 1, 1, 0
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.encoding "screencode_mixed"
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module_name:
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.text "math"
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.byte 0
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#import "../hardware/mem_map.asm"
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