define constant values

This commit is contained in:
nino-porcino 2021-12-08 22:00:30 +01:00
parent 8023097c73
commit 28a911c706
3 changed files with 19 additions and 13 deletions

View File

@ -1,11 +1,11 @@
// TODO make it static once KickC bug is fixed // TODO make it static once KickC bug is fixed
byte blank = 0; byte blank = BLANK_OFF;
void flip_blank() { void flip_blank() {
blank ^= 1; blank ^= 1;
if(blank) woz_puts("NORMAL\r"); if(blank == BLANK_OFF) woz_puts("NORMAL\r");
else woz_puts("BLANK\r"); else woz_puts("BLANK\r");
// write "blank" bit // write "blank" bit
tms_blank(blank); tms_blank(blank);

View File

@ -13,7 +13,7 @@ void demo_interrupt() {
install_interrupt(); install_interrupt();
// enables interrupts on the TMS9918 // enables interrupts on the TMS9918
tms_interrupt(1); tms_set_interrupt_bit(INTERRUPT_ENABLED);
woz_puts("INTERRUPT INSTALLED\r"); woz_puts("INTERRUPT INSTALLED\r");
woz_puts("0 TURNS OFF\r"); woz_puts("0 TURNS OFF\r");
@ -21,11 +21,10 @@ void demo_interrupt() {
woz_puts("E EXIT TO MAIN MENU\r"); woz_puts("E EXIT TO MAIN MENU\r");
for(;;) { for(;;) {
if(keypressed()) {
if(woz_iskeypressed()) { if(woz_iskeypressed()) {
byte k = woz_getkey(); byte k = woz_getkey();
if(k=='1') { tms_interrupt(1); woz_puts("INT ENABLED\r"); } if(k=='1') { tms_set_interrupt_bit(INTERRUPT_ENABLED); woz_puts("INT ENABLED\r"); }
else if(k=='0') { tms_interrupt(0); woz_puts("INT DISABLED\r"); } else if(k=='0') { tms_set_interrupt_bit(INTERRUPT_DISABLED); woz_puts("INT DISABLED\r"); }
else if(k=='E') break; else if(k=='E') break;
} }
@ -39,7 +38,7 @@ void demo_interrupt() {
} }
// disables interrupts on the TMS9918 // disables interrupts on the TMS9918
tms_interrupt(0); tms_set_interrupt_bit(INTERRUPT_DISABLED);
woz_puts("INTERRUPT STOPPED\r"); woz_puts("INTERRUPT STOPPED\r");
} }

View File

@ -14,7 +14,7 @@ const byte HIADDRESS_MASK = 0b00111111; // bit mask for the high byte of the a
const byte WRITE_TO_REG = 0b10000000; // write to register command const byte WRITE_TO_REG = 0b10000000; // write to register command
const byte REGNUM_MASK = 0b00000111; // bit mask for register number (0-7) const byte REGNUM_MASK = 0b00000111; // bit mask for register number (0-7)
// register 1 masks // register 0 masks
const byte REG0_M3_MASK = 0b00000010; const byte REG0_M3_MASK = 0b00000010;
const byte REG0_EXTVID_MASK = 0b00000001; const byte REG0_EXTVID_MASK = 0b00000001;
@ -45,6 +45,7 @@ const byte COLOR_MAGENTA = 0xD;
const byte COLOR_GRAY = 0xE; const byte COLOR_GRAY = 0xE;
const byte COLOR_WHITE = 0xF; const byte COLOR_WHITE = 0xF;
// macro for combining foreground and background into a single byte value
#define COLOR_BYTE(f,b) (((f)<<4)|(b)) #define COLOR_BYTE(f,b) (((f)<<4)|(b))
// status register bits (read only) // status register bits (read only)
@ -93,21 +94,27 @@ void TMS_INIT(byte *table) {
} }
} }
// turn on off interrupt enable bit on register 1 const byte INTERRUPT_ENABLED = 1;
void tms_interrupt(byte val) { const byte INTERRUPT_DISABLED = 0;
// sets the interrupt enable bit on register 1
void tms_set_interrupt_bit(byte val) {
byte regvalue = TMS_REGS_LATCH[1] & (~REG1_IE_MASK); byte regvalue = TMS_REGS_LATCH[1] & (~REG1_IE_MASK);
if(val) regvalue |= REG1_IE_MASK; if(val) regvalue |= REG1_IE_MASK;
TMS_WRITE_REG(1, regvalue); TMS_WRITE_REG(1, regvalue);
} }
// turn on off blank bit on register 1 const byte BLANK_ON = 0;
const byte BLANK_OFF = 1;
// sets the blank bit on register 1
void tms_blank(byte val) { void tms_blank(byte val) {
byte regvalue = TMS_REGS_LATCH[1] & (~REG1_BLANK_MASK); byte regvalue = TMS_REGS_LATCH[1] & (~REG1_BLANK_MASK);
if(val) regvalue |= REG1_BLANK_MASK; if(val) regvalue |= REG1_BLANK_MASK;
TMS_WRITE_REG(1, regvalue); TMS_WRITE_REG(1, regvalue);
} }
// turn on off external video bit on register 0 // sets the external video input bit on register 0
void tms_external_video(byte val) { void tms_external_video(byte val) {
byte regvalue = TMS_REGS_LATCH[0] & (~REG0_EXTVID_MASK); byte regvalue = TMS_REGS_LATCH[0] & (~REG0_EXTVID_MASK);
if(val) regvalue |= REG0_EXTVID_MASK; if(val) regvalue |= REG0_EXTVID_MASK;