diff --git a/Hardware/Apple2IORPi-cache.lib b/Hardware/Apple2IORPi-cache.lib index ab68713..3236702 100644 --- a/Hardware/Apple2IORPi-cache.lib +++ b/Hardware/Apple2IORPi-cache.lib @@ -436,6 +436,24 @@ X GND 9 -300 -1300 100 U 50 50 1 1 W ENDDRAW ENDDEF # +# Device_C +# +DEF Device_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "Device_C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# # Device_R # DEF Device_R R 0 0 N Y 1 F N diff --git a/Hardware/Apple2IORPi.jpg b/Hardware/Apple2IORPi.jpg new file mode 100644 index 0000000..4b2cc55 Binary files /dev/null and b/Hardware/Apple2IORPi.jpg differ diff --git a/Hardware/Apple2IORPi.kicad_pcb b/Hardware/Apple2IORPi.kicad_pcb index 02c8ecb..12f8aab 100644 --- a/Hardware/Apple2IORPi.kicad_pcb +++ b/Hardware/Apple2IORPi.kicad_pcb @@ -1 +1,1882 @@ -(kicad_pcb (version 4) (host kicad "dummy file") ) +(kicad_pcb (version 20171130) (host pcbnew 5.1.5+dfsg1-2build2) + + (general + (thickness 1.6) + (drawings 8) + (tracks 0) + (zones 0) + (modules 30) + (nets 96) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user hide) + (33 F.Adhes user hide) + (34 B.Paste user hide) + (35 F.Paste user hide) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user hide) + (41 Cmts.User user hide) + (42 Eco1.User user hide) + (43 Eco2.User user hide) + (44 Edge.Cuts user) + (45 Margin user hide) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.25) + (trace_clearance 0.2) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (via_size 0.8) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + 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"Net-(J0-Pad30)") + (net 38 "Net-(J0-Pad31)") + (net 39 "Net-(J0-Pad32)") + (net 40 "Net-(J0-Pad33)") + (net 41 "Net-(J0-Pad34)") + (net 42 "Net-(J0-Pad35)") + (net 43 "Net-(J0-Pad36)") + (net 44 "Net-(J0-Pad37)") + (net 45 "Net-(J0-Pad38)") + (net 46 "Net-(J0-Pad39)") + (net 47 "Net-(J0-Pad40)") + (net 48 "Net-(J0-Pad43)") + (net 49 "Net-(J0-Pad44)") + (net 50 "Net-(J0-Pad45)") + (net 51 "Net-(J0-Pad46)") + (net 52 "Net-(J0-Pad47)") + (net 53 "Net-(J0-Pad48)") + (net 54 "Net-(J0-Pad49)") + (net 55 "Net-(J0-Pad50)") + (net 56 "Net-(J1-Pad1)") + (net 57 "Net-(J1-Pad3)") + (net 58 "Net-(J1-Pad5)") + (net 59 "Net-(J1-Pad7)") + (net 60 "Net-(J1-Pad8)") + (net 61 "Net-(J1-Pad10)") + (net 62 "Net-(J1-Pad11)") + (net 63 "Net-(J1-Pad12)") + (net 64 "Net-(J1-Pad13)") + (net 65 "Net-(J1-Pad15)") + (net 66 "Net-(J1-Pad16)") + (net 67 "Net-(J1-Pad17)") + (net 68 "Net-(J1-Pad18)") + (net 69 "Net-(J1-Pad19)") + (net 70 "Net-(J1-Pad21)") + (net 71 "Net-(J1-Pad22)") + (net 72 "Net-(J1-Pad23)") + (net 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(at 23.368 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "34 -5V" (at 25.527 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "33 -12V" (at 27.813 11.176 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "32 _INH" (at 30.607 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "31 _RES" (at 33.02 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "30 _IRQ" (at 35.687 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "29 _NMI" (at 38.1 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "28 INT IN" (at 40.386 11.303 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "27 DMA IN" (at 42.799 11.43 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "26 GND" (at 45.974 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (pad 1 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 11 "Net-(J0-Pad1)")) + (pad 2 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 17 "Net-(J0-Pad2)")) + (pad 3 connect roundrect (at -8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 15 "Net-(J0-Pad3)")) + (pad 4 connect roundrect (at -6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 14 "Net-(J0-Pad4)")) + (pad 5 connect roundrect (at -3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 12 "Net-(J0-Pad5)")) + (pad 6 connect roundrect (at -1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 10 "Net-(J0-Pad6)")) + (pad 7 connect roundrect (at 1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 8 "Net-(J0-Pad7)")) + (pad 8 connect roundrect (at 3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 6 "Net-(J0-Pad8)")) + (pad 9 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 4 "Net-(J0-Pad9)")) + (pad 10 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 20 "Net-(J0-Pad10)")) + (pad 11 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 18 "Net-(J0-Pad11)")) + (pad 12 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 13 "Net-(J0-Pad12)")) + (pad 13 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 24 "Net-(J0-Pad13)")) + (pad 14 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 25 "Net-(J0-Pad14)")) + (pad 15 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 26 "Net-(J0-Pad15)")) + (pad 16 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 27 "Net-(J0-Pad16)")) + (pad 17 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 28 "Net-(J0-Pad17)")) + (pad 18 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 29 "Net-(J0-Pad18)")) + (pad 19 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 30 "Net-(J0-Pad19)")) + (pad 20 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 31 "Net-(J0-Pad20)")) + (pad 21 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 32 "Net-(J0-Pad21)")) + (pad 22 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 33 "Net-(J0-Pad22)")) + (pad 23 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 34 "Net-(J0-Pad23)")) + (pad 24 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 35 "Net-(J0-Pad24)")) + (pad 25 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25) + (net 95 "Net-(C1-Pad1)")) + (pad 26 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 94 "Net-(C1-Pad2)")) + (pad 27 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 35 "Net-(J0-Pad24)")) + (pad 28 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 34 "Net-(J0-Pad23)")) + (pad 29 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 36 "Net-(J0-Pad29)")) + (pad 30 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 37 "Net-(J0-Pad30)")) + (pad 31 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 38 "Net-(J0-Pad31)")) + (pad 32 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 39 "Net-(J0-Pad32)")) + (pad 33 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 40 "Net-(J0-Pad33)")) + (pad 34 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 41 "Net-(J0-Pad34)")) + (pad 35 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 42 "Net-(J0-Pad35)")) + (pad 36 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 43 "Net-(J0-Pad36)")) + (pad 38 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 45 "Net-(J0-Pad38)")) + (pad 37 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 44 "Net-(J0-Pad37)")) + (pad 39 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 46 "Net-(J0-Pad39)")) + (pad 40 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 47 "Net-(J0-Pad40)")) + (pad 41 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 91 "Net-(J0-Pad41)")) + (pad 42 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 87 "Net-(J0-Pad42)")) + (pad 43 connect roundrect (at 3.81 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 48 "Net-(J0-Pad43)")) + (pad 44 connect roundrect (at 1.27 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 49 "Net-(J0-Pad44)")) + (pad 45 connect roundrect (at -1.27 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 50 "Net-(J0-Pad45)")) + (pad 46 connect roundrect (at -3.81 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 51 "Net-(J0-Pad46)")) + (pad 47 connect roundrect (at -6.35 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 52 "Net-(J0-Pad47)")) + (pad 48 connect roundrect (at -8.89 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 53 "Net-(J0-Pad48)")) + (pad 49 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 54 "Net-(J0-Pad49)")) + (pad 50 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25) + (net 55 "Net-(J0-Pad50)")) + ) + + (module Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 5FB22CF2) + (at 144.78 93.98) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor") + (path /5FB87862) + (fp_text reference C6 (at 1.25 -2.55) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value C (at 1.25 2.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0) (layer F.Fab) + (effects (font (size 0.76 0.76) (thickness 0.114))) + ) + (fp_line (start 3.55 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.55) (end 3.55 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.55) (end 3.55 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.55) (end -1.05 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.27 0.795) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.27 -1.42) (end 3.27 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 0.795) (end -0.77 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end -0.77 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 1.42) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end 3.27 -1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.15 -1.3) (end -0.65 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start 3.15 1.3) (end 3.15 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 1.3) (end 3.15 1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 -1.3) (end -0.65 1.3) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.8mm_W2.6mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 5FB22CDD) + (at 129.58 93.98) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor") + (path /5FB8694D) + (fp_text reference C5 (at 1.25 -2.55) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value C (at 1.25 2.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0) (layer F.Fab) + (effects (font (size 0.76 0.76) (thickness 0.114))) + ) + (fp_line (start 3.55 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.55) (end 3.55 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.55) (end 3.55 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.55) (end -1.05 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.27 0.795) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.27 -1.42) (end 3.27 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 0.795) (end -0.77 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end -0.77 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 1.42) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end 3.27 -1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.15 -1.3) (end -0.65 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start 3.15 1.3) (end 3.15 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 1.3) (end 3.15 1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 -1.3) (end -0.65 1.3) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.8mm_W2.6mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 5FB22CC8) + (at 116.84 105.37 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor") + (path /5FB82906) + (fp_text reference C4 (at 1.25 -2.55 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value C (at 1.25 2.55 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.76 0.76) (thickness 0.114))) + ) + (fp_line (start 3.55 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.55) (end 3.55 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.55) (end 3.55 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.55) (end -1.05 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.27 0.795) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.27 -1.42) (end 3.27 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 0.795) (end -0.77 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end -0.77 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 1.42) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end 3.27 -1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.15 -1.3) (end -0.65 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start 3.15 1.3) (end 3.15 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 1.3) (end 3.15 1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 -1.3) (end -0.65 1.3) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.8mm_W2.6mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 5FB22CB3) + (at 86.36 105.41 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor") + (path /5FB81404) + (fp_text reference C3 (at 1.25 -2.55 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value C (at 1.25 2.55 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.76 0.76) (thickness 0.114))) + ) + (fp_line (start 3.55 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.55) (end 3.55 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.55) (end 3.55 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.55) (end -1.05 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.27 0.795) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.27 -1.42) (end 3.27 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 0.795) (end -0.77 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end -0.77 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 1.42) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end 3.27 -1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.15 -1.3) (end -0.65 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start 3.15 1.3) (end 3.15 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 1.3) (end 3.15 1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 -1.3) (end -0.65 1.3) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.8mm_W2.6mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 5FB22C9E) + (at 148.59 105.41 90) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor") + (path /5FB849D8) + (fp_text reference C2 (at 1.25 -2.55 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value C (at 1.25 2.55 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0 90) (layer F.Fab) + (effects (font (size 0.76 0.76) (thickness 0.114))) + ) + (fp_line (start 3.55 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.55) (end 3.55 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.55) (end 3.55 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.55) (end -1.05 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.27 0.795) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.27 -1.42) (end 3.27 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 0.795) (end -0.77 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end -0.77 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 1.42) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end 3.27 -1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.15 -1.3) (end -0.65 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start 3.15 1.3) (end 3.15 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 1.3) (end 3.15 1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 -1.3) (end -0.65 1.3) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.8mm_W2.6mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm (layer F.Cu) (tedit 5AE50EF0) (tstamp 5FB22C89) + (at 171.45 109.22) + (descr "C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf") + (tags "C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor") + (path /5FB85911) + (fp_text reference C1 (at 1.25 -2.55) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value C (at 1.25 2.55) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 1.25 0) (layer F.Fab) + (effects (font (size 0.76 0.76) (thickness 0.114))) + ) + (fp_line (start 3.55 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.55 1.55) (end 3.55 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.55) (end 3.55 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.55) (end -1.05 1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.27 0.795) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.27 -1.42) (end 3.27 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 0.795) (end -0.77 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end -0.77 -0.795) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 1.42) (end 3.27 1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.77 -1.42) (end 3.27 -1.42) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.15 -1.3) (end -0.65 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start 3.15 1.3) (end 3.15 -1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 1.3) (end 3.15 1.3) (layer F.Fab) (width 0.1)) + (fp_line (start -0.65 -1.3) (end -0.65 1.3) (layer F.Fab) (width 0.1)) + (pad 2 thru_hole circle (at 2.5 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_THT.3dshapes/C_Disc_D3.8mm_W2.6mm_P2.50mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_DIP:DIP-28_W15.24mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5FAE4127) + (at 163.83 72.39) + (descr "28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils)") + (tags "THT DIP DIL PDIP 2.54mm 15.24mm 600mil") + (path /5FA0EF8B) + (fp_text reference U1 (at 7.62 -2.33) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2764 (at 7.62 35.35) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 7.62 -1.33) (end 6.62 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.255 -1.27) (end 14.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 -1.27) (end 14.985 34.29) (layer F.Fab) (width 0.1)) + (fp_line (start 14.985 34.29) (end 0.255 34.29) (layer F.Fab) (width 0.1)) + (fp_line (start 0.255 34.29) (end 0.255 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.255 -0.27) (end 1.255 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 6.62 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 34.35) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 34.35) (end 14.08 34.35) (layer F.SilkS) (width 0.12)) + (fp_line (start 14.08 34.35) (end 14.08 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 14.08 -1.33) (end 8.62 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.05 -1.55) (end -1.05 34.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 34.55) (end 16.3 34.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.3 34.55) (end 16.3 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 16.3 -1.55) (end -1.05 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 7.62 16.51) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 15 thru_hole oval (at 15.24 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 "Net-(U0-Pad15)")) + (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 2 "Net-(U1-Pad2)")) + (pad 16 thru_hole oval (at 15.24 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 "Net-(U0-Pad14)")) + (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 4 "Net-(J0-Pad9)")) + (pad 17 thru_hole oval (at 15.24 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 "Net-(U0-Pad13)")) + (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 6 "Net-(J0-Pad8)")) + (pad 18 thru_hole oval (at 15.24 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 7 "Net-(U0-Pad12)")) + (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 8 "Net-(J0-Pad7)")) + (pad 19 thru_hole oval (at 15.24 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 9 "Net-(U0-Pad11)")) + (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 10 "Net-(J0-Pad6)")) + (pad 20 thru_hole oval (at 15.24 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 "Net-(J0-Pad1)")) + (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 12 "Net-(J0-Pad5)")) + (pad 21 thru_hole oval (at 15.24 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 13 "Net-(J0-Pad12)")) + (pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 14 "Net-(J0-Pad4)")) + (pad 22 thru_hole oval (at 15.24 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 "Net-(J0-Pad1)")) + (pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 15 "Net-(J0-Pad3)")) + (pad 23 thru_hole oval (at 15.24 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 16 "Net-(U1-Pad23)")) + (pad 10 thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 17 "Net-(J0-Pad2)")) + (pad 24 thru_hole oval (at 15.24 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 18 "Net-(J0-Pad11)")) + (pad 11 thru_hole oval (at 0 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 19 "Net-(U0-Pad18)")) + (pad 25 thru_hole oval (at 15.24 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 20 "Net-(J0-Pad10)")) + (pad 12 thru_hole oval (at 0 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 21 "Net-(U0-Pad17)")) + (pad 26 thru_hole oval (at 15.24 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 22 "Net-(U1-Pad26)")) + (pad 13 thru_hole oval (at 0 30.48) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 "Net-(U0-Pad16)")) + (pad 27 thru_hole oval (at 15.24 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 14 thru_hole oval (at 0 33.02) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 28 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-28_W15.24mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_PinSocket_2.54mm:PinSocket_2x20_P2.54mm_Vertical (layer F.Cu) (tedit 5A19A433) (tstamp 5FAE46B4) + (at 109.22 73.66 270) + (descr "Through hole straight socket strip, 2x20, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated") + (tags "Through hole socket strip THT 2x20 2.54mm double row") + (path /5FA19C2C) + (fp_text reference J1 (at -1.27 -2.77 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Raspberry_Pi_2_3 (at -1.27 51.03 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -3.81 -1.27) (end 0.27 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.27 -1.27) (end 1.27 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 -0.27) (end 1.27 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 49.53) (end -3.81 49.53) (layer F.Fab) (width 0.1)) + (fp_line (start -3.81 49.53) (end -3.81 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -3.87 -1.33) (end -1.27 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.87 -1.33) (end -3.87 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.87 49.59) (end 1.33 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.33 1.27) (end 1.33 49.59) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.27 -1.33) (end -1.27 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.33 -1.33) (end 1.33 0) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 -1.33) (end 1.33 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -4.34 -1.8) (end 1.76 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.76 -1.8) (end 1.76 50) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.76 50) (end -4.34 50) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.34 50) (end -4.34 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at -1.27 24.13) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 56 "Net-(J1-Pad1)")) + (pad 2 thru_hole oval (at -2.54 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 3 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 57 "Net-(J1-Pad3)")) + (pad 4 thru_hole oval (at -2.54 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 5 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 58 "Net-(J1-Pad5)")) + (pad 6 thru_hole oval (at -2.54 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 7 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 59 "Net-(J1-Pad7)")) + (pad 8 thru_hole oval (at -2.54 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 60 "Net-(J1-Pad8)")) + (pad 9 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 10 thru_hole oval (at -2.54 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 61 "Net-(J1-Pad10)")) + (pad 11 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 62 "Net-(J1-Pad11)")) + (pad 12 thru_hole oval (at -2.54 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 63 "Net-(J1-Pad12)")) + (pad 13 thru_hole oval (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 64 "Net-(J1-Pad13)")) + (pad 14 thru_hole oval (at -2.54 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 15 thru_hole oval (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 65 "Net-(J1-Pad15)")) + (pad 16 thru_hole oval (at -2.54 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 66 "Net-(J1-Pad16)")) + (pad 17 thru_hole oval (at 0 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 67 "Net-(J1-Pad17)")) + (pad 18 thru_hole oval (at -2.54 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 68 "Net-(J1-Pad18)")) + (pad 19 thru_hole oval (at 0 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 69 "Net-(J1-Pad19)")) + (pad 20 thru_hole oval (at -2.54 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 21 thru_hole oval (at 0 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 70 "Net-(J1-Pad21)")) + (pad 22 thru_hole oval (at -2.54 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 71 "Net-(J1-Pad22)")) + (pad 23 thru_hole oval (at 0 27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 72 "Net-(J1-Pad23)")) + (pad 24 thru_hole oval (at -2.54 27.94 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 73 "Net-(J1-Pad24)")) + (pad 25 thru_hole oval (at 0 30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 26 thru_hole oval (at -2.54 30.48 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 74 "Net-(J1-Pad26)")) + (pad 27 thru_hole oval (at 0 33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 75 "Net-(J1-Pad27)")) + (pad 28 thru_hole oval (at -2.54 33.02 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 76 "Net-(J1-Pad28)")) + (pad 29 thru_hole oval (at 0 35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 77 "Net-(J1-Pad29)")) + (pad 30 thru_hole oval (at -2.54 35.56 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 31 thru_hole oval (at 0 38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 78 "Net-(J1-Pad31)")) + (pad 32 thru_hole oval (at -2.54 38.1 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 79 "Net-(J1-Pad32)")) + (pad 33 thru_hole oval (at 0 40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 80 "Net-(J1-Pad33)")) + (pad 34 thru_hole oval (at -2.54 40.64 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 35 thru_hole oval (at 0 43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 81 "Net-(J1-Pad35)")) + (pad 36 thru_hole oval (at -2.54 43.18 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 82 "Net-(J1-Pad36)")) + (pad 37 thru_hole oval (at 0 45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 83 "Net-(J1-Pad37)")) + (pad 38 thru_hole oval (at -2.54 45.72 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 84 "Net-(J1-Pad38)")) + (pad 39 thru_hole oval (at 0 48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 40 thru_hole oval (at -2.54 48.26 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 85 "Net-(J1-Pad40)")) + (model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x20_P2.54mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE46C2) + (at 98.385001 80.645001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB0D) + (fp_text reference R0 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 79 "Net-(J1-Pad32)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE46D0) + (at 103.345001 80.645001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB13) + (fp_text reference R1 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 82 "Net-(J1-Pad36)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE46DE) + (at 93.425001 83.795001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB19) + (fp_text reference R2 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 84 "Net-(J1-Pad38)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE46EC) + (at 98.385001 83.795001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB1F) + (fp_text reference R3 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 85 "Net-(J1-Pad40)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE46FA) + (at 103.345001 83.795001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB25) + (fp_text reference R4 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 83 "Net-(J1-Pad37)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4708) + (at 73.105001 85.675001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB2B) + (fp_text reference R5 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 81 "Net-(J1-Pad35)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4716) + (at 78.065001 85.675001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB31) + (fp_text reference R6 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 80 "Net-(J1-Pad33)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4724) + (at 83.025001 85.675001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FAAFB37) + (fp_text reference R7 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 78 "Net-(J1-Pad31)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4732) + (at 73.105001 88.825001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA241D5) + (fp_text reference R8 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 79 "Net-(J1-Pad32)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4740) + (at 93.425001 80.645001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA246F6) + (fp_text reference R9 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 82 "Net-(J1-Pad36)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE474E) + (at 78.065001 88.825001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA24EB1) + (fp_text reference RA1 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 84 "Net-(J1-Pad38)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE475C) + (at 83.025001 88.825001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA253F4) + (fp_text reference RB1 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 85 "Net-(J1-Pad40)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE476A) + (at 73.105001 91.975001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA25849) + (fp_text reference RC1 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 83 "Net-(J1-Pad37)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4778) + (at 78.065001 91.975001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA25CA5) + (fp_text reference RD1 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 81 "Net-(J1-Pad35)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4786) + (at 83.025001 91.975001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA2611D) + (fp_text reference RE1 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 80 "Net-(J1-Pad33)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical (layer F.Cu) (tedit 5AE5139B) (tstamp 5FAE4794) + (at 73.105001 95.125001) + (descr "Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf") + (tags "Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm") + (path /5FA2686B) + (fp_text reference RF1 (at 0.95 -1.92) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 3K (at 0.95 1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 0 0) (end 0.417133 -0.7) (angle -233.92106) (layer F.SilkS) (width 0.12)) + (fp_circle (center 0 0) (end 0.8 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0 0) (end 1.9 0) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -1.05) (end -1.05 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.05 1.05) (end 2.86 1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 1.05) (end 2.86 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.86 -1.05) (end -1.05 -1.05) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0.95 -1.92) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 78 "Net-(J1-Pad31)")) + (pad 2 thru_hole oval (at 1.9 0) (size 1.4 1.4) (drill 0.7) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_DIP:DIP-20_W7.62mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5FAE47BC) + (at 120.65 107.95 90) + (descr "20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") + (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil") + (path /5FA15F43) + (fp_text reference U0 (at 3.81 -2.33 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 74LS245 (at 3.81 25.19 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 24.13) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 24.19) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 24.19) (end 6.46 24.19) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 24.19) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.1 -1.55) (end -1.1 24.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 3.81 11.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 86 "Net-(U0-Pad1)")) + (pad 11 thru_hole oval (at 7.62 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 9 "Net-(U0-Pad11)")) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 54 "Net-(J0-Pad49)")) + (pad 12 thru_hole oval (at 7.62 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 7 "Net-(U0-Pad12)")) + (pad 3 thru_hole oval (at 0 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 53 "Net-(J0-Pad48)")) + (pad 13 thru_hole oval (at 7.62 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 "Net-(U0-Pad13)")) + (pad 4 thru_hole oval (at 0 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 52 "Net-(J0-Pad47)")) + (pad 14 thru_hole oval (at 7.62 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 "Net-(U0-Pad14)")) + (pad 5 thru_hole oval (at 0 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 51 "Net-(J0-Pad46)")) + (pad 15 thru_hole oval (at 7.62 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 "Net-(U0-Pad15)")) + (pad 6 thru_hole oval (at 0 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 50 "Net-(J0-Pad45)")) + (pad 16 thru_hole oval (at 7.62 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 "Net-(U0-Pad16)")) + (pad 7 thru_hole oval (at 0 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 49 "Net-(J0-Pad44)")) + (pad 17 thru_hole oval (at 7.62 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 21 "Net-(U0-Pad17)")) + (pad 8 thru_hole oval (at 0 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 48 "Net-(J0-Pad43)")) + (pad 18 thru_hole oval (at 7.62 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 19 "Net-(U0-Pad18)")) + (pad 9 thru_hole oval (at 0 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 87 "Net-(J0-Pad42)")) + (pad 19 thru_hole oval (at 7.62 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 88 "Net-(U0-Pad19)")) + (pad 10 thru_hole oval (at 0 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 20 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-20_W7.62mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_DIP:DIP-14_W7.62mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5FAE47DE) + (at 142.24 73.66) + (descr "14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") + (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil") + (path /5FD4E618) + (fp_text reference U2 (at 3.81 -2.33) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 74LS00 (at 3.81 17.57) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 7.62 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 16.8) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.1 16.8) (end 8.7 16.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.1 -1.55) (end -1.1 16.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 16.57) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 16.57) (end 6.46 16.57) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 16.57) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 16.51) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 16.51) (end 0.635 16.51) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 -1.27) (end 6.985 16.51) (layer F.Fab) (width 0.1)) + (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (pad 14 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 13 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 29 "Net-(J0-Pad18)")) + (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 88 "Net-(U0-Pad19)")) + (pad 12 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 29 "Net-(J0-Pad18)")) + (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 89 "Net-(U2-Pad3)")) + (pad 11 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 86 "Net-(U0-Pad1)")) + (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 89 "Net-(U2-Pad3)")) + (pad 10 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 86 "Net-(U0-Pad1)")) + (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 89 "Net-(U2-Pad3)")) + (pad 9 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 86 "Net-(U0-Pad1)")) + (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 11 "Net-(J0-Pad1)")) + (pad 8 thru_hole oval (at 7.62 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 90 "Net-(U2-Pad8)")) + (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 91 "Net-(J0-Pad41)")) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-14_W7.62mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_DIP:DIP-14_W7.62mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5FAE4800) + (at 127 73.66) + (descr "14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") + (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil") + (path /5FB50A31) + (fp_text reference U3 (at 3.81 -2.33) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 74LS32 (at 3.81 17.57) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 -1.27) (end 6.985 16.51) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 16.51) (end 0.635 16.51) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 16.51) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 16.57) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 16.57) (end 6.46 16.57) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 16.57) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.1 -1.55) (end -1.1 16.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.1 16.8) (end 8.7 16.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 16.8) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 3.81 7.62) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 92 "Net-(U3-Pad1)")) + (pad 8 thru_hole oval (at 7.62 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 73 "Net-(J1-Pad24)")) + (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 91 "Net-(J0-Pad41)")) + (pad 9 thru_hole oval (at 7.62 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 91 "Net-(J0-Pad41)")) + (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 74 "Net-(J1-Pad26)")) + (pad 10 thru_hole oval (at 7.62 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 93 "Net-(U3-Pad10)")) + (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 86 "Net-(U0-Pad1)")) + (pad 11 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 93 "Net-(U3-Pad10)")) + (pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 17 "Net-(J0-Pad2)")) + (pad 12 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 90 "Net-(U2-Pad8)")) + (pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 92 "Net-(U3-Pad1)")) + (pad 13 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 15 "Net-(J0-Pad3)")) + (pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 14 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-14_W7.62mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_DIP:DIP-20_W7.62mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5FAE4828) + (at 90.17 107.95 90) + (descr "20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") + (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil") + (path /5FA19168) + (fp_text reference U4 (at 3.81 -2.33 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 74LS245 (at 3.81 25.19 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 3.81 11.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.1 -1.55) (end -1.1 24.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 24.19) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 24.19) (end 6.46 24.19) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 24.19) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 24.13) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1)) + (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (pad 20 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (pad 10 thru_hole oval (at 0 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 19 thru_hole oval (at 7.62 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 74 "Net-(J1-Pad26)")) + (pad 9 thru_hole oval (at 0 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 9 "Net-(U0-Pad11)")) + (pad 18 thru_hole oval (at 7.62 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 59 "Net-(J1-Pad7)")) + (pad 8 thru_hole oval (at 0 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 7 "Net-(U0-Pad12)")) + (pad 17 thru_hole oval (at 7.62 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 62 "Net-(J1-Pad11)")) + (pad 7 thru_hole oval (at 0 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 "Net-(U0-Pad13)")) + (pad 16 thru_hole oval (at 7.62 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 64 "Net-(J1-Pad13)")) + (pad 6 thru_hole oval (at 0 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 "Net-(U0-Pad14)")) + (pad 15 thru_hole oval (at 7.62 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 65 "Net-(J1-Pad15)")) + (pad 5 thru_hole oval (at 0 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 "Net-(U0-Pad15)")) + (pad 14 thru_hole oval (at 7.62 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 69 "Net-(J1-Pad19)")) + (pad 4 thru_hole oval (at 0 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 "Net-(U0-Pad16)")) + (pad 13 thru_hole oval (at 7.62 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 70 "Net-(J1-Pad21)")) + (pad 3 thru_hole oval (at 0 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 21 "Net-(U0-Pad17)")) + (pad 12 thru_hole oval (at 7.62 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 72 "Net-(J1-Pad23)")) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 19 "Net-(U0-Pad18)")) + (pad 11 thru_hole oval (at 7.62 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 77 "Net-(J1-Pad29)")) + (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-20_W7.62mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_DIP:DIP-20_W7.62mm (layer F.Cu) (tedit 5A02E8C5) (tstamp 5FAE4850) + (at 59.69 107.95 90) + (descr "20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils)") + (tags "THT DIP DIL PDIP 2.54mm 7.62mm 300mil") + (path /5FA1EB22) + (fp_text reference U5 (at 3.81 -2.33 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 74LS374 (at 3.81 25.19 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_arc (start 3.81 -1.33) (end 2.81 -1.33) (angle -180) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.635 -1.27) (end 6.985 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 -1.27) (end 6.985 24.13) (layer F.Fab) (width 0.1)) + (fp_line (start 6.985 24.13) (end 0.635 24.13) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 24.13) (end 0.635 -0.27) (layer F.Fab) (width 0.1)) + (fp_line (start 0.635 -0.27) (end 1.635 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 2.81 -1.33) (end 1.16 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 -1.33) (end 1.16 24.19) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.16 24.19) (end 6.46 24.19) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 24.19) (end 6.46 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 6.46 -1.33) (end 4.81 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.1 -1.55) (end -1.1 24.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.1 24.4) (end 8.7 24.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 24.4) (end 8.7 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.7 -1.55) (end -1.1 -1.55) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 3.81 11.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 11 thru_hole oval (at 7.62 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 73 "Net-(J1-Pad24)")) + (pad 2 thru_hole oval (at 0 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 78 "Net-(J1-Pad31)")) + (pad 12 thru_hole oval (at 7.62 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 85 "Net-(J1-Pad40)")) + (pad 3 thru_hole oval (at 0 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 19 "Net-(U0-Pad18)")) + (pad 13 thru_hole oval (at 7.62 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 3 "Net-(U0-Pad14)")) + (pad 4 thru_hole oval (at 0 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 21 "Net-(U0-Pad17)")) + (pad 14 thru_hole oval (at 7.62 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 5 "Net-(U0-Pad13)")) + (pad 5 thru_hole oval (at 0 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 80 "Net-(J1-Pad33)")) + (pad 15 thru_hole oval (at 7.62 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 84 "Net-(J1-Pad38)")) + (pad 6 thru_hole oval (at 0 12.7 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 81 "Net-(J1-Pad35)")) + (pad 16 thru_hole oval (at 7.62 10.16 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 82 "Net-(J1-Pad36)")) + (pad 7 thru_hole oval (at 0 15.24 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 23 "Net-(U0-Pad16)")) + (pad 17 thru_hole oval (at 7.62 7.62 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 7 "Net-(U0-Pad12)")) + (pad 8 thru_hole oval (at 0 17.78 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 1 "Net-(U0-Pad15)")) + (pad 18 thru_hole oval (at 7.62 5.08 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 9 "Net-(U0-Pad11)")) + (pad 9 thru_hole oval (at 0 20.32 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 83 "Net-(J1-Pad37)")) + (pad 19 thru_hole oval (at 7.62 2.54 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 79 "Net-(J1-Pad32)")) + (pad 10 thru_hole oval (at 0 22.86 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 94 "Net-(C1-Pad2)")) + (pad 20 thru_hole oval (at 7.62 0 90) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) + (net 95 "Net-(C1-Pad1)")) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-20_W7.62mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (gr_line (start 118.11 123.19) (end 182.88 123.19) (layer Edge.Cuts) (width 0.05) (tstamp 5FB2423C)) + (gr_line (start 118.11 115.57) (end 118.11 123.19) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 54.61 115.57) (end 118.11 115.57) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 54.61 67.31) (end 54.61 115.57) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 185.42 67.31) (end 54.61 67.31) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 185.42 115.57) (end 185.42 67.31) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 182.88 115.57) (end 185.42 115.57) (layer Edge.Cuts) (width 0.05)) + (gr_line (start 182.88 123.19) (end 182.88 115.57) (layer Edge.Cuts) (width 0.05)) + +) diff --git a/Hardware/Apple2IORPi.net b/Hardware/Apple2IORPi.net new file mode 100644 index 0000000..4107959 --- /dev/null +++ b/Hardware/Apple2IORPi.net @@ -0,0 +1,812 @@ +(export (version D) + (design + (source /home/terence/source/Apple2-IO-RPi/Hardware/Apple2IORPi.sch) + (date "Thu 12 Nov 2020 09:25:57 PM") + (tool "Eeschema 5.1.5+dfsg1-2build2") + (sheet (number 1) (name /) (tstamps /) + (title_block + (title "Apple II I/O RPi") + (company "Terence J. Boldt") + (rev 0.3) + (date 2020-11-12) + (source Apple2IORPi.sch) + (comment (number 1) (value "Initial draft desgn")) + (comment (number 2) (value "Provides storage and network for the Apple ][")) + (comment (number 3) (value "Raspberry Pi Zero W as a daughter board")) + (comment (number 4) (value "Expansion card for Apple ][ computers"))))) + (components + (comp (ref J0) + (value "Apple II Expansion Bus") + (footprint Connector_PCBEdge:Samtec_MECF-50-02-L-DV-WT_2x50_P1.27mm_Polarized_Socket_Horizontal) + (datasheet ~) + (libsource (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise) (description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA0A8C3)) + (comp (ref U1) + (value 2764) + (footprint Package_DIP:DIP-28_W15.24mm) + (datasheet https://downloads.reactivemicro.com/Electronics/ROM/2764%20EPROM.pdf) + (libsource (lib Memory_EPROM) (part 2764) (description "EPROM 64 KiBit, [Obsolete 2000-11]")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA0EF8B)) + (comp (ref U0) + (value 74LS245) + (footprint Package_DIP:DIP-20_W7.62mm) + (datasheet http://www.ti.com/lit/gpn/sn74LS245) + (libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA15F43)) + (comp (ref U4) + (value 74LS245) + (footprint Package_DIP:DIP-20_W7.62mm) + (datasheet http://www.ti.com/lit/gpn/sn74LS245) + (libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA19168)) + (comp (ref J1) + (value Raspberry_Pi_2_3) + (footprint Connector_PinSocket_2.54mm:PinSocket_2x20_P2.54mm_Vertical) + (datasheet https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/rpi_SCH_3bplus_1p0_reduced.pdf) + (libsource (lib Connector) (part Raspberry_Pi_2_3) (description "expansion header for Raspberry Pi 2 & 3")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA19C2C)) + (comp (ref U5) + (value 74LS374) + (footprint Package_DIP:DIP-20_W7.62mm) + (datasheet http://www.ti.com/lit/gpn/sn74LS374) + (libsource (lib 74xx) (part 74LS374) (description "8-bit Register, 3-state outputs")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA1EB22)) + (comp (ref R8) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA241D5)) + (comp (ref R9) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA246F6)) + (comp (ref RA1) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA24EB1)) + (comp (ref RB1) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA253F4)) + (comp (ref RC1) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA25849)) + (comp (ref RD1) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA25CA5)) + (comp (ref RE1) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA2611D)) + (comp (ref RF1) + (value 3K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FA2686B)) + (comp (ref R0) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB0D)) + (comp (ref R1) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB13)) + (comp (ref R2) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB19)) + (comp (ref R3) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB1F)) + (comp (ref R4) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB25)) + (comp (ref R5) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB2B)) + (comp (ref R6) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB31)) + (comp (ref R7) + (value 2K) + (footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5FAAFB37)) + (comp (ref U3) + (value 74LS32) + (footprint Package_DIP:DIP-14_W7.62mm) + (datasheet http://www.ti.com/lit/gpn/sn74LS32) + (libsource (lib 74xx) (part 74LS32) (description "Quad 2-input OR")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FB50A31)) + (comp (ref U2) + (value 74LS00) + (footprint Package_DIP:DIP-14_W7.62mm) + (datasheet http://www.ti.com/lit/gpn/sn74ls00) + (libsource (lib 74xx) (part 74LS00) (description "quad 2-input NAND gate")) + (sheetpath (names /) (tstamps /)) + (tstamp 5FD4E618))) + (libparts + (libpart (lib 74xx) (part 74LS00) + (aliases + (alias 74LS37) + (alias 7400) + (alias 74HCT00) + (alias 74HC00)) + (description "quad 2-input NAND gate") + (docs http://www.ti.com/lit/gpn/sn74ls00) + (footprints + (fp DIP*W7.62mm*) + (fp SO14*)) + (fields + (field (name Reference) U) + (field (name Value) 74LS00)) + (pins + (pin (num 1) (name ~) (type input)) + (pin (num 2) (name ~) (type input)) + (pin (num 3) (name ~) (type output)) + (pin (num 4) (name ~) (type input)) + (pin (num 5) (name ~) (type input)) + (pin (num 6) (name ~) (type output)) + (pin (num 7) (name GND) (type power_in)) + (pin (num 8) (name ~) (type output)) + (pin (num 9) (name ~) (type input)) + (pin (num 10) (name ~) (type input)) + (pin (num 11) (name ~) (type output)) + (pin (num 12) (name ~) (type input)) + (pin (num 13) (name ~) (type input)) + (pin (num 14) (name VCC) (type power_in)))) + (libpart (lib 74xx) (part 74LS245) + (aliases + (alias 74HC245)) + (description "Octal BUS Transceivers, 3-State outputs") + (docs http://www.ti.com/lit/gpn/sn74LS245) + (footprints + (fp DIP?20*)) + (fields + (field (name Reference) U) + (field (name Value) 74LS245)) + (pins + (pin (num 1) (name A->B) (type input)) + (pin (num 2) (name A0) (type 3state)) + (pin (num 3) (name A1) (type 3state)) + (pin (num 4) (name A2) (type 3state)) + (pin (num 5) (name A3) (type 3state)) + (pin (num 6) (name A4) (type 3state)) + (pin (num 7) (name A5) (type 3state)) + (pin (num 8) (name A6) (type 3state)) + (pin (num 9) (name A7) (type 3state)) + (pin (num 10) (name GND) (type power_in)) + (pin (num 11) (name B7) (type 3state)) + (pin (num 12) (name B6) (type 3state)) + (pin (num 13) (name B5) (type 3state)) + (pin (num 14) (name B4) (type 3state)) + (pin (num 15) (name B3) (type 3state)) + (pin (num 16) (name B2) (type 3state)) + (pin (num 17) (name B1) (type 3state)) + (pin (num 18) (name B0) (type 3state)) + (pin (num 19) (name CE) (type input)) + (pin (num 20) (name VCC) (type power_in)))) + (libpart (lib 74xx) (part 74LS32) + (description "Quad 2-input OR") + (docs http://www.ti.com/lit/gpn/sn74LS32) + (footprints + (fp DIP?14*)) + (fields + (field (name Reference) U) + (field (name Value) 74LS32)) + (pins + (pin (num 1) (name ~) (type input)) + (pin (num 2) (name ~) (type input)) + (pin (num 3) (name ~) (type output)) + (pin (num 4) (name ~) (type input)) + (pin (num 5) (name ~) (type input)) + (pin (num 6) (name ~) (type output)) + (pin (num 7) (name GND) (type power_in)) + (pin (num 8) (name ~) (type output)) + (pin (num 9) (name ~) (type input)) + (pin (num 10) (name ~) (type input)) + (pin (num 11) (name ~) (type output)) + (pin (num 12) (name ~) (type input)) + (pin (num 13) (name ~) (type input)) + (pin (num 14) (name VCC) (type power_in)))) + (libpart (lib 74xx) (part 74LS374) + (aliases + (alias 74HC374) + (alias 74HCT374) + (alias 74AHC374) + (alias 74AHCT374)) + (description "8-bit Register, 3-state outputs") + (docs http://www.ti.com/lit/gpn/sn74LS374) + (footprints + (fp DIP?20*) + (fp SOIC?20*) + (fp SO?20*)) + (fields + (field (name Reference) U) + (field (name Value) 74LS374)) + (pins + (pin (num 1) (name OE) (type input)) + (pin (num 2) (name O0) (type 3state)) + (pin (num 3) (name D0) (type input)) + (pin (num 4) (name D1) (type input)) + (pin (num 5) (name O1) (type 3state)) + (pin (num 6) (name O2) (type 3state)) + (pin (num 7) (name D2) (type input)) + (pin (num 8) (name D3) (type input)) + (pin (num 9) (name O3) (type 3state)) + (pin (num 10) (name GND) (type power_in)) + (pin (num 11) (name Cp) (type input)) + (pin (num 12) (name O4) (type 3state)) + (pin (num 13) (name D4) (type input)) + (pin (num 14) (name D5) (type input)) + (pin (num 15) (name O5) (type 3state)) + (pin (num 16) (name O6) (type 3state)) + (pin (num 17) (name D6) (type input)) + (pin (num 18) (name D7) (type input)) + (pin (num 19) (name O7) (type 3state)) + (pin (num 20) (name VCC) (type power_in)))) + (libpart (lib Connector) (part Raspberry_Pi_2_3) + (description "expansion header for Raspberry Pi 2 & 3") + (docs https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/rpi_SCH_3bplus_1p0_reduced.pdf) + (footprints + (fp PinHeader*2x20*P2.54mm*Vertical*) + (fp PinSocket*2x20*P2.54mm*Vertical*)) + (fields + (field (name Reference) J) + (field (name Value) Raspberry_Pi_2_3)) + (pins + (pin (num 1) (name 3V3) (type power_in)) + (pin (num 2) (name 5V) (type power_in)) + (pin (num 3) (name SDA/GPIO2) (type BiDi)) + (pin (num 4) (name 5V) (type power_in)) + (pin (num 5) (name SCL/GPIO3) (type BiDi)) + (pin (num 6) (name GND) (type power_in)) + (pin (num 7) (name GCLK0/GPIO4) (type BiDi)) + (pin (num 8) (name GPIO14/TXD) (type BiDi)) + (pin (num 9) (name GND) (type power_in)) + (pin (num 10) (name GPIO15/RXD) (type BiDi)) + (pin (num 11) (name GPIO17) (type BiDi)) + (pin (num 12) (name GPIO18/PWM0) (type BiDi)) + (pin (num 13) (name GPIO27) (type BiDi)) + (pin (num 14) (name GND) (type power_in)) + (pin (num 15) (name GPIO22) (type BiDi)) + (pin (num 16) (name GPIO23) (type BiDi)) + (pin (num 17) (name 3V3) (type power_in)) + (pin (num 18) (name GPIO24) (type BiDi)) + (pin (num 19) (name MOSI0/GPIO10) (type BiDi)) + (pin (num 20) (name GND) (type power_in)) + (pin (num 21) (name MISO0/GPIO9) (type BiDi)) + (pin (num 22) (name GPIO25) (type BiDi)) + (pin (num 23) (name SCLK0/GPIO11) (type BiDi)) + (pin (num 24) (name ~CE0~/GPIO8) (type BiDi)) + (pin (num 25) (name GND) (type power_in)) + (pin (num 26) (name ~CE1~/GPIO7) (type BiDi)) + (pin (num 27) (name ID_SD/GPIO0) (type BiDi)) + (pin (num 28) (name ID_SC/GPIO1) (type BiDi)) + (pin (num 29) (name GCLK1/GPIO5) (type BiDi)) + (pin (num 30) (name GND) (type power_in)) + (pin (num 31) (name GCLK2/GPIO6) (type BiDi)) + (pin (num 32) (name PWM0/GPIO12) (type BiDi)) + (pin (num 33) (name PWM1/GPIO13) (type BiDi)) + (pin (num 34) (name GND) (type power_in)) + (pin (num 35) (name GPIO19/MISO1) (type BiDi)) + (pin (num 36) (name GPIO16) (type BiDi)) + (pin (num 37) (name GPIO26) (type BiDi)) + (pin (num 38) (name GPIO20/MOSI1) (type BiDi)) + (pin (num 39) (name GND) (type power_in)) + (pin (num 40) (name GPIO21/SCLK1) (type BiDi)))) + (libpart (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise) + (description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)") + (docs ~) + (footprints + (fp Connector*:*_2x??_*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_02x25_Counter_Clockwise)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)) + (pin (num 3) (name Pin_3) (type passive)) + (pin (num 4) (name Pin_4) (type passive)) + (pin (num 5) (name Pin_5) (type passive)) + (pin (num 6) (name Pin_6) (type passive)) + (pin (num 7) (name Pin_7) (type passive)) + (pin (num 8) (name Pin_8) (type passive)) + (pin (num 9) (name Pin_9) (type passive)) + (pin (num 10) (name Pin_10) (type passive)) + (pin (num 11) (name Pin_11) (type passive)) + (pin (num 12) (name Pin_12) (type passive)) + (pin (num 13) (name Pin_13) (type passive)) + (pin (num 14) (name Pin_14) (type passive)) + (pin (num 15) (name Pin_15) (type passive)) + (pin (num 16) (name Pin_16) (type passive)) + (pin (num 17) (name Pin_17) (type passive)) + (pin (num 18) (name Pin_18) (type passive)) + (pin (num 19) (name Pin_19) (type passive)) + (pin (num 20) (name Pin_20) (type passive)) + (pin (num 21) (name Pin_21) (type passive)) + (pin (num 22) (name Pin_22) (type passive)) + (pin (num 23) (name Pin_23) (type passive)) + (pin (num 24) (name Pin_24) (type passive)) + (pin (num 25) (name Pin_25) (type passive)) + (pin (num 26) (name Pin_26) (type passive)) + (pin (num 27) (name Pin_27) (type passive)) + (pin (num 28) (name Pin_28) (type passive)) + (pin (num 29) (name Pin_29) (type passive)) + (pin (num 30) (name Pin_30) (type passive)) + (pin (num 31) (name Pin_31) (type passive)) + (pin (num 32) (name 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(ref J0) (pin 2)) + (node (ref U3) (pin 5)) + (node (ref U1) (pin 10))) + (net (code 95) (name "Net-(J0-Pad5)") + (node (ref J0) (pin 5)) + (node (ref U1) (pin 7))) + (net (code 96) (name "Net-(U0-Pad18)") + (node (ref U4) (pin 2)) + (node (ref U5) (pin 3)) + (node (ref U0) (pin 18)) + (node (ref U1) (pin 11))) + (net (code 97) (name "Net-(U0-Pad17)") + (node (ref U4) (pin 3)) + (node (ref U0) (pin 17)) + (node (ref U5) (pin 4)) + (node (ref U1) (pin 12))))) \ No newline at end of file diff --git a/Hardware/Apple2IORPi.pdf b/Hardware/Apple2IORPi.pdf index 9d9ba1a..50c30e9 100644 Binary files a/Hardware/Apple2IORPi.pdf and b/Hardware/Apple2IORPi.pdf differ diff --git a/Hardware/Apple2IORPi.pro b/Hardware/Apple2IORPi.pro index 152769c..4d50d29 100644 --- a/Hardware/Apple2IORPi.pro +++ b/Hardware/Apple2IORPi.pro @@ -1,29 +1,10 @@ -update=22/05/2015 07:44:53 +update=Thu 12 Nov 2020 09:17:33 PM version=1 last_client=kicad [general] version=1 RootSch= BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 [cvpcb] version=1 NetIExt=net @@ -31,3 +12,237 @@ NetIExt=net version=1 LibDir= [eeschema/libraries] +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName=/home/terence/source/Apple2-IO-RPi/Hardware/ +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName=Pcbnew +SpiceAjustPassiveValues=0 +LabSize=50 +ERC_TestSimilarLabels=1 +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead=Apple2IORPi.net +CopperLayerCount=2 +BoardThickness=1.6 +AllowMicroVias=0 +AllowBlindVias=0 +RequireCourtyardDefinitions=0 +ProhibitOverlappingCourtyards=1 +MinTrackWidth=0.2 +MinViaDiameter=0.4 +MinViaDrill=0.3 +MinMicroViaDiameter=0.2 +MinMicroViaDrill=0.09999999999999999 +MinHoleToHole=0.25 +TrackWidth1=0.25 +ViaDiameter1=0.8 +ViaDrill1=0.4 +dPairWidth1=0.2 +dPairGap1=0.25 +dPairViaGap1=0.25 +SilkLineWidth=0.12 +SilkTextSizeV=1 +SilkTextSizeH=1 +SilkTextSizeThickness=0.15 +SilkTextItalic=0 +SilkTextUpright=1 +CopperLineWidth=0.2 +CopperTextSizeV=1.5 +CopperTextSizeH=1.5 +CopperTextThickness=0.3 +CopperTextItalic=0 +CopperTextUpright=1 +EdgeCutLineWidth=0.05 +CourtyardLineWidth=0.05 +OthersLineWidth=0.15 +OthersTextSizeV=1 +OthersTextSizeH=1 +OthersTextSizeThickness=0.15 +OthersTextItalic=0 +OthersTextUpright=1 +SolderMaskClearance=0.051 +SolderMaskMinWidth=0.25 +SolderPasteClearance=0 +SolderPasteRatio=0 +[pcbnew/Layer.F.Cu] +Name=F.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.In1.Cu] +Name=In1.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In2.Cu] +Name=In2.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In3.Cu] +Name=In3.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In4.Cu] +Name=In4.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In5.Cu] +Name=In5.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In6.Cu] +Name=In6.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In7.Cu] +Name=In7.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In8.Cu] +Name=In8.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In9.Cu] +Name=In9.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In10.Cu] +Name=In10.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In11.Cu] +Name=In11.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In12.Cu] +Name=In12.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In13.Cu] +Name=In13.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In14.Cu] +Name=In14.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In15.Cu] +Name=In15.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In16.Cu] +Name=In16.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In17.Cu] +Name=In17.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In18.Cu] +Name=In18.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In19.Cu] +Name=In19.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In20.Cu] +Name=In20.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In21.Cu] +Name=In21.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In22.Cu] +Name=In22.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In23.Cu] +Name=In23.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In24.Cu] +Name=In24.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In25.Cu] +Name=In25.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In26.Cu] +Name=In26.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In27.Cu] +Name=In27.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In28.Cu] +Name=In28.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In29.Cu] +Name=In29.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In30.Cu] +Name=In30.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.B.Cu] +Name=B.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.B.Adhes] +Enabled=1 +[pcbnew/Layer.F.Adhes] +Enabled=1 +[pcbnew/Layer.B.Paste] +Enabled=1 +[pcbnew/Layer.F.Paste] +Enabled=1 +[pcbnew/Layer.B.SilkS] +Enabled=1 +[pcbnew/Layer.F.SilkS] +Enabled=1 +[pcbnew/Layer.B.Mask] +Enabled=1 +[pcbnew/Layer.F.Mask] +Enabled=1 +[pcbnew/Layer.Dwgs.User] +Enabled=1 +[pcbnew/Layer.Cmts.User] +Enabled=1 +[pcbnew/Layer.Eco1.User] +Enabled=1 +[pcbnew/Layer.Eco2.User] +Enabled=1 +[pcbnew/Layer.Edge.Cuts] +Enabled=1 +[pcbnew/Layer.Margin] +Enabled=1 +[pcbnew/Layer.B.CrtYd] +Enabled=1 +[pcbnew/Layer.F.CrtYd] +Enabled=1 +[pcbnew/Layer.B.Fab] +Enabled=1 +[pcbnew/Layer.F.Fab] +Enabled=1 +[pcbnew/Layer.Rescue] +Enabled=1 +[pcbnew/Netclasses] +[pcbnew/Netclasses/Default] +Name=Default +Clearance=0.2 +TrackWidth=0.25 +ViaDiameter=0.8 +ViaDrill=0.4 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2 +dPairGap=0.25 +dPairViaGap=0.25 diff --git a/Hardware/Apple2IORPi.sch b/Hardware/Apple2IORPi.sch index f77b3f1..2d4fad3 100644 --- a/Hardware/Apple2IORPi.sch +++ b/Hardware/Apple2IORPi.sch @@ -5,8 +5,8 @@ $Descr USLedger 17000 11000 encoding utf-8 Sheet 1 1 Title "Apple II I/O RPi" -Date "2020-11-02" -Rev "0.1" +Date "2020-11-12" +Rev "0.4" Comp "Terence J. Boldt" Comment1 "Initial draft desgn" Comment2 "Provides storage and network for the Apple ][" @@ -14,21 +14,21 @@ Comment3 "Raspberry Pi Zero W as a daughter board" Comment4 "Expansion card for Apple ][ computers" $EndDescr $Comp -L Connector_Generic:Conn_02x25_Counter_Clockwise J? +L Connector_Generic:Conn_02x25_Counter_Clockwise J0 U 1 1 5FA0A8C3 P 3000 2700 -F 0 "J?" H 3050 4117 50 0000 C CNN +F 0 "J0" H 3050 4117 50 0000 C CNN F 1 "Apple II Expansion Bus" H 3050 4026 50 0000 C CNN -F 2 "" H 3000 2700 50 0001 C CNN +F 2 "Hardware:Apple II Expansion Edge Connector" H 3000 2700 50 0001 C CNN F 3 "~" H 3000 2700 50 0001 C CNN 1 3000 2700 1 0 0 -1 $EndComp $Comp -L Memory_EPROM:2764 U? +L Memory_EPROM:2764 U1 U 1 1 5FA0EF8B P 5950 6400 -F 0 "U?" H 5950 7581 50 0000 C CNN +F 0 "U1" H 5950 7581 50 0000 C CNN F 1 "2764" H 5950 7490 50 0000 C CNN F 2 "Package_DIP:DIP-28_W15.24mm" H 5950 6400 50 0001 C CNN F 3 "https://downloads.reactivemicro.com/Electronics/ROM/2764%20EPROM.pdf" H 5950 6400 50 0001 C CNN @@ -36,45 +36,45 @@ F 3 "https://downloads.reactivemicro.com/Electronics/ROM/2764%20EPROM.pdf" H 595 1 0 0 -1 $EndComp $Comp -L 74xx:74LS245 U? +L 74xx:74LS245 U0 U 1 1 5FA15F43 P 4850 2100 -F 0 "U?" H 4850 3081 50 0000 C CNN +F 0 "U0" H 4850 3081 50 0000 C CNN F 1 "74LS245" H 4850 2990 50 0000 C CNN -F 2 "" H 4850 2100 50 0001 C CNN +F 2 "Package_DIP:DIP-20_W7.62mm" H 4850 2100 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74LS245" H 4850 2100 50 0001 C CNN 1 4850 2100 1 0 0 -1 $EndComp $Comp -L 74xx:74LS245 U? +L 74xx:74LS245 U4 U 1 1 5FA19168 P 9100 2100 -F 0 "U?" H 9100 3081 50 0000 C CNN +F 0 "U4" H 9100 3081 50 0000 C CNN F 1 "74LS245" H 9100 2990 50 0000 C CNN -F 2 "" H 9100 2100 50 0001 C CNN +F 2 "Package_DIP:DIP-20_W7.62mm" H 9100 2100 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74LS245" H 9100 2100 50 0001 C CNN 1 9100 2100 1 0 0 -1 $EndComp $Comp -L Connector:Raspberry_Pi_2_3 J? +L Connector:Raspberry_Pi_2_3 J1 U 1 1 5FA19C2C P 13050 2550 -F 0 "J?" H 13050 4031 50 0000 C CNN +F 0 "J1" H 13050 4031 50 0000 C CNN F 1 "Raspberry_Pi_2_3" H 13050 3940 50 0000 C CNN -F 2 "" H 13050 2550 50 0001 C CNN +F 2 "Connector_PinSocket_2.54mm:PinSocket_2x20_P2.54mm_Vertical" H 13050 2550 50 0001 C CNN F 3 "https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/rpi_SCH_3bplus_1p0_reduced.pdf" H 13050 2550 50 0001 C CNN 1 13050 2550 1 0 0 -1 $EndComp $Comp -L 74xx:74LS374 U? +L 74xx:74LS374 U5 U 1 1 5FA1EB22 P 9100 4100 -F 0 "U?" H 9100 5081 50 0000 C CNN +F 0 "U5" H 9100 5081 50 0000 C CNN F 1 "74LS374" H 9100 4990 50 0000 C CNN -F 2 "" H 9100 4100 50 0001 C CNN +F 2 "Package_DIP:DIP-20_W7.62mm" H 9100 4100 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74LS374" H 9100 4100 50 0001 C CNN 1 9100 4100 1 0 0 -1 @@ -328,14 +328,14 @@ Connection ~ 5400 1300 Wire Wire Line 9100 3300 5400 3300 Wire Wire Line - 5400 1300 5400 3300 + 5400 1300 5400 2450 Connection ~ 5400 3300 Wire Wire Line 5400 3300 5400 5400 Wire Wire Line - 5950 7500 8300 7500 + 5950 7500 6450 7500 Wire Wire Line - 8300 7500 8300 4900 + 8300 7500 8300 6350 Wire Wire Line 8300 4900 9100 4900 Connection ~ 5950 7500 @@ -359,7 +359,7 @@ Wire Wire Line Connection ~ 12850 1250 Connection ~ 9100 1300 Wire Wire Line - 9100 2900 10650 2900 + 9100 2900 9600 2900 Wire Wire Line 10650 2900 10650 3850 Wire Wire Line @@ -397,8 +397,6 @@ Wire Wire Line 9600 1100 9600 1600 Wire Wire Line 10700 2050 10700 1700 -Wire Wire Line - 10700 1700 9600 1700 Wire Wire Line 12250 3250 10750 3250 Wire Wire Line @@ -455,8 +453,6 @@ Wire Wire Line 9900 2300 9600 2300 Wire Wire Line 9100 1250 9100 1300 -Wire Wire Line - 9100 1250 12850 1250 Wire Wire Line 13850 2450 14300 2450 Wire Wire Line @@ -514,183 +510,183 @@ Wire Wire Line Wire Wire Line 14050 4300 9900 4300 $Comp -L Device:R R? +L Device:R R8 U 1 1 5FA241D5 P 10050 5450 -F 0 "R?" H 10120 5496 50 0000 L CNN -F 1 "R" H 10120 5405 50 0000 L CNN -F 2 "" V 9980 5450 50 0001 C CNN +F 0 "R8" H 10120 5496 50 0000 L CNN +F 1 "3K" H 10120 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 9980 5450 50 0001 C CNN F 3 "~" H 10050 5450 50 0001 C CNN 1 10050 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R9 U 1 1 5FA246F6 P 10300 5450 -F 0 "R?" H 10370 5496 50 0000 L CNN -F 1 "R" H 10370 5405 50 0000 L CNN -F 2 "" V 10230 5450 50 0001 C CNN +F 0 "R9" H 10370 5496 50 0000 L CNN +F 1 "3K" H 10370 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10230 5450 50 0001 C CNN F 3 "~" H 10300 5450 50 0001 C CNN 1 10300 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R RA1 U 1 1 5FA24EB1 P 10550 5450 -F 0 "R?" H 10620 5496 50 0000 L CNN -F 1 "R" H 10620 5405 50 0000 L CNN -F 2 "" V 10480 5450 50 0001 C CNN +F 0 "RA1" H 10620 5496 50 0000 L CNN +F 1 "3K" H 10620 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10480 5450 50 0001 C CNN F 3 "~" H 10550 5450 50 0001 C CNN 1 10550 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R RB1 U 1 1 5FA253F4 P 10800 5450 -F 0 "R?" H 10870 5496 50 0000 L CNN -F 1 "R" H 10870 5405 50 0000 L CNN -F 2 "" V 10730 5450 50 0001 C CNN +F 0 "RB1" H 10870 5496 50 0000 L CNN +F 1 "3K" H 10870 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10730 5450 50 0001 C CNN F 3 "~" H 10800 5450 50 0001 C CNN 1 10800 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R RC1 U 1 1 5FA25849 P 11050 5450 -F 0 "R?" H 11120 5496 50 0000 L CNN -F 1 "R" H 11120 5405 50 0000 L CNN -F 2 "" V 10980 5450 50 0001 C CNN +F 0 "RC1" H 11120 5496 50 0000 L CNN +F 1 "3K" H 11120 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10980 5450 50 0001 C CNN F 3 "~" H 11050 5450 50 0001 C CNN 1 11050 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R RD1 U 1 1 5FA25CA5 P 11300 5450 -F 0 "R?" H 11370 5496 50 0000 L CNN -F 1 "R" H 11370 5405 50 0000 L CNN -F 2 "" V 11230 5450 50 0001 C CNN +F 0 "RD1" H 11370 5496 50 0000 L CNN +F 1 "3K" H 11370 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11230 5450 50 0001 C CNN F 3 "~" H 11300 5450 50 0001 C CNN 1 11300 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R RE1 U 1 1 5FA2611D P 11550 5450 -F 0 "R?" H 11620 5496 50 0000 L CNN -F 1 "R" H 11620 5405 50 0000 L CNN -F 2 "" V 11480 5450 50 0001 C CNN +F 0 "RE1" H 11620 5496 50 0000 L CNN +F 1 "3K" H 11620 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11480 5450 50 0001 C CNN F 3 "~" H 11550 5450 50 0001 C CNN 1 11550 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R RF1 U 1 1 5FA2686B P 11800 5450 -F 0 "R?" H 11870 5496 50 0000 L CNN -F 1 "R" H 11870 5405 50 0000 L CNN -F 2 "" V 11730 5450 50 0001 C CNN +F 0 "RF1" H 11870 5496 50 0000 L CNN +F 1 "3K" H 11870 5405 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11730 5450 50 0001 C CNN F 3 "~" H 11800 5450 50 0001 C CNN 1 11800 5450 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R0 U 1 1 5FAAFB0D P 10050 4950 -F 0 "R?" H 10120 4996 50 0000 L CNN -F 1 "R" H 10120 4905 50 0000 L CNN -F 2 "" V 9980 4950 50 0001 C CNN +F 0 "R0" H 10120 4996 50 0000 L CNN +F 1 "2K" H 10120 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 9980 4950 50 0001 C CNN F 3 "~" H 10050 4950 50 0001 C CNN 1 10050 4950 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R1 U 1 1 5FAAFB13 P 10300 4950 -F 0 "R?" H 10370 4996 50 0000 L CNN -F 1 "R" H 10370 4905 50 0000 L CNN -F 2 "" V 10230 4950 50 0001 C CNN +F 0 "R1" H 10370 4996 50 0000 L CNN +F 1 "2K" H 10370 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10230 4950 50 0001 C CNN F 3 "~" H 10300 4950 50 0001 C CNN 1 10300 4950 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R2 U 1 1 5FAAFB19 P 10550 4950 -F 0 "R?" H 10620 4996 50 0000 L CNN -F 1 "R" H 10620 4905 50 0000 L CNN -F 2 "" V 10480 4950 50 0001 C CNN +F 0 "R2" H 10620 4996 50 0000 L CNN +F 1 "2K" H 10620 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10480 4950 50 0001 C CNN F 3 "~" H 10550 4950 50 0001 C CNN 1 10550 4950 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R3 U 1 1 5FAAFB1F P 10800 4950 -F 0 "R?" H 10870 4996 50 0000 L CNN -F 1 "R" H 10870 4905 50 0000 L CNN -F 2 "" V 10730 4950 50 0001 C CNN +F 0 "R3" H 10870 4996 50 0000 L CNN +F 1 "2K" H 10870 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10730 4950 50 0001 C CNN F 3 "~" H 10800 4950 50 0001 C CNN 1 10800 4950 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R4 U 1 1 5FAAFB25 P 11050 4950 -F 0 "R?" H 11120 4996 50 0000 L CNN -F 1 "R" H 11120 4905 50 0000 L CNN -F 2 "" V 10980 4950 50 0001 C CNN +F 0 "R4" H 11120 4996 50 0000 L CNN +F 1 "2K" H 11120 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10980 4950 50 0001 C CNN F 3 "~" H 11050 4950 50 0001 C CNN 1 11050 4950 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R5 U 1 1 5FAAFB2B P 11300 4950 -F 0 "R?" H 11370 4996 50 0000 L CNN -F 1 "R" H 11370 4905 50 0000 L CNN -F 2 "" V 11230 4950 50 0001 C CNN +F 0 "R5" H 11370 4996 50 0000 L CNN +F 1 "2K" H 11370 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11230 4950 50 0001 C CNN F 3 "~" H 11300 4950 50 0001 C CNN 1 11300 4950 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R6 U 1 1 5FAAFB31 P 11550 4950 -F 0 "R?" H 11620 4996 50 0000 L CNN -F 1 "R" H 11620 4905 50 0000 L CNN -F 2 "" V 11480 4950 50 0001 C CNN +F 0 "R6" H 11620 4996 50 0000 L CNN +F 1 "2K" H 11620 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11480 4950 50 0001 C CNN F 3 "~" H 11550 4950 50 0001 C CNN 1 11550 4950 1 0 0 -1 $EndComp $Comp -L Device:R R? +L Device:R R7 U 1 1 5FAAFB37 P 11800 4950 -F 0 "R?" H 11870 4996 50 0000 L CNN -F 1 "R" H 11870 4905 50 0000 L CNN -F 2 "" V 11730 4950 50 0001 C CNN +F 0 "R7" H 11870 4996 50 0000 L CNN +F 1 "2K" H 11870 4905 50 0000 L CNN +F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11730 4950 50 0001 C CNN F 3 "~" H 11800 4950 50 0001 C CNN 1 11800 4950 1 0 0 -1 $EndComp Wire Wire Line - 9100 3300 10600 3300 + 9100 3300 9650 3300 Wire Wire Line 10600 3300 10600 4800 Wire Wire Line @@ -890,12 +886,12 @@ Connection ~ 2650 4550 Wire Wire Line 2650 4550 2650 1600 $Comp -L 74xx:74LS32 U? +L 74xx:74LS32 U3 U 1 1 5FB50A31 P 7300 2700 -F 0 "U?" H 7300 3025 50 0000 C CNN +F 0 "U3" H 7300 3025 50 0000 C CNN F 1 "74LS32" H 7300 2934 50 0000 C CNN -F 2 "" H 7300 2700 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 7300 2700 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 7300 2700 50 0001 C CNN 1 7300 2700 1 0 0 -1 @@ -911,12 +907,12 @@ Wire Wire Line Wire Wire Line 8600 2700 8600 2600 $Comp -L 74xx:74LS32 U? +L 74xx:74LS32 U3 U 2 1 5FB9C73F P 4800 4450 -F 0 "U?" H 4800 4775 50 0000 C CNN +F 0 "U3" H 4800 4775 50 0000 C CNN F 1 "74LS32" H 4800 4684 50 0000 C CNN -F 2 "" H 4800 4450 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 4800 4450 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 4800 4450 50 0001 C CNN 2 4800 4450 1 0 0 -1 @@ -931,12 +927,12 @@ Wire Wire Line Wire Wire Line 5900 4450 5900 2600 $Comp -L 74xx:74LS32 U? +L 74xx:74LS32 U3 U 3 1 5FBF09C5 P 7400 4500 -F 0 "U?" H 7400 4825 50 0000 C CNN +F 0 "U3" H 7400 4825 50 0000 C CNN F 1 "74LS32" H 7400 4734 50 0000 C CNN -F 2 "" H 7400 4500 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 7400 4500 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 7400 4500 50 0001 C CNN 3 7400 4500 1 0 0 -1 @@ -949,12 +945,12 @@ Wire Wire Line 7000 3100 7000 4400 Connection ~ 7000 3100 $Comp -L 74xx:74LS32 U? +L 74xx:74LS32 U3 U 4 1 5FC54438 P 4800 4950 -F 0 "U?" H 4800 5275 50 0000 C CNN +F 0 "U3" H 4800 5275 50 0000 C CNN F 1 "74LS32" H 4800 5184 50 0000 C CNN -F 2 "" H 4800 4950 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 4800 4950 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 4800 4950 50 0001 C CNN 4 4800 4950 1 0 0 -1 @@ -1005,12 +1001,12 @@ Connection ~ 8400 2700 Wire Wire Line 8400 2700 8600 2700 $Comp -L 74xx:74LS00 U? +L 74xx:74LS00 U2 U 1 1 5FD4E618 P 3850 3500 -F 0 "U?" H 3850 3825 50 0000 C CNN +F 0 "U2" H 3850 3825 50 0000 C CNN F 1 "74LS00" H 3850 3734 50 0000 C CNN -F 2 "" H 3850 3500 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 3850 3500 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74ls00" H 3850 3500 50 0001 C CNN 1 3850 3500 1 0 0 -1 @@ -1021,12 +1017,12 @@ Wire Wire Line 3550 3100 3550 3400 Connection ~ 3600 3100 $Comp -L 74xx:74LS00 U? +L 74xx:74LS00 U2 U 2 1 5FD74B7A P 4650 3500 -F 0 "U?" H 4650 3825 50 0000 C CNN +F 0 "U2" H 4650 3825 50 0000 C CNN F 1 "74LS00" H 4650 3734 50 0000 C CNN -F 2 "" H 4650 3500 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 4650 3500 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74ls00" H 4650 3500 50 0001 C CNN 2 4650 3500 1 0 0 -1 @@ -1058,12 +1054,12 @@ Connection ~ 2700 4100 Wire Wire Line 2700 4100 2700 7200 $Comp -L 74xx:74LS00 U? +L 74xx:74LS00 U2 U 3 1 5FE27921 P 4100 4850 -F 0 "U?" H 4100 5175 50 0000 C CNN +F 0 "U2" H 4100 5175 50 0000 C CNN F 1 "74LS00" H 4100 5084 50 0000 C CNN -F 2 "" H 4100 4850 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 4100 4850 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74ls00" H 4100 4850 50 0001 C CNN 3 4100 4850 1 0 0 -1 @@ -1072,12 +1068,12 @@ Connection ~ 3800 4750 Wire Wire Line 3800 4750 3800 4950 $Comp -L 74xx:74LS00 U? +L 74xx:74LS00 U2 U 4 1 5FE48B46 P 3950 4300 -F 0 "U?" H 3950 4625 50 0000 C CNN +F 0 "U2" H 3950 4625 50 0000 C CNN F 1 "74LS00" H 3950 4534 50 0000 C CNN -F 2 "" H 3950 4300 50 0001 C CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 3950 4300 50 0001 C CNN F 3 "http://www.ti.com/lit/gpn/sn74ls00" H 3950 4300 50 0001 C CNN 4 3950 4300 1 0 0 -1 @@ -1091,4 +1087,197 @@ Text Notes 8500 3000 0 50 ~ 0 Enable on\nR/W high\nA0 low\nDEV_SELECT low Text Notes 4150 2950 0 50 ~ 0 Enable on either\nDEV_SELECT low\nIO_SELECT low +$Comp +L 74xx:74LS00 U2 +U 5 1 5FED8457 +P 7250 5850 +F 0 "U2" H 7480 5896 50 0000 L CNN +F 1 "74LS00" H 7480 5805 50 0000 L CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 7250 5850 50 0001 C CNN +F 3 "http://www.ti.com/lit/gpn/sn74ls00" H 7250 5850 50 0001 C CNN + 5 7250 5850 + 1 0 0 -1 +$EndComp +$Comp +L 74xx:74LS32 U3 +U 5 1 5FEDB516 +P 8000 5850 +F 0 "U3" H 8230 5896 50 0000 L CNN +F 1 "74LS32" H 8230 5805 50 0000 L CNN +F 2 "Package_DIP:DIP-14_W7.62mm" H 8000 5850 50 0001 C CNN +F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 8000 5850 50 0001 C CNN + 5 8000 5850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8000 6350 8300 6350 +Connection ~ 8300 6350 +Wire Wire Line + 8300 6350 8300 4900 +Wire Wire Line + 8000 6350 7700 6350 +Connection ~ 8000 6350 +Wire Wire Line + 8000 5350 7700 5350 +Wire Wire Line + 7250 5350 6900 5350 +Wire Wire Line + 5950 5350 5950 5400 +Connection ~ 7250 5350 +Connection ~ 5950 5400 +Wire Wire Line + 2800 3800 2750 3800 +Wire Wire Line + 2750 3800 2750 4000 +Wire Wire Line + 2750 4000 3400 4000 +Wire Wire Line + 3400 4000 3400 3800 +Wire Wire Line + 3400 3800 3300 3800 +Wire Wire Line + 3300 3700 3450 3700 +Wire Wire Line + 3450 3700 3450 4050 +Wire Wire Line + 3450 4050 2050 4050 +Wire Wire Line + 2050 4050 2050 3700 +Wire Wire Line + 2050 3700 2800 3700 +$Comp +L Device:C C3 +U 1 1 5FB81404 +P 6900 6200 +F 0 "C3" H 7015 6246 50 0000 L CNN +F 1 "C" H 7015 6155 50 0000 L CNN +F 2 "Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm" H 6938 6050 50 0001 C CNN +F 3 "~" H 6900 6200 50 0001 C CNN + 1 6900 6200 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C4 +U 1 1 5FB82906 +P 7700 6200 +F 0 "C4" H 7815 6246 50 0000 L CNN +F 1 "C" H 7815 6155 50 0000 L CNN +F 2 "Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm" H 7738 6050 50 0001 C CNN +F 3 "~" H 7700 6200 50 0001 C CNN + 1 7700 6200 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C2 +U 1 1 5FB849D8 +P 6450 7100 +F 0 "C2" H 6565 7146 50 0000 L CNN +F 1 "C" H 6565 7055 50 0000 L CNN +F 2 "Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm" H 6488 6950 50 0001 C CNN +F 3 "~" H 6450 7100 50 0001 C CNN + 1 6450 7100 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C1 +U 1 1 5FB85911 +P 5300 2600 +F 0 "C1" H 5415 2646 50 0000 L CNN +F 1 "C" H 5415 2555 50 0000 L CNN +F 2 "Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm" H 5338 2450 50 0001 C CNN +F 3 "~" H 5300 2600 50 0001 C CNN + 1 5300 2600 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C5 +U 1 1 5FB8694D +P 9600 2550 +F 0 "C5" H 9715 2596 50 0000 L CNN +F 1 "C" H 9715 2505 50 0000 L CNN +F 2 "Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm" H 9638 2400 50 0001 C CNN +F 3 "~" H 9600 2550 50 0001 C CNN + 1 9600 2550 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C6 +U 1 1 5FB87862 +P 9600 4650 +F 0 "C6" H 9715 4696 50 0000 L CNN +F 1 "C" H 9715 4605 50 0000 L CNN +F 2 "Capacitor_THT:C_Disc_D3.8mm_W2.6mm_P2.50mm" H 9638 4500 50 0001 C CNN +F 3 "~" H 9600 4650 50 0001 C CNN + 1 9600 4650 + 1 0 0 -1 +$EndComp +Connection ~ 9600 2900 +Wire Wire Line + 9600 2900 10650 2900 +Wire Wire Line + 9600 2700 9600 2900 +Wire Wire Line + 10700 1700 9600 1700 +Wire Wire Line + 9100 1250 9700 1250 +Wire Wire Line + 9700 1250 9700 2400 +Wire Wire Line + 9700 2400 9600 2400 +Connection ~ 9700 1250 +Wire Wire Line + 9700 1250 12850 1250 +Wire Wire Line + 9650 3300 9650 4400 +Wire Wire Line + 9650 4400 9600 4400 +Wire Wire Line + 9600 4400 9600 4500 +Connection ~ 9650 3300 +Wire Wire Line + 9650 3300 10600 3300 +Wire Wire Line + 9600 4900 9100 4900 +Wire Wire Line + 9600 4800 9600 4900 +Connection ~ 7700 6350 +Wire Wire Line + 7700 6350 7250 6350 +Wire Wire Line + 7700 6050 7700 5350 +Connection ~ 7700 5350 +Wire Wire Line + 7700 5350 7250 5350 +Wire Wire Line + 7250 6350 6900 6350 +Connection ~ 7250 6350 +Wire Wire Line + 6900 6050 6900 5350 +Connection ~ 6900 5350 +Wire Wire Line + 6900 5350 6750 5350 +Wire Wire Line + 6450 7250 6450 7500 +Connection ~ 6450 7500 +Wire Wire Line + 6450 7500 8300 7500 +Wire Wire Line + 6450 6950 6450 6400 +Wire Wire Line + 6450 6400 6750 6400 +Wire Wire Line + 6750 6400 6750 5350 +Connection ~ 6750 5350 +Wire Wire Line + 6750 5350 5950 5350 +Wire Wire Line + 5150 2900 5300 2900 +Wire Wire Line + 5300 2900 5300 2750 +Connection ~ 5150 2900 +Wire Wire Line + 5300 2450 5400 2450 +Connection ~ 5400 2450 +Wire Wire Line + 5400 2450 5400 3300 $EndSCHEMATC diff --git a/Hardware/Hardware.pretty/Apple II Expansion Edge Connector.kicad_mod b/Hardware/Hardware.pretty/Apple II Expansion Edge Connector.kicad_mod new file mode 100755 index 0000000..3882b71 --- /dev/null +++ b/Hardware/Hardware.pretty/Apple II Expansion Edge Connector.kicad_mod @@ -0,0 +1,214 @@ +(module "Connector:Apple II Expansion Edge Connector" (layer F.Cu) (tedit 5CA41682) + (fp_text reference REF** (at 0 0.5) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value "Apple II Expansion Edge Connector" (at 9.652 -5.08) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "26 GND" (at 45.974 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "27 DMA IN" (at 42.799 11.43 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "28 INT IN" (at 40.386 11.303 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "29 _NMI" (at 38.1 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "30 _IRQ" (at 35.687 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "31 _RES" (at 33.02 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "32 _INH" (at 30.607 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "33 -12V" (at 27.813 11.176 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "34 -5V" (at 25.527 10.922 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "35 N.C." (at 23.368 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "36 7M" (at 20.701 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "37 Q3" (at 18.161 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "38 @1" (at 15.621 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "39 USER 1" (at 12.192 11.43 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "40 @0" (at 10.414 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "41 _DEVICE SELECT" (at 5.334 13.335 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "42 D7" (at 5.461 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "43 D6" (at 2.921 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "44 D5" (at 0.508 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "45 D4" (at -2.159 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "46 D3" (at -4.699 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "47 D2" (at -7.239 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "48 D1" (at -9.906 10.541 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "25 +5V" (at 48.26 -0.635 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "24 DMA OUT" (at 46.609 -1.524 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "23 INT OUT" (at 43.942 -1.397 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "22 _DMA" (at 40.767 -0.762 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "21 RDY" (at 37.973 -0.508 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "20 _I/O STROBE" (at 37.084 -2.413 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "19 N.C." (at 32.893 -0.635 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "18 R/W" (at 30.48 -0.635 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "16 A14" (at 25.273 -0.508 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "17 A15" (at 27.813 -0.508 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "14 A12" (at 20.193 -0.508 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "15 A13" (at 22.733 -0.508 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "13 A11" (at 17.653 -0.508 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "12 A10" (at 15.113 -0.508 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "11 A9" (at 12.319 -0.254 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "10 A8" (at 9.779 -0.254 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer B.Mask) (width 0.15)) + (fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer F.Mask) (width 0.15)) + (fp_text user "50 +12V" (at -15.494 11.43 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "1 _I/O SELECT" (at -11.303 -2.032 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "3 A1" (at -8.128 -0.127 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "5 A3" (at -3.048 0 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "4 A2" (at -5.588 0.127 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "49 D0" (at -12.446 10.668 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "2 A0" (at -10.668 -0.127 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "8 A6" (at 4.445 0 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "6 A4" (at -0.635 0 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "9 A7" (at 6.985 0 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_text user "7 A5" (at 1.905 0 45) (layer F.Fab) + (effects (font (size 0.762 0.762) (thickness 0.127))) + ) + (fp_line (start -15.875 1.27) (end -16.51 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -15.875 7.62) (end -15.875 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 48.895 1.27) (end 49.53 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 48.895 7.62) (end 48.895 1.27) (layer F.SilkS) (width 0.15)) + (pad 50 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 49 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 48 connect roundrect (at -8.89 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 47 connect roundrect (at -6.35 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 46 connect roundrect (at -3.81 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 45 connect roundrect (at -1.27 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 44 connect roundrect (at 1.27 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 43 connect roundrect (at 3.81 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 42 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 41 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 40 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 39 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 37 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 38 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 36 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 35 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 34 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 33 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 32 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 31 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 30 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 29 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 28 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 27 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 26 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25)) + (pad 25 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 24 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 23 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 22 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 21 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 20 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 19 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 18 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 17 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 16 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 15 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 14 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 13 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 12 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 11 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 10 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 9 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 8 connect roundrect (at 3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 7 connect roundrect (at 1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 6 connect roundrect (at -1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 5 connect roundrect (at -3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 4 connect roundrect (at -6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 3 connect roundrect (at -8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 2 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad 1 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) +) diff --git a/Hardware/fp-lib-table b/Hardware/fp-lib-table new file mode 100644 index 0000000..68432e2 --- /dev/null +++ b/Hardware/fp-lib-table @@ -0,0 +1,3 @@ +(fp_lib_table + (lib (name Hardware)(type KiCad)(uri /home/terence/source/Apple2-IO-RPi/Hardware/Hardware.pretty)(options "")(descr "")) +)