mirror of
https://github.com/tjboldt/Apple2-IO-RPi.git
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55c1cb180d
The implemenation is based on a Raspberry Pi Pico - see https://github.com/a2retrosystems/A2retroNET The new hardware type has a simple UART-type interface. Beside the two data registers, there are only the two bits to indicate readability and writability of the data registers.
74 lines
2.5 KiB
C
74 lines
2.5 KiB
C
/*
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MIT License
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Copyright (c) 2022 Oliver Schmidt (https://a2retro.de/)
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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*/
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#include "pico/multicore.h"
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#include "bus.pio.h"
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extern const __attribute__((aligned(4))) uint8_t firmware[];
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static uint32_t __not_in_flash("page") page;
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void __not_in_flash_func(board)() {
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while (true) {
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uint32_t enbl = pio_sm_get_blocking(pio0, sm_enbl);
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uint32_t addr = enbl & 0x0FFF;
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uint32_t io = enbl & 0x0F00; // IOSTRB or IOSEL
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uint32_t strb = enbl & 0x0800; // IOSTRB
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uint32_t read = enbl & 0x1000; // R/W
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if (read) {
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if (!io) {
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switch (addr & 0x7) {
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case 0x3:
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pio_sm_put(pio0, sm_read, !multicore_fifo_rvalid() << 7 |
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!multicore_fifo_wready() << 6);
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break;
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case 0x6:
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pio_sm_put(pio0, sm_read, sio_hw->fifo_rd);
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break;
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}
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} else {
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if (!strb) {
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pio_sm_put(pio0, sm_read, firmware[page | addr]);
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}
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}
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} else {
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uint32_t data = pio_sm_get_blocking(pio0, sm_write);
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if (!io) {
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switch (addr & 0x7) {
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case 0x5:
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sio_hw->fifo_wr = data;
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break;
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case 0x7:
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page = (data & 0x30) << 7;
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break;
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}
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}
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}
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}
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}
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