Merge branch 'master' into 6502

This commit is contained in:
Florian Reitz 2021-04-18 11:27:11 +02:00
commit 06139a74f8
21 changed files with 337 additions and 243 deletions

5
.gitignore vendored
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@ -29,6 +29,7 @@ obj/
[Rr]elease*/ [Rr]elease*/
_ReSharper*/ _ReSharper*/
[Tt]est[Rr]esult* [Tt]est[Rr]esult*
.vs/
*.opendb *.opendb
**/Debug **/Debug
@ -219,3 +220,7 @@ VHDL/_pace\.ucf
VHDL/AppleIISd\.tim VHDL/AppleIISd\.tim
VHDL/AppleIISd\.jed VHDL/AppleIISd\.jed
Firmware/AppleIISd.bin
Software/Flasher.bin

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@ -1,102 +1,102 @@
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@ -11,8 +11,8 @@
</ProjectConfiguration> </ProjectConfiguration>
</ItemGroup> </ItemGroup>
<ItemGroup> <ItemGroup>
<None Include="..\AppleIISd.bin.map" />
<None Include="..\README.md" /> <None Include="..\README.md" />
<None Include="AppleIISd.bin.map" />
<None Include="makefile" /> <None Include="makefile" />
<None Include="Makefile.options" /> <None Include="Makefile.options" />
<None Include="obj\AppleIISd.lst" /> <None Include="obj\AppleIISd.lst" />

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@ -23,7 +23,7 @@
</None> </None>
<None Include="Makefile.options" /> <None Include="Makefile.options" />
<None Include="..\README.md" /> <None Include="..\README.md" />
<None Include="..\AppleIISd.bin.map" /> <None Include="AppleIISd.bin.map" />
</ItemGroup> </ItemGroup>
<ItemGroup> <ItemGroup>
<Filter Include="src"> <Filter Include="src">

5
Firmware/make_image.bat Normal file
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@ -0,0 +1,5 @@
make clean
make OPTIONS=mapfile,listing
java -jar ..\Binary\AppleCommander-ac-1.5.0.jar -d ..\Binary\Flasher.dsk appleiisd.bin
java -jar ..\Binary\AppleCommander-ac-1.5.0.jar -p ..\Binary\Flasher.dsk appleiisd.bin $00 < AppleIISd.bin
copy AppleIISd.bin ..\Binary

7
Firmware/make_image.sh Executable file
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@ -0,0 +1,7 @@
#!/bin/bash
make clean
make OPTIONS=mapfile,listing
java -jar ../Binary/AppleCommander-ac-1.5.0.jar -d ../Binary/Flasher.dsk appleiisd.bin
java -jar ../Binary/AppleCommander-ac-1.5.0.jar -p ../Binary/Flasher.dsk appleiisd.bin $00 < AppleIISd.bin
cp AppleIISd.bin ../Binary/

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@ -1,10 +1,10 @@
;******************************* ;*******************************
; ;
; Apple][Sd Firmware ; Apple][Sd Firmware
; Version 1.2 ; Version 1.2.2
; Defines ; Defines
; ;
; (c) Florian Reitz, 2017 - 2018 ; (c) Florian Reitz, 2017 - 2021
; ;
; X register usually contains SLOT16 ; X register usually contains SLOT16
; Y register is used for counting or SLOT ; Y register is used for counting or SLOT
@ -44,11 +44,9 @@ DRVNUM := $0678
CURSLOT := $07F8 ; $Cs CURSLOT := $07F8 ; $Cs
; Rom equates ; Rom equates
KNOWNRTS := $FF58
OAPPLE := $C061 ; open apple key OAPPLE := $C061 ; open apple key
DATA := $C080 DATA := $C080
CTRL := DATA+1 CTRL := DATA+1
DIV := DATA+2
SS := DATA+3 SS := DATA+3
; Constants ; Constants
@ -60,7 +58,7 @@ SS0 = $01 ; SS register
SDHC = $10 SDHC = $10
WP = $20 WP = $20
CD = $40 CD = $40
INITED = $80 CARD_INIT = $80
SMDRIVERVER = $120B ; Version 1.2 Beta SMDRIVERVER = $120B ; Version 1.2 Beta

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@ -1,22 +1,25 @@
;******************************* ;*******************************
; ;
; Apple][Sd Firmware ; Apple][Sd Firmware
; Version 1.2.1 ; Version 1.2.3
; Main source ; Main source
; ;
; (c) Florian Reitz, 2017 - 2018 ; (c) Florian Reitz, 2017 - 2021
; ;
; X register usually contains SLOT16 ; X register usually contains SLOT16
; Y register is used for counting or SLOT ; Y register is used for counting or SLOT
; ;
;******************************* ;*******************************
.export INIT
.import PRODOS .import PRODOS
.import SMARTPORT .import SMARTPORT
.import GETR1 .import GETR1
.import GETR3 .import GETR3
.import SDCMD .import SDCMD
.import CARDDET .import CARDDET
.import INITED
.import READ .import READ
.include "AppleIISd.inc" .include "AppleIISd.inc"
@ -54,25 +57,23 @@
LDX #$00 LDX #$00
LDX #$03 LDX #$03
LDX #$00 ; is Smartport controller LDX #$00 ; is Smartport controller
;LDX #$3C ; is a disk controller
SEI ; find slot SEI ; find slot
LDA #$60 ; opcode for RTS BIT $CFFF
STA SLOT JSR KNOWNRTS
JSR SLOT
TSX TSX
LDA $0100,X LDA $0100,X
CLI CLI
STA CURSLOT ; $Cs STA CURSLOT ; $Cs
AND #$0F AND #$0F
STA SLOT ; $0s STA SLOT ; $0s
TAY ; Y holds now SLOT
ASL A ASL A
ASL A ASL A
ASL A ASL A
ASL A ASL A
STA SLOT16 ; $s0 STA SLOT16 ; $s0
TAX ; X holds now SLOT16 TAX ; X holds now SLOT16
BIT $CFFF
LDY #0 ; display copyright message LDY #0 ; display copyright message
@DRAW: LDA TEXT,Y @DRAW: LDA TEXT,Y
@ -102,7 +103,6 @@
JMP (CMDLO) JMP (CMDLO)
@INIT: JSR INIT @INIT: JSR INIT
CMP #NO_ERR
BNE @NEXTSLOT ; init not successful BNE @NEXTSLOT ; init not successful
;******************************* ;*******************************
@ -170,9 +170,8 @@ DRIVER: CLC ; ProDOS entry
; Has this to be done every time this gets called or only on boot??? ; Has this to be done every time this gets called or only on boot???
SEI SEI
LDA #$60 ; opcode for RTS BIT $CFFF
STA SLOT JSR KNOWNRTS
JSR SLOT
TSX TSX
LDA $0100,X LDA $0100,X
CLI CLI
@ -186,18 +185,9 @@ DRIVER: CLC ; ProDOS entry
ASL A ASL A
STA SLOT16 ; $s0 STA SLOT16 ; $s0
TAX ; X holds now SLOT16 TAX ; X holds now SLOT16
BIT $CFFF
JMP DRIVEREXT
.segment "EXTROM" JSR INITED ; check for init
DRIVEREXT: JSR CARDDET BCC @DISP
BCC @INITED
LDA #ERR_OFFLINE; no card inserted
BCS @END
@INITED: LDA #INITED ; check for init
AND SS,X
BNE @DISP
JSR INIT JSR INIT
BCS @END ; Init failed BCS @END ; Init failed
@ -285,13 +275,16 @@ DRIVEREXT: JSR CARDDET
; ;
;******************************* ;*******************************
INIT: LDA #$03 ; set SPI mode 3 .segment "EXTROM"
STA CTRL,X INIT:
LDA SS,X .IFPC02
ORA #SS0 ; set CS high STZ CTRL,X ; reset SPI controller
.ELSE
LDA #0
STA CTRL,X
.ENDIF
LDA #SS0 ; set CS high
STA SS,X STA SS,X
LDA #7 ; set 400 kHz
STA DIV,X
LDY #10 LDY #10
LDA #DUMMY LDA #DUMMY
@ -405,7 +398,7 @@ INIT: LDA #$03 ; set SPI mode 3
BNE @IOERROR ; error! BNE @IOERROR ; error!
@END: LDA SS,X @END: LDA SS,X
ORA #INITED ; initialized ORA #CARD_INIT ; initialized
STA SS,X STA SS,X
LDA CTRL,X LDA CTRL,X
ORA #ECE ; enable 7MHz ORA #ECE ; enable 7MHz
@ -419,13 +412,13 @@ INIT: LDA #$03 ; set SPI mode 3
@END1: LDA SS,X ; set CS high @END1: LDA SS,X ; set CS high
ORA #SS0 ORA #SS0
STA SS,X STA SS,X
LDA #0 ; set div to 2
STA DIV,X
TYA ; retval in A TYA ; retval in A
RTS KNOWNRTS: RTS
TEXT: .asciiz " Apple][Sd v1.2.2 (c)2019 Florian Reitz " TEXT: .asciiz " Apple][Sd v1.2.3 (c)2021 Florian Reitz"
.assert(*-TEXT)=40, error, "TEXT must be 40 bytes long"
CMD0: .byt $40, $00, $00 CMD0: .byt $40, $00, $00
.byt $00, $00, $95 .byt $00, $00, $95

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@ -1,23 +1,25 @@
;******************************* ;*******************************
; ;
; Apple][Sd Firmware ; Apple][Sd Firmware
; Version 1.2 ; Version 1.2.3
; Helper functions ; Helper functions
; ;
; (c) Florian Reitz, 2017 - 2018 ; (c) Florian Reitz, 2017 - 2021
; ;
; X register usually contains SLOT16 ; X register usually contains SLOT16
; Y register is used for counting or SLOT ; Y register is used for counting or SLOT
; ;
;******************************* ;*******************************
.export COMMAND
.export SDCMD .export SDCMD
.export GETBLOCK
.export CARDDET
.export WRPROT
.export GETR1 .export GETR1
.export GETR3 .export GETR3
.export GETBLOCK
.export COMMAND
.export CARDDET
.export WRPROT
.export INITED
.include "AppleIISd.inc" .include "AppleIISd.inc"
.segment "EXTROM" .segment "EXTROM"
@ -275,3 +277,23 @@ WRPROT: PHA
SEC SEC
@DONE: PLA @DONE: PLA
RTS RTS
;*******************************
;
; Check if card is initialized
; X must contain SLOT16
;
; C Clear - card initialized
; Set - card not initialized
;
;*******************************
INITED: PHA
LDA #CARD_INIT ; 0: card not initialized
AND SS,X ; 1: card initialized
CLC
BNE @DONE
SEC
@DONE: PLA
RTS

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@ -1,10 +1,10 @@
;******************************* ;*******************************
; ;
; Apple][Sd Firmware ; Apple][Sd Firmware
; Version 1.2 ; Version 1.2.3
; ProDOS functions ; ProDOS functions
; ;
; (c) Florian Reitz, 2017 - 2018 ; (c) Florian Reitz, 2017 - 2021
; ;
; X register usually contains SLOT16 ; X register usually contains SLOT16
; Y register is used for counting or SLOT ; Y register is used for counting or SLOT
@ -19,6 +19,9 @@
.import COMMAND .import COMMAND
.import SDCMD .import SDCMD
.import GETBLOCK .import GETBLOCK
.import CARDDET
.import INITED
.import INIT
.import WRPROT .import WRPROT
.import GETR1 .import GETR1
.import GETR3 .import GETR3
@ -67,6 +70,7 @@ PRODOS: LDA DCMD ; get command
; C Clear - No error ; C Clear - No error
; Set - Error ; Set - Error
; A $00 - No error ; A $00 - No error
; $28 - No card inserted
; $2B - Card write protected ; $2B - Card write protected
; X - Blocks avail (low byte) ; X - Blocks avail (low byte)
; Y - Blocks avail (high byte) ; Y - Blocks avail (high byte)
@ -74,7 +78,12 @@ PRODOS: LDA DCMD ; get command
;******************************* ;*******************************
STATUS: LDA #NO_ERR ; Thanks for this one, Antoine! STATUS: LDA #NO_ERR ; Thanks for this one, Antoine!
JSR WRPROT JSR CARDDET
BCC @WRPROT
LDA #ERR_NODRIVE; no card inserted
BNE @DONE
@WRPROT: JSR WRPROT
BCC @DONE BCC @DONE
LDA #ERR_NOWRITE; card write protected LDA #ERR_NOWRITE; card write protected
@ -94,10 +103,20 @@ STATUS: LDA #NO_ERR ; Thanks for this one, Antoine!
; Set - Error ; Set - Error
; A $00 - No error ; A $00 - No error
; $27 - Bad block number ; $27 - Bad block number
; $28 - No card inserted
; ;
;******************************* ;*******************************
READ: JSR GETBLOCK ; calc block address READ: JSR CARDDET ; check for card
BCS @NDERROR ; no card
JSR INITED ; check for initialization
BCC @GETBLOCK
JSR INIT ; initialize card
BCS @NDERROR ; init failed
@GETBLOCK: JSR GETBLOCK ; calc block address
LDA SS,X ; enable /CS LDA SS,X ; enable /CS
AND #<~SS0 AND #<~SS0
@ -105,7 +124,7 @@ READ: JSR GETBLOCK ; calc block address
LDA #$51 ; send CMD17 LDA #$51 ; send CMD17
JSR COMMAND ; send command JSR COMMAND ; send command
CMP #0 CMP #0
BNE @ERROR ; check for error BNE @IOERROR ; check for error
@GETTOK: LDA #DUMMY ; get data token @GETTOK: LDA #DUMMY ; get data token
STA DATA,X STA DATA,X
@ -150,10 +169,14 @@ READ: JSR GETBLOCK ; calc block address
PLP PLP
RTS RTS
@ERROR: SEC ; an error occured @IOERROR: SEC ; an error occured
LDA #ERR_IOERR LDA #ERR_IOERR
BCS @DONE BCS @DONE
@NDERROR: SEC ; an error occured
LDA #ERR_NODRIVE
BCS @DONE
;******************************* ;*******************************
; ;

Binary file not shown.

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@ -26,15 +26,13 @@ The AppleIISd requires an enhanced IIe or IIgs computer. The ROM code uses some
* Apple IIe enhanced, 128k, Prodos 1.9 * Apple IIe enhanced, 128k, Prodos 1.9
* Apple IIe enhanced, 64k, Prodos 1.9 * Apple IIe enhanced, 64k, Prodos 1.9
When a 2732 type ROM is used, the binary image has to be programmed at offset 0x800, because A11 is always high for compatibility with 2716 type ROMs.
## Binary distribution ## Binary distribution
The following files in [Binary/](Binary) have been provided to eliminate the need to compile assembler or VHDL sources. The following files in [Binary/](Binary) have been provided to eliminate the need to compile assembler or VHDL sources.
| File | Purpose | | File | Purpose |
| ---- | ------- | | ---- | ------- |
| AppleIISd_xx44.jed | CPLD bitfiles for PC44 and VQ44 formfactors | | AppleIISd_xx44.jed | CPLD bitfiles for PC44 and VQ44 formfactors |
| AppleIIDs.bin | 2k Firmware binary for EPROM | | AppleIISd.bin | 2k Firmware binary for EPROM |
| AppleIISd.hex | Same as above in INTEL-HEX format | | AppleIISd.hex | Same as above in INTEL-HEX format |
| AppleIISd.bom.txt | BOM for the board | | AppleIISd.bom.txt | BOM for the board |
| AppleIISd.pdf | Schematic and layout | | AppleIISd.pdf | Schematic and layout |
@ -112,6 +110,8 @@ The control registers of the *AppleIISd* are mapped to the usual I/O space at **
**DATA** SPI data register - Is used for both input and output. When the register is written to, the controller will output the byte on the SPI bus. When it is read from, it reflects the data that was received over the SPI bus. **DATA** SPI data register - Is used for both input and output. When the register is written to, the controller will output the byte on the SPI bus. When it is read from, it reflects the data that was received over the SPI bus.
**PGMEN** Program Enable - Enable programing of the internal firmware eeprom. Should be reset immediately after writing to the device.
**ECE** External Clock Enable - This bit enables the the external clock input to the SPI controller. In the *AppleIISd*, this effectively switches the SPI clock between 500kHz (ECE = 0) and 3.5MHz (ECE = 1). **ECE** External Clock Enable - This bit enables the the external clock input to the SPI controller. In the *AppleIISd*, this effectively switches the SPI clock between 500kHz (ECE = 0) and 3.5MHz (ECE = 1).
**FRX** Fast Receive mode - When set to 1, fast receive mode triggers shifting upon reading or writing the SPI Data register. When set to 0, shifting is only triggered by writing the SPI data register. **FRX** Fast Receive mode - When set to 1, fast receive mode triggers shifting upon reading or writing the SPI Data register. When set to 0, shifting is only triggered by writing the SPI data register.
@ -133,10 +133,10 @@ The control registers of the *AppleIISd* are mapped to the usual I/O space at **
## TODOs ## TODOs
* Much more testing * Much more testing
* Enable more than 4 volumes under GS/OS * Enable more than 4 volumes under GS/OS
* Support for 6502 CPUs * Support for 6502 CPUs
* Support for CP/M
## Known Bugs ## Known Bugs
* Does not work with some Z80 cards present
* Programs not startable from partitions 3 and 4 under ProDOS * Programs not startable from partitions 3 and 4 under ProDOS

View File

@ -1,3 +1,5 @@
make clean
make make
java -jar AppleCommander-ac-1.5.0.jar -d flasher.dsk %~n1 java -jar ..\Binary\AppleCommander-ac-1.5.0.jar -d ..\Binary\Flasher.dsk flasher
java -jar AppleCommander-ac-1.5.0.jar -as flasher.dsk %~n1 < %1 java -jar ..\Binary\AppleCommander-ac-1.5.0.jar -as ..\Binary\Flasher.dsk flasher < Flasher.bin
copy Flasher.bin ..\Binary

7
Software/make_image.sh Executable file
View File

@ -0,0 +1,7 @@
#!/bin/bash
make clean
make
java -jar ../Binary/AppleCommander-ac-1.5.0.jar -d ../Binary/Flasher.dsk flasher
java -jar ../Binary/AppleCommander-ac-1.5.0.jar -as ../Binary/Flasher.dsk flasher < Flasher.bin
cp Flasher.bin ../Binary/

View File

@ -6,16 +6,20 @@ typedef unsigned short uint16;
typedef unsigned long uint32; typedef unsigned long uint32;
typedef unsigned char boolean; typedef unsigned char boolean;
#ifndef TRUE
#define TRUE 1 #define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0 #define FALSE 0
#endif
#define SLOT_IO_START (uint8*)0xC080 #define SLOT_IO_START (volatile uint8*)0xC080
#define SLOT_ROM_START (uint8*)0xC000 #define SLOT_ROM_START (volatile uint8*)0xC000
#define EXT_ROM_START (uint8*)0xC800 #define EXT_ROM_START (volatile uint8*)0xC800
#define CFFF (uint8*)0xCFFF #define CFFF (volatile uint8*)0xCFFF
typedef struct typedef volatile struct
{ {
// data register // data register
// +0 // +0
@ -40,12 +44,9 @@ typedef struct
uint8 status; uint8 status;
} status; } status;
// clock divisor register // clock divisor register, unused
// +2 // +2
union uint8 clkDiv;
{
unsigned clkDiv : 2;
};
// slave select and card state register // slave select and card state register
// +3 // +3
@ -56,8 +57,8 @@ typedef struct
unsigned slaveSel : 1; unsigned slaveSel : 1;
unsigned : 3; unsigned : 3;
unsigned sdhc : 1; unsigned sdhc : 1;
unsigned wp : 1; const unsigned wp : 1;
unsigned card : 1; const unsigned card : 1;
unsigned inited : 1; unsigned inited : 1;
}; };

View File

@ -1,10 +1,14 @@
#include "AppleIISd.h" #include "AppleIISd.h"
#include <assert.h>
#include <stdio.h> #include <stdio.h>
#include <errno.h> #include <errno.h>
#include <conio.h> #include <conio.h>
#include <string.h>
#include <apple2enh.h> #include <apple2enh.h>
// Binary can't be larger than 2k
#define BUFFER_SIZE 2048
#define BIN_FILE_NAME "AppleIISd.bin" #define BIN_FILE_NAME "AppleIISd.bin"
typedef enum typedef enum
@ -14,33 +18,33 @@ typedef enum
STATE_2, // hyphen STATE_2, // hyphen
STATE_3, // backslash STATE_3, // backslash
STATE_LAST // don't use STATE_LAST // don't use
} STATE_CURSOR_T; } STATE_CURSOR_T;
const char state_char[STATE_LAST] = { '|', '/', '-', '\\' }; const char state_char[STATE_LAST] = { '|', '/', '-', '\\' };
static uint8 buffer[BUFFER_SIZE];
static void writeChip(const uint8* pSource, volatile uint8* pDest, uint16 length);
boolean writeChip(const uint8* pSource, uint8* pDest, uint16 length); static boolean verifyChip(const uint8* pSource, volatile uint8* pDest, uint16 length);
void printStatus(uint8 percentage); static void printStatus(uint8 percentage);
// Binary can't be larger than 2k
uint8 buffer[2048] = { 0 };
int main() int main()
{ {
int retval = 0; int retval = 1;
FILE* pFile; FILE* pFile;
char slotNum; char slotNum;
boolean erase = FALSE;
uint16 fileSize = 0;
APPLE_II_SD_T* pAIISD = (APPLE_II_SD_T*)SLOT_IO_START; APPLE_II_SD_T* pAIISD;
uint8* pSlotRom = SLOT_ROM_START; volatile uint8* pSlotRom = SLOT_ROM_START;
uint8* pExtRom = EXT_ROM_START; volatile uint8 dummy;
videomode(VIDEOMODE_40COL); videomode(VIDEOMODE_40COL);
clrscr(); clrscr();
cprintf("AppleIISd firmware flasher\r\n"); cprintf("AppleIISd firmware flasher V1.2\r\n");
cprintf("(c) 2019 Florian Reitz\r\n\r\n"); cprintf("(c) 2019-2020 Florian Reitz\r\n\r\n");
// ask for slot // ask for slot
cursor(1); // enable blinking cursor cursor(1); // enable blinking cursor
cprintf("Slot number (1-7): "); cprintf("Slot number (1-7): ");
@ -48,6 +52,18 @@ int main()
slotNum -= 0x30; slotNum -= 0x30;
cursor(0); // disable blinking cursor cursor(0); // disable blinking cursor
if(slotNum == 0)
{
// erase device
erase = TRUE;
// ask for slot
cursor(1); // enable blinking cursor
cprintf("Erase device in slot number (1-7): ");
cscanf("%c", &slotNum);
slotNum -= 0x30;
cursor(0); // disable blinking cursor
}
// check if slot is valid // check if slot is valid
if((slotNum < 1) || (slotNum > 7)) if((slotNum < 1) || (slotNum > 7))
{ {
@ -55,98 +71,118 @@ int main()
cgetc(); cgetc();
return 1; // failure return 1; // failure
} }
((uint8*)pAIISD) += slotNum << 4; pAIISD = (APPLE_II_SD_T*)(SLOT_IO_START + (slotNum << 4));
pSlotRom += slotNum << 8; pSlotRom += slotNum << 8;
// open file if(erase)
pFile = fopen(BIN_FILE_NAME, "rb");
if(pFile)
{ {
// read buffer fileSize = BUFFER_SIZE;
uint16 fileSize = fread(buffer, 1, sizeof(buffer), pFile); memset(buffer, 0, sizeof(buffer));
fclose(pFile);
pFile = NULL;
if(fileSize == 2048)
{
// enable write
pAIISD->status.pgmen = 1;
// clear 0xCFFF
*CFFF = 0;
// write to SLOTROM
cprintf("\r\n\r\nFlashing SLOTROM: ");
if(writeChip(buffer, pSlotRom, 256))
{
// write to EXTROM
cprintf("\r\nFlashing EXTROM: ");
if(writeChip(buffer + 256, pExtRom, fileSize - 256))
{
cprintf("\r\n\r\n\aFlashing finished!\n");
}
else
{
retval = 1;
}
}
else
{
retval = 1;
}
// disable write
pAIISD->status.pgmen = 0;
}
else
{
cprintf("\r\nWrong file size: %d\r\n", fileSize);
retval = 1;
}
} }
else else
{ {
cprintf("\r\nCan't open %s file\r\n", BIN_FILE_NAME); // open file
retval = 1; pFile = fopen(BIN_FILE_NAME, "rb");
if(pFile)
{
// read buffer
fileSize = fread(buffer, 1, sizeof(buffer), pFile);
fclose(pFile);
pFile = NULL;
if(fileSize != BUFFER_SIZE)
{
cprintf("\r\nWrong file size: %d\r\n", fileSize);
}
}
else
{
cprintf("\r\nCan't open %s file\r\n", BIN_FILE_NAME);
fileSize = 0;
}
}
if(fileSize == BUFFER_SIZE)
{
// enable write
pAIISD->status.pgmen = 1;
// write to SLOTROM
cprintf("\r\n\r\nFlashing SLOTROM: ");
writeChip(buffer, pSlotRom, 256);
cprintf("\r\nVerifying SLOTROM: ");
if(verifyChip(buffer, pSlotRom, 256))
{
// write to EXT_ROM
cprintf("\r\n\r\nFlashing EXTROM: ");
// clear CFFF and dummy read to enable correct EXT_ROM
dummy = *CFFF;
dummy = *pSlotRom;
writeChip(buffer + 256, EXT_ROM_START, fileSize - 256);
cprintf("\r\nVerifying EXTROM: ");
dummy = *CFFF;
dummy = *pSlotRom;
if(verifyChip(buffer + 256, EXT_ROM_START, fileSize - 256))
{
cprintf("\r\n\r\nFlashing finished!\n");
retval = 0;
}
}
// disable write
pAIISD->status.pgmen = 0;
} }
cgetc(); cgetc();
return retval; return retval;
} }
boolean writeChip(const uint8* pSource, uint8* pDest, uint16 length) static void writeChip(const uint8* pSource, volatile uint8* pDest, uint16 length)
{ {
uint32 i; uint32 i;
uint8 data = 0; volatile uint8 readData;
for(i=0; i<length; i++) for(i=0; i<length; i++)
{ {
// set 0 if no source pDest[i] = pSource[i];
if(pSource)
{
data = pSource[i];
}
*pDest = data;
// use print as writecycle
printStatus((i * 100u / length) + 1); printStatus((i * 100u / length) + 1);
if(*pDest != data) // wait for write cycle
do
{
readData = pDest[i];
}
while((readData & 0x80) != (pSource[i] & 0x80));
}
}
static boolean verifyChip(const uint8* pSource, volatile uint8* pDest, uint16 length)
{
uint32 i;
for(i=0; i<length; i++)
{
printStatus((i * 100u / length) + 1);
if(pDest[i] != pSource[i])
{ {
// verification not successful // verification not successful
cprintf("\r\n\r\n!!! Flashing failed at %p !!!\r\n", pDest); cprintf("\r\n\r\n!!! Verification failed at %p !!!\r\n", &pDest[i]);
cprintf("Was 0x%02hhX, should be 0x%02hhX\r\n", pDest[i], pSource[i]);
return FALSE; return FALSE;
} }
pDest++;
} }
return TRUE; return TRUE;
} }
void printStatus(uint8 percentage) static void printStatus(uint8 percentage)
{ {
static STATE_CURSOR_T state = STATE_0; static STATE_CURSOR_T state = STATE_0;
uint8 wait = 0; uint8 wait = 0;
@ -156,11 +192,6 @@ void printStatus(uint8 percentage)
cprintf("% 3hhu%% %c", percentage, cState); cprintf("% 3hhu%% %c", percentage, cState);
gotox(x); gotox(x);
while(wait < 0xff)
{
wait++;
}
state++; state++;
if(state == STATE_LAST) if(state == STATE_LAST)
{ {