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https://github.com/freitz85/AppleIISd.git
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inited flag in fpga
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parent
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BIN
AppleIISd.bin
BIN
AppleIISd.bin
Binary file not shown.
1490
AppleIISd.lst
1490
AppleIISd.lst
File diff suppressed because it is too large
Load Diff
62
AppleIISd.s
62
AppleIISd.s
@ -37,15 +37,16 @@ R30 = $0478
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R31 = $04F8
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R32 = $0578
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R33 = $05F8
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INITED = $0678
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* Constants
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SSNONE = $0F
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SS0 = $0E
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DUMMY = $FF
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FRXEN = $17
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FRXDIS = $07
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FRX = $10 ; CTRL register
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ECE = $04
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SS0 = $01 ; SS register
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WP = $20
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CARDDET = $40
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INITED = $80
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* signature bytes
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@ -191,10 +192,10 @@ DRIVER CLD
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TAX ; X holds now SLOT16
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BIT $CFFF
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LDY SLOT
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LDA INITED,Y ; check for init
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CMP #$01
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BCC :INIT
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LDA #INITED ; check for init
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BIT SS,X
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BEQ :INIT
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:CMD LDA $42 ; get command
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CMP #$00
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BEQ :STATUS
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@ -240,7 +241,8 @@ DRIVER CLD
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INIT CLD
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LDA #$03 ; set SPI mode 3
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STA CTRL,X
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LDA #SSNONE
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LDA SS,X
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ORA #SS0 ; set CS high
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STA SS,X
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LDA #7
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STA DIV,X
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@ -252,7 +254,8 @@ INIT CLD
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BPL :WAIT
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DEY
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BNE :LOOP ; do 10 times
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LDA #SS0 ; set CS low
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LDA SS,X
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AND #$FF!SS0 ; set CS low
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STA SS,X
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LDA #<CMD0 ; send CMD0
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@ -336,8 +339,12 @@ INIT CLD
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BNE :IOERROR ; error!
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:END LDY SLOT
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LDA #$01
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STA INITED,Y ; initialized
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LDA SS,X
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ORA #INITED ; initialized
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STA SS,X
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LDA CTRL,X
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ORA #ECE ; enable 7MHz
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STA CTRL,X
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CLC ; all ok
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LDY #0
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BCC :END1
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@ -346,10 +353,9 @@ INIT CLD
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BCS :END1
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:IOERROR SEC
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LDY #$27 ; init error
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:END1 LDA #SSNONE ; deselect card
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:END1 LDA SS,X ; set CS high
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ORA #SS0
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STA SS,X
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LDA #7 ; enable 7MHz
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STA CTRL,X
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LDA #0 ; set div to 2
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STA DIV,X
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TYA ; retval in A
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@ -535,7 +541,8 @@ STATUS CLC ; no error
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READ JSR BLOCK ; calc block address
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LDA #SS0 ; enable /CS
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LDA SS,X ; enable /CS
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AND #$FF!SS0
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STA SS,X
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LDA #$51 ; send CMD17
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JSR COMMAND ; send command
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@ -550,7 +557,8 @@ READ JSR BLOCK ; calc block address
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BNE :GETTOK ; wait for $FE
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LDY #2 ; read data from card
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LDA #FRXEN ; enable FRX
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LDA CTRL,X ; enable FRX
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ORA #FRX
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STA CTRL,X
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LDA #DUMMY
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STA DATA,X
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@ -565,19 +573,22 @@ READ JSR BLOCK ; calc block address
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DEY
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BNE :LOOPY
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LDA #FRXDIS ; disable FRX
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LDA CTRL,X ; disable FRX
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AND #$FF!FRX
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STA CTRL,X
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:CRC LDA #DUMMY ; first crc byte has
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STA DATA,X ; already been read
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LDA #SSNONE
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LDA SS,X
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ORA #SS0
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STA SS,X ; disable /CS
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CLC ; no error
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LDA #$00
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RTS
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:ERROR LDA #SSNONE
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:ERROR LDA SS,X
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ORA #SS0
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STA SS,X ; disable /CS
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SEC ; an error occured
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LDA #$27
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@ -604,7 +615,8 @@ READ JSR BLOCK ; calc block address
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WRITE JSR BLOCK ; calc block address
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LDA #SS0 ; enable /CS
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LDA SS,X ; enable /CS
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AND #$FF!SS0
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STA SS,X
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LDA #$58 ; send CMD24
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JSR COMMAND ; send command
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@ -644,7 +656,8 @@ WRITE JSR BLOCK ; calc block address
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CMP #$00
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BEQ :WAIT6
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LDA #SSNONE ; disable /CS
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LDA SS,X ; disable /CS
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ORA #SS0
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STA SS,X
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CLC ; no error
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LDA #0
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@ -656,7 +669,8 @@ WRITE JSR BLOCK ; calc block address
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CMP #$00
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BEQ :ERROR
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LDA #SSNONE
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LDA SS,X
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ORA #SS0
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STA SS,X ; disable /CS
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SEC ; an error occured
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LDA #$27
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