diff --git a/SPI6502B.ucf b/SPI6502B.ucf index 29233d9..d030ba8 100644 --- a/SPI6502B.ucf +++ b/SPI6502B.ucf @@ -18,22 +18,13 @@ NET "cpu_Nphi2" LOC = "P5" ; NET "cpu_Nres" LOC = "P19" ; NET "cpu_rnw" LOC = "P7" ; NET "cs1" LOC = "P20" ; -NET "diag" LOC = "P29" ; +NET "led" LOC = "P29" ; NET "extclk" LOC = "P6" ; NET "Ncs2" LOC = "P18" ; -NET "spi_int<0>" LOC = "P42" ; -NET "spi_int<1>" LOC = "P40" ; -NET "spi_int<2>" LOC = "P39" ; -NET "spi_int<3>" LOC = "P1" ; -NET "spi_miso<0>" LOC = "P44" ; -NET "spi_miso<1>" LOC = "P43" ; -NET "spi_miso<2>" LOC = "P38" ; -NET "spi_miso<3>" LOC = "P37" ; +NET "spi_int" LOC = "P42" ; +NET "spi_miso" LOC = "P44" ; NET "spi_mosi" LOC = "P35" ; -NET "spi_Nsel<0>" LOC = "P28" ; -NET "spi_Nsel<1>" LOC = "P27" ; -NET "spi_Nsel<2>" LOC = "P26" ; -NET "spi_Nsel<3>" LOC = "P25" ; +NET "spi_Nsel" LOC = "P28" ; NET "spi_sclk" LOC = "P34" ; #PACE: Start of PACE Area Constraints diff --git a/SPI6502B1.1.vhd b/SPI6502B1.1.vhd index e1f02a9..e94ed6d 100644 --- a/SPI6502B1.1.vhd +++ b/SPI6502B1.1.vhd @@ -55,12 +55,12 @@ entity SPI6502B is cs1 : in STD_LOGIC; Ncs2 : in STD_LOGIC; extclk : in STD_LOGIC; - spi_miso: in std_logic_vector (3 downto 0); + spi_miso: in std_logic; spi_mosi : out STD_LOGIC; spi_sclk : out STD_LOGIC; - spi_Nsel : out STD_LOGIC_VECTOR (3 downto 0); - spi_int : in STD_LOGIC_VECTOR (3 downto 0); - diag : out std_logic + spi_Nsel : out STD_LOGIC; + spi_int : in STD_LOGIC; + led : out std_logic ); constant DIV_WIDTH : integer := 3; @@ -99,9 +99,9 @@ architecture Behavioral of SPI6502B is signal divisor: std_logic_vector(DIV_WIDTH-1 downto 0); - signal slavesel: std_logic_vector(3 downto 0); -- slave select output (0=selected) - signal slaveinten: std_logic_vector(3 downto 0); -- slave interrupt enable (1=enabled) - signal slaveint: std_logic_vector (3 downto 0); -- slave interrupt inputs + signal slavesel: std_logic; -- slave select output (0=selected) + signal slaveinten: std_logic; -- slave interrupt enable (1=enabled) + signal slaveint: std_logic; -- slave interrupt inputs -------------------------- -- helper signals @@ -120,7 +120,7 @@ architecture Behavioral of SPI6502B is begin - diag <= not (bsy or not slavesel(0)); --'0'; --shifting2; --shiftdone; --shiftcnt(2); + led <= not (bsy or not slavesel); --'0'; --shifting2; --shiftdone; --shiftcnt(2); -------------------------- @@ -250,10 +250,7 @@ begin -------------------------- -- interrupt generation int_out <= spiint - or (slaveint(0) and slaveinten(0)) - or (slaveint(1) and slaveinten(1)) - or (slaveint(2) and slaveinten(2)) - or (slaveint(3) and slaveinten(3)); + or (slaveint and slaveinten); -------------------------- -- interface section @@ -264,11 +261,7 @@ begin int_din <= cpu_d; slaveint <= not(spi_int); -- active low interrupt inputs - int_miso <= - (spi_miso(0) and not(slavesel(0))) - or (spi_miso(1) and not(slavesel(1))) - or (spi_miso(2) and not(slavesel(2))) - or (spi_miso(3) and not(slavesel(3))); + int_miso <= (spi_miso and not slavesel); -- outputs cpu_d <= int_dout when (is_read='1') else (others => 'Z'); -- data bus tristate @@ -314,10 +307,13 @@ begin when "10" => -- read sclk divisor int_dout(DIV_WIDTH-1 downto 0) <= divisor; int_dout(3) <= '0'; - int_dout(7 downto 4) <= slaveint; + int_dout(4) <= slaveint; + int_dout(7 downto 5) <= (others => '0'); when "11" => -- read slave select / slave interrupt state - int_dout(3 downto 0) <= slavesel; - int_dout(7 downto 4) <= slaveinten; + int_dout(0) <= slavesel; + int_dout(3 downto 1) <= (others => '0'); + int_dout(4) <= slaveinten; + int_dout(7 downto 5) <= (others => '0'); when others => int_dout <= (others => '0'); end case; @@ -336,8 +332,8 @@ begin tmo <= '0'; frx <= '0'; ier <= '0'; - slavesel <= (others => '1'); - slaveinten <= (others => '0'); + slavesel <= '1'; + slaveinten <= '0'; divisor <= (others => '0'); elsif (falling_edge(selected) and cpu_rnw = '0') then --elsif (falling_edge(cpu_phi2) and selected='1' and cpu_rnw='0') then @@ -356,8 +352,8 @@ begin when "10" => -- write divisor divisor <= int_din(DIV_WIDTH-1 downto 0); when "11" => -- write slave select / slave interrupt enable - slavesel <= int_din(3 downto 0); - slaveinten <= int_din(7 downto 4); + slavesel <= int_din(0); + slaveinten <= int_din(4); when others => end case; end if; diff --git a/_ngo/netlist.lst b/_ngo/netlist.lst index 0956acd..20f8fc8 100644 --- a/_ngo/netlist.lst +++ b/_ngo/netlist.lst @@ -1,2 +1,2 @@ -C:\sources\AppleIISd\spi6502b.ngc 1494084468 +C:\sources\AppleIISd\spi6502b.ngc 1494085672 OK diff --git a/spi65.dhp b/spi65.dhp index 769350c..dccbe65 100644 --- a/spi65.dhp +++ b/spi65.dhp @@ -1,3 +1,3 @@ XILINX-XDB 0.1 STUB 0.1 ASCII XILINX-XDM V1.2e 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4e=82.:?7<>;%36>5=#9o0;7)?j:89L57<73F;=6=5@5082xd3i3:1<7>50zl66?`anolmjk5ac;034>I4:3:0C>;52zL5g<73th=97>50;294~h2:38:7cm51128K64=82.:m7:9;%3g>0b<,;:1?l5@4483?J3628qvC<951z~f30=83:1<7>tn40967=ik3;;<6A<2;28 4g=>6=5@5082xI6?3;pqpl:8;294?6=8rd>>7I4:3:0(2dh695@3383?!g=;k1/?>4?;%32>02k4=3:M04?4?3F9?6?=4O2796==H;009?6A S:PIN24 cpu_rnw S:PIN7 cs1 S:PIN20 extclk S:PIN6 -spi_int<0> S:PIN42 -spi_int<1> S:PIN40 -spi_int<2> S:PIN39 -spi_int<3> S:PIN1 -spi_miso<0> S:PIN44 -spi_miso<1> S:PIN43 -spi_miso<2> S:PIN38 -spi_miso<3> S:PIN37 +spi_int S:PIN42 +spi_miso S:PIN44 cpu_Nirq S:PIN14 -diag S:PIN29 cpu_d<0> S:PIN2 cpu_d<1> S:PIN3 cpu_d<2> S:PIN4 @@ -29,30 +22,32 @@ cpu_d<6> S:PIN12 cpu_d<7> S:PIN13 spi_mosi S:PIN35 spi_sclk S:PIN34 -spi_Nsel<0> S:PIN28 -spi_Nsel<1> S:PIN27 -spi_Nsel<2> S:PIN26 -spi_Nsel<3> S:PIN25 +led S:PIN29 +spi_Nsel S:PIN28 ;The remaining section of the .gyd file is for documentation purposes only. ;It shows where your internal equations were placed in the last successful fit. -PARTITION FB1_1 spidataout<3> spidataout<2> spidataout<1> spidataout<0> - int_dout<0> int_dout<1> tmo int_dout<2> - slaveinten<0> frx ece divisor<2> - divisor<1> divisor<0> int_dout<3> cpol - int_dout<4> cpha -PARTITION FB2_1 start_shifting/start_shifting_RSTF__$INT int_mosi EXP6_ +PARTITION FB1_2 spidataout<2> spidataout<1> spidataout<0> int_dout<0> + int_dout<1> tmo int_dout<2> slaveinten + frx ece divisor<2> divisor<1> + divisor<0> int_dout<3> cpol int_dout<4> + cpha +PARTITION FB2_1 EXP6_ int_mosi shifting2 shiftdone + shiftcnt<0> $OpTx$INV$22__$INT spidatain<7> spidatain<6> + spidatain<5> spidatain<4> spidatain<3> spidatain<2> + spidatain<1> spidatain<0> shiftcnt<3> shiftcnt<2> + shiftcnt<1> start_shifting/start_shifting_RSTF__$INT +PARTITION FB3_2 int_dout<5> +PARTITION FB3_5 int_dout<6> +PARTITION FB3_8 int_dout<7> cpu_Nirq_OBUFE + +PARTITION FB4_1 cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST tc start_shifting spidataout<7> + spidataout<6> spidataout<5> spidataout<4> spidataout<3> + ier +PARTITION FB4_11 slavesel +PARTITION FB4_14 led_OBUF +PARTITION FB4_16 EXP7_ int_sclk -PARTITION FB3_1 shifting2 int_dout<5> shiftdone $OpTx$INV$22__$INT - int_dout<6> start_shifting spidatain<7> int_dout<7> - cpu_Nirq_OBUFE spidatain<6> spidatain<5> spidatain<4> - spidatain<3> spidatain<2> spidatain<1> shiftcnt<3> - shiftcnt<2> cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST -PARTITION FB4_1 tc slavesel<3> shiftcnt<0> spidataout<7> - slavesel<2> spidataout<6> spidataout<5> slavesel<1> - spidataout<4> shiftcnt<1> slavesel<0> slaveinten<3> - slaveinten<2> diag_OBUF slaveinten<1> ier - int_sclk spidatain<0> diff --git a/spi6502b.jed b/spi6502b.jed index 7aa95a8..eb99912 100644 --- a/spi6502b.jed +++ b/spi6502b.jed @@ -1,5 +1,5 @@ Programmer Jedec Bit Map -Date Extracted: Sat May 06 17:27:53 2017 +Date Extracted: Sat May 06 17:48:01 2017 QF46656* QP44* @@ -43,42 +43,42 @@ N PPMAP 24 7* N PPMAP 26 8* N PPMAP 27 9* L0000000 00000000 00000000 00000000 00000000* -L0000032 10000000 00000000 00000000 00000000* +L0000032 00000000 00000000 00000000 00000000* L0000064 00000000 00000000 00000000 00000000* -L0000096 00000000 00000000 00000000 00000000* +L0000096 01111100 00000000 00000000 01100000* L0000128 00000000 00000000 00000000 00000000* -L0000160 00000000 00000000 00000000 00001000* +L0000160 00000000 00000000 00000000 00000000* L0000192 00000000 00000000 00000000 00000000* -L0000224 00000000 00000000 00000000 00000000* -L0000256 00000000 00000000 00000000 00000000* +L0000224 00000000 00000000 00000000 00010000* +L0000256 10011000 00000000 00000000 01100000* L0000288 000000 000000 000000 000000* L0000312 000000 000000 000000 000000* -L0000336 000000 000000 000000 000000* -L0000360 000000 000000 010000 000000* -L0000384 000000 000000 000000 000000* +L0000336 000000 000000 000000 100000* +L0000360 000000 000000 000000 000000* +L0000384 101101 000000 000000 011000* L0000408 000000 000000 000000 000000* L0000432 00000000 00000000 00000000 00000000* -L0000464 00000000 00000000 00000000 00010000* -L0000496 10000000 00000000 00000000 00000000* -L0000528 00000000 00000000 00000000 00010000* -L0000560 00000000 00000000 00000000 00000100* -L0000592 00000000 00000000 00000000 00000000* -L0000624 00000000 00000000 00000000 00000100* -L0000656 00000000 00000000 00000000 00000000* -L0000688 00000000 00000000 00000000 00000000* -L0000720 000000 000000 000000 000000* -L0000744 000000 000000 000000 000000* -L0000768 000000 000000 000000 100000* -L0000792 000000 000000 000000 000000* -L0000816 000000 000000 000000 000001* +L0000464 00000000 00000000 00000000 00000000* +L0000496 00000000 00000000 00000000 00000000* +L0000528 00000000 00000000 00000000 00000000* +L0000560 00000000 00000000 00000000 00000000* +L0000592 01100100 00000000 11100000 00000000* +L0000624 01100100 00000000 11100000 00000000* +L0000656 01100100 00000000 11100000 00000000* +L0000688 01100100 00000000 10000000 00000000* +L0000720 010001 000000 000000 000000* +L0000744 010010 000000 000000 000000* +L0000768 010010 000000 000000 000000* +L0000792 010010 000000 000000 000000* +L0000816 010000 000000 000000 000000* L0000840 000000 000000 000000 000000* L0000864 00000000 00000000 00000000 00000000* -L0000896 00000000 00000000 00000000 00000000* +L0000896 00000000 10000000 00000000 00000000* L0000928 00000000 00000000 00000000 00000000* L0000960 00000000 00000000 00000000 00000000* L0000992 00000000 00000000 00000000 00000000* L0001024 00000000 00000000 00000000 00000000* -L0001056 10000000 00000000 00000000 10000000* +L0001056 10000000 00000000 00000000 00000000* L0001088 00000000 00000000 00000000 00000000* L0001120 00000000 00000000 00000000 00000000* L0001152 000000 000000 000000 000000* @@ -86,17 +86,17 @@ L0001176 000000 000000 000000 000000* L0001200 000000 000000 000000 000000* L0001224 000000 000000 000000 000000* L0001248 000000 000000 000000 000000* -L0001272 000000 000000 000000 000001* -L0001296 00000000 00000000 00000000 00000000* +L0001272 000000 000000 000000 000000* +L0001296 00000000 00000000 00000000 10000000* L0001328 00000000 00000000 00000000 00000000* L0001360 00000000 00000000 00000000 00000000* L0001392 00000000 00000000 00000000 00000000* L0001424 00000000 00000000 00000000 00000000* -L0001456 00000000 00000000 00000000 00000000* +L0001456 00000000 00000000 00100000 00000000* L0001488 00000000 00000000 00000000 00000000* L0001520 10000000 00000000 00000000 00000000* L0001552 00000000 00000000 00000000 00000000* -L0001584 000000 000000 000000 100000* +L0001584 000000 000000 000000 000000* L0001608 000000 000000 000000 000000* L0001632 000000 000000 000000 000000* L0001656 000000 000000 000000 000000* @@ -104,45 +104,45 @@ L0001680 000000 000000 000000 000000* L0001704 000000 000000 000000 000000* L0001728 00000000 00000000 00000000 00000000* L0001760 00000000 00000000 00000000 00000000* -L0001792 00000000 00000000 10000000 00000000* +L0001792 00000000 00000000 00000000 00000000* L0001824 00000000 00000000 00000000 00000000* -L0001856 00000000 00000000 00000000 00000100* -L0001888 00000000 00000000 00000000 00000000* -L0001920 00000000 00000000 00000000 00000100* +L0001856 00000000 00000000 00000000 00000000* +L0001888 00000000 00000000 00000000 00001000* +L0001920 00000000 00000000 00000000 00000000* L0001952 00000000 00000000 00000000 00000000* L0001984 00000000 00000000 00000000 00000000* L0002016 000000 000000 000000 000000* -L0002040 000000 000000 000000 000000* -L0002064 000000 000000 000000 000000* -L0002088 100000 000000 000001 000000* -L0002112 000000 000000 000000 000000* +L0002040 000000 010000 000000 000000* +L0002064 000000 000000 000000 100000* +L0002088 000000 000000 000000 000000* +L0002112 000000 000000 000000 100000* L0002136 000000 000000 000000 000000* L0002160 00000000 00000000 00000000 00000000* L0002192 00000000 00000000 00000000 00000000* L0002224 00000000 00000000 00000000 00000000* -L0002256 00000000 00000000 00000000 10000000* +L0002256 00000000 00000000 00000000 00000000* L0002288 00000000 00000000 00000000 00000000* L0002320 00000000 00000000 00000000 00000000* L0002352 00000000 00000000 00000000 00000000* -L0002384 00000000 00000000 00000000 00000000* +L0002384 00000000 00000000 10000000 00000000* L0002416 00000000 00000000 00000000 00000000* L0002448 000000 000000 000000 000000* L0002472 000000 000000 000000 000000* -L0002496 100000 000000 000000 000000* +L0002496 000000 100000 000000 000000* L0002520 000000 000000 000000 000000* L0002544 000000 000000 000000 000000* L0002568 000000 000000 000000 000000* -L0002592 00000010 00000000 10111100 00000000* +L0002592 00000010 00000000 00000000 00000000* L0002624 01000011 00000000 00000000 01000000* L0002656 00000000 00000000 00000000 00000000* L0002688 00000011 00000000 00000000 00000000* -L0002720 00000010 00000000 00000000 00000000* -L0002752 00000011 10000000 00011100 00000000* +L0002720 00000010 10000000 00000000 00000000* +L0002752 00000011 00000000 00000000 00000000* L0002784 00000000 00000000 00000000 00000000* L0002816 00000000 00000000 00000000 00000000* L0002848 00000000 00000000 00000000 00000000* L0002880 000000 000000 000000 000000* -L0002904 000000 000000 100110 000000* +L0002904 000000 000000 000000 000000* L0002928 000000 000000 000000 000000* L0002952 000000 000000 000000 000000* L0002976 000000 000000 000000 000000* @@ -163,8 +163,8 @@ L0003384 000000 000000 000000 000000* L0003408 000000 000000 000000 000000* L0003432 000000 000000 000000 000000* L0003456 00000000 00000000 00000000 00000000* -L0003488 00100000 00000000 00000000 00000000* -L0003520 10000000 00000000 00000000 00000000* +L0003488 00000000 00000000 00000000 00000000* +L0003520 00000000 00000000 00000000 00000000* L0003552 00000000 00000000 00000000 00000000* L0003584 00000000 00000000 00000000 00000000* L0003616 00000000 00000000 00000000 00000000* @@ -173,197 +173,197 @@ L0003680 00000000 00000000 00000000 00000000* L0003712 00000000 00000000 00000000 00000000* L0003744 000000 000000 000000 000000* L0003768 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00000000 00000000* -L0023152 00000000 00000000 01000000 00000000* -L0023184 000001 000000 000000 000000* -L0023208 000000 000000 000001 000000* +L0023152 00000000 00000000 00000000 00000000* +L0023184 000000 000000 000000 000000* +L0023208 000000 000000 000000 000000* L0023232 000000 000000 000000 000000* -L0023256 000000 000000 000000 000000* +L0023256 010000 000000 000000 000000* L0023280 000000 000000 000000 000000* -L0023304 000000 000000 000000 000010* -L0023328 00000000 00000000 00000000 00000010* -L0023360 00000000 00000000 00000000 00000010* -L0023392 00000011 00000000 00000001 00000001* +L0023304 000000 000000 000000 000000* +L0023328 00000000 00000010 00000000 00000010* +L0023360 00000000 00000010 00000000 00000010* +L0023392 00000000 00000000 00000000 00000000* L0023424 00000000 00000000 00000000 00000000* -L0023456 00000000 00000000 00000000 00000010* +L0023456 00000000 00000010 00000000 00000010* L0023488 00000000 00000000 00000000 00000000* L0023520 00000000 00000000 00000000 00000000* L0023552 00000000 00000000 00000000 00000000* @@ -867,42 +867,42 @@ L0023664 000000 000000 000000 000000* L0023688 000000 000000 000000 000000* L0023712 000000 000000 000000 000000* L0023736 000000 000000 000000 000000* -L0023760 00000001 00000000 00000010 00000010* -L0023792 00000001 00000000 00000000 00000010* -L0023824 00000010 00000000 00000000 00000000* +L0023760 00000000 00000010 00000000 00000000* +L0023792 00000000 00000011 00000001 00000000* +L0023824 00000010 00000000 00000010 00000010* L0023856 00000000 00000000 00000000 00000000* -L0023888 00000001 00000000 00000010 00000010* +L0023888 00000000 00000011 00000001 00000000* L0023920 00000000 00000000 00000000 00000000* L0023952 00000000 00000000 00000000 00000000* -L0023984 00000000 00000000 10000000 00000000* +L0023984 00000000 00000000 00000000 00000000* L0024016 00000000 00000000 00000000 00000000* L0024048 000000 000000 000000 000000* L0024072 000000 000000 000000 000000* L0024096 000000 000000 000000 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00000000 00000000* -L0026480 00000010 00000000 00000010 00000010* +L0026480 00000011 00000010 00000000 00000000* L0026512 00000000 00000000 00000000 00000000* L0026544 00000000 00000000 00000000 00000000* L0026576 00000000 00000000 00000000 00000000* -L0026608 00000000 00000000 00000000 00000000* -L0026640 000000 000000 000000 000000* +L0026608 01000000 00000000 00000000 00000000* +L0026640 000010 000000 000000 000000* L0026664 000000 000000 000000 000000* -L0026688 000000 000000 000000 000000* +L0026688 000000 000000 000000 010000* L0026712 000000 000000 000000 000000* L0026736 000000 000000 000000 000000* L0026760 000000 000000 000000 000000* -L0026784 00000001 00000000 00000011 00000011* -L0026816 00000001 00000000 00000011 00000010* +L0026784 00000001 00000001 00000001 00000001* +L0026816 00000001 00000001 00000001 00000001* L0026848 00000000 00000000 00000000 00000000* -L0026880 11111100 00000000 00000000 01101100* -L0026912 00000010 00000001 00000000 00000011* +L0026880 00000000 00000000 00000000 00000000* +L0026912 00000000 00000001 00000000 00000000* L0026944 00000000 00000000 00000000 00000000* L0026976 00000000 00000000 00000000 00000000* -L0027008 00000000 00000000 00000000 11110000* -L0027040 10011000 00000000 00000000 00000000* +L0027008 00000000 00000000 00000000 00000000* +L0027040 00000000 00000000 00000000 00000000* L0027072 000000 000000 000000 000000* L0027096 000000 000000 000000 000000* -L0027120 000000 000000 010000 000000* +L0027120 000000 000000 000000 000000* L0027144 000000 000000 000000 000000* -L0027168 101101 000000 000000 011110* +L0027168 000000 000000 000000 000000* L0027192 000000 000000 000000 000000* -L0027216 00000001 00000000 00000011 00000011* -L0027248 00000001 00000000 00000001 00000011* -L0027280 00000000 00000000 10000000 00000000* +L0027216 00000010 00000000 00000010 00000010* +L0027248 00000010 00000010 00000010 00000011* +L0027280 00000000 00000000 00000000 00000000* L0027312 00000000 00000000 00000000 00000000* -L0027344 00000010 00000000 00000011 00000000* -L0027376 01100100 00000000 11100000 00000000* -L0027408 01100100 00000000 11100000 00000000* -L0027440 01100100 00000000 11100000 00000000* -L0027472 01100100 00000000 11100000 00000000* -L0027504 011001 000000 111000 000000* -L0027528 010010 000000 000000 000000* -L0027552 010010 000000 000000 000000* -L0027576 010010 000000 000000 000000* -L0027600 010010 000000 000000 000000* -L0027624 010000 000000 000000 000000* -L0027648 00000000 00000000 00000010 00000010* -L0027680 00000000 00000000 00000000 00000010* +L0027344 00000000 00000010 00000000 00000001* +L0027376 00000000 00000000 00000000 00000000* +L0027408 00000000 00000000 00000000 00000000* +L0027440 00000000 00000000 00000000 00000000* +L0027472 00000000 00000000 00000000 00000000* +L0027504 000000 000000 000000 000000* +L0027528 000000 000000 000000 000000* +L0027552 000000 000000 000000 000000* +L0027576 000000 000000 000000 000000* +L0027600 000000 000000 000000 000000* +L0027624 000000 000000 000000 000000* +L0027648 00000000 00000000 00000000 00000000* +L0027680 00000000 00000010 00000000 00000000* L0027712 00000000 00000000 00000000 00000000* L0027744 00000000 00000000 00000000 00000000* -L0027776 00000001 00000000 00000010 00000010* +L0027776 00000000 00000010 00000000 00000000* L0027808 00000000 00000000 00000000 00000000* L0027840 00000000 00000000 00000000 00000000* L0027872 00000000 00000000 00000000 00000000* @@ -1017,43 +1017,43 @@ L0027984 000000 000000 000000 000000* L0028008 000000 000000 000000 000000* L0028032 000000 000000 000000 000000* L0028056 000000 000000 000000 000000* -L0028080 00000011 00000000 00000010 00000000* -L0028112 00000010 00000000 00000001 00000000* +L0028080 00000000 00000000 00000000 00000000* +L0028112 00000000 00000000 00000000 00000000* L0028144 00000000 00000000 00000000 00000001* L0028176 00000000 00000000 00000000 00000000* -L0028208 00000001 00000000 00000010 00000010* +L0028208 00000010 00000000 00000000 00000010* L0028240 00000000 00000000 00000000 00000000* -L0028272 00000000 00000000 00000000 00000000* +L0028272 00000000 00100000 00000000 00000000* L0028304 00000000 00000000 00000000 00000000* -L0028336 00000000 00000000 00000000 00000000* +L0028336 00000000 00000000 10000000 00000000* L0028368 000000 000000 000000 000000* -L0028392 010000 000000 000000 000000* +L0028392 000000 000000 000000 000000* L0028416 000000 000000 000000 000000* L0028440 000000 000000 000000 000000* L0028464 000000 000000 000000 000000* L0028488 000000 000000 000000 000000* -L0028512 00000000 00000010 00000011 00000001* -L0028544 00000000 10000000 00000000 00000000* +L0028512 00000000 00000000 00000000 00000000* +L0028544 00000000 00000010 00000000 00000000* L0028576 00000000 00000000 00000000 00000010* L0028608 00000000 00000000 00000000 00000000* -L0028640 00001101 00000010 00000011 00000000* +L0028640 00001101 00000010 00000000 00000001* L0028672 00000000 00000000 00000000 00000000* L0028704 00000000 00000000 00000000 00000000* L0028736 00000000 00000000 00000000 00000000* L0028768 00000000 00000000 00000000 00000000* -L0028800 000000 000000 000000 001000* +L0028800 000000 000000 000000 000000* L0028824 000000 000000 000000 000000* -L0028848 100000 000000 000000 000000* +L0028848 100000 000000 000000 001000* L0028872 000000 000000 000000 000000* L0028896 000000 000000 000000 000000* L0028920 000000 000000 000000 000000* -L0028944 00000010 00000010 00000011 00000010* -L0028976 00001110 00000010 00000001 00000010* +L0028944 00000010 00000010 00000000 10000010* +L0028976 00001110 00000011 00000000 00000010* L0029008 00000001 00000000 00000000 00000001* L0029040 00000000 00000000 00000000 00000000* -L0029072 00000010 00000001 00000011 00000000* -L0029104 00000000 00000000 00000000 00000000* -L0029136 00000000 00000000 00000000 00100000* +L0029072 00000000 00000001 00000000 00000000* +L0029104 00000000 00000000 01000000 00000000* +L0029136 00000000 00000000 00000000 00000000* L0029168 00000000 00000000 00000000 00000000* L0029200 00000000 00000000 00000000 00000000* L0029232 000000 000000 000000 000000* @@ -1061,12 +1061,12 @@ L0029256 000000 000000 000000 000000* L0029280 000000 000000 000000 000000* L0029304 100000 000000 000000 000000* L0029328 000000 000000 000000 000000* -L0029352 000000 000000 000000 000000* -L0029376 00000010 00000001 00000001 00000010* -L0029408 00000010 00000000 00000000 00000011* +L0029352 000000 000000 000000 001000* +L0029376 00000000 00000000 00000000 00000000* +L0029408 00000000 00000010 00000000 00000010* L0029440 00000000 00000000 00000000 00000000* L0029472 00000000 00000000 00000000 00000000* -L0029504 00000011 00000001 00000001 00000000* +L0029504 00000001 00000010 00000000 00000010* L0029536 00000000 00000000 00000000 00000000* L0029568 00000000 00000000 00000000 00000000* L0029600 00000000 00000000 00000000 00000000* @@ -1077,123 +1077,123 @@ L0029712 000000 000000 000000 000000* L0029736 000000 000000 000000 000000* L0029760 000000 000000 000000 000000* L0029784 000000 000000 000000 000000* -L0029808 00000001 00000000 00000001 00000001* -L0029840 00000001 00000000 00000001 00000000* +L0029808 00000010 00000000 00000000 00000000* +L0029840 00000010 00000010 00000000 00000000* L0029872 00000000 00000000 00000000 00000000* L0029904 00000000 00000000 00000000 00000000* -L0029936 00000000 00000001 00000000 00000001* +L0029936 00000000 00000001 00000000 00000000* L0029968 00000000 00000000 00000000 00000000* L0030000 00000000 00000000 00000000 00000000* L0030032 00000000 00000000 00000000 00000000* L0030064 00000000 00000000 00000000 00000000* L0030096 000000 000000 000000 000000* L0030120 000000 000000 000000 000000* -L0030144 000000 000000 000100 000000* +L0030144 000000 000000 000000 000000* L0030168 000000 000000 000000 000000* L0030192 000000 000000 000000 000000* L0030216 000000 000000 000000 000000* -L0030240 00000000 00000000 01000010 11101110* -L0030272 00000000 00000000 00000110 00000011* -L0030304 00000000 00000000 00000001 00000000* +L0030240 00000010 00000000 00000000 00000010* +L0030272 00000010 00000010 00000000 00000010* +L0030304 00000000 00000000 00000000 00000000* L0030336 00000000 00000000 00000000 00000000* -L0030368 00000000 00000000 00000010 00000010* -L0030400 00000000 00000000 00000000 11110000* -L0030432 00000000 00000000 00000100 00000000* +L0030368 00000000 00000010 00000000 00000000* +L0030400 00000000 00000000 00000000 00000000* +L0030432 00000000 00000000 00000000 00000000* L0030464 00000000 00000000 00000000 00000000* L0030496 00000000 00000000 00000000 00000000* L0030528 000000 000000 000000 000000* -L0030552 000000 000000 000000 011110* +L0030552 000000 000000 000000 000000* L0030576 000000 000000 000000 000000* L0030600 000000 000000 000000 000000* L0030624 000000 000000 000000 000000* L0030648 000000 000000 000000 000000* -L0030672 00000001 00000001 00000001 00000000* -L0030704 00000000 10000001 00000001 00000000* -L0030736 00000000 10000000 00000000 00000010* -L0030768 00000000 00000000 00111100 00000000* -L0030800 00000001 00000001 00000000 00000000* -L0030832 00000000 00000000 10000000 00000000* +L0030672 00000000 00000001 00000000 00000000* +L0030704 00000010 00000011 00000000 00000000* +L0030736 00000000 00000000 00000000 00000010* +L0030768 00000000 00000000 00000000 00000000* +L0030800 00000010 00000010 00000000 00000000* +L0030832 00000000 00000000 00000000 00000000* L0030864 00000000 00000000 00000000 00000000* -L0030896 00000000 10000000 00000000 00000000* -L0030928 00000000 00000000 00011100 00000000* -L0030960 000000 100000 000000 000000* -L0030984 000000 100000 000000 000000* -L0031008 000000 100000 000000 000000* -L0031032 000000 100000 000000 000000* -L0031056 000000 100000 000110 000000* +L0030896 00000000 00000000 00000000 00000000* +L0030928 00000000 00000000 00000000 00000000* +L0030960 000000 000000 000000 000000* +L0030984 000000 000000 000000 000000* +L0031008 000000 000000 000000 000000* +L0031032 000000 000000 000000 000000* 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010000 000000* -L0031512 010100 000000 000000 000000* -L0031536 00000000 00000001 00000001 00000000* -L0031568 00110100 10000001 00000001 00000000* +L0031440 000000 000000 000000 000000* +L0031464 000000 000000 000000 000000* +L0031488 000000 000000 000000 000000* +L0031512 000000 000000 000000 000000* +L0031536 00000000 00000000 00000000 00000000* +L0031568 00000000 00000000 00000000 00000000* L0031600 00000000 00000000 00000000 00000000* L0031632 00000000 00000000 00000000 00000000* -L0031664 00110101 00000001 00000001 00000010* -L0031696 01100100 00000000 11100000 00000000* -L0031728 00010000 00000000 00000000 00000000* -L0031760 00000000 10000000 10000000 00000000* -L0031792 01100100 00000000 11100000 00000000* -L0031824 000100 000000 000000 000000* -L0031848 010010 100000 000000 000000* -L0031872 001001 100000 000000 000000* -L0031896 000010 000000 000000 000000* +L0031664 00000001 00000001 00000000 00000000* +L0031696 00000000 00000000 00000000 00000000* +L0031728 00000000 00000000 00000000 00000000* +L0031760 00000000 00000000 00000000 00000000* +L0031792 00000000 00000000 00000000 00000000* +L0031824 000000 000000 000000 000000* +L0031848 000000 000000 000000 000000* +L0031872 000000 000100 000000 000000* +L0031896 000000 000000 000000 000000* L0031920 010000 000000 000000 000000* -L0031944 001001 000000 000000 000000* -L0031968 00000001 00000000 00000011 00000010* -L0032000 00000000 00000000 00000011 00000010* +L0031944 000000 000000 000000 000000* +L0031968 00000011 00000001 00000011 00000010* +L0032000 00000011 00000011 00000011 00000010* L0032032 00000000 00000000 00000000 00000000* L0032064 00000000 00000000 00000000 00000000* -L0032096 00000001 00000000 00000001 00000000* +L0032096 00000000 00000010 00000000 00000000* L0032128 00000000 00000000 00000000 00000000* L0032160 00000000 00000000 00000000 00000000* -L0032192 00000000 10000000 00000000 00000000* +L0032192 00000000 00000000 00000000 00000000* L0032224 00000000 00000000 00000000 00000000* L0032256 000000 000000 000000 000000* L0032280 000000 000000 000000 000000* L0032304 000000 000000 000000 000000* -L0032328 000000 000000 000000 000000* +L0032328 100000 000000 000000 000000* L0032352 000000 000000 000000 000000* L0032376 000000 000000 000000 000000* -L0032400 00000000 00000000 00000001 00000000* -L0032432 00000000 00000000 00000000 00000000* +L0032400 00000000 00000000 00000000 00000000* +L0032432 00000000 00000010 00000010 00000010* L0032464 00000000 00000000 00000000 00000000* L0032496 00000000 00000000 00000000 00000000* -L0032528 00000001 00000000 00000000 00000000* +L0032528 00000000 00000010 00000010 00000010* L0032560 00000000 00000000 00000000 00000000* L0032592 00000000 00000000 00000000 00000000* L0032624 00000000 00000000 00000000 00000000* L0032656 00000000 00000000 00000000 00000000* L0032688 000000 000000 000000 000000* L0032712 000000 000000 000000 000000* -L0032736 000000 000000 000000 000000* +L0032736 100000 000000 001000 000000* L0032760 000000 000000 000000 000000* L0032784 000000 000000 000000 000000* L0032808 000000 000000 000000 000000* -L0032832 00000011 00000000 00000011 00000010* -L0032864 00000001 00000000 00000011 00000010* -L0032896 00000000 00000000 00000000 00000001* +L0032832 00000000 00000000 00000000 00000000* +L0032864 00000000 00000010 00000000 00000010* +L0032896 00000001 00000000 00000000 00000001* L0032928 00000000 00000000 00000000 00000000* -L0032960 00000010 00000000 00000011 00000010* +L0032960 00000010 00000010 00000000 00000010* L0032992 00000000 00000000 00000000 00000000* L0033024 00000000 00000000 00000000 00000000* L0033056 00000000 00000000 00000000 00000000* L0033088 00000000 00000000 00000000 00000000* L0033120 000000 000000 000000 000000* L0033144 000000 000000 000000 000000* -L0033168 000000 000000 000000 000000* +L0033168 000100 000000 000000 000000* L0033192 000000 000000 000000 000000* L0033216 000000 000000 000000 000000* L0033240 000000 000000 000000 000000* @@ -1204,71 +1204,71 @@ L0033360 00000000 00000000 00000000 00000000* L0033392 00000000 00000000 00000000 00000000* L0033424 00000000 00000000 00000000 00000000* L0033456 00000000 00000000 00000000 00000000* -L0033488 00000000 00000000 00000000 00000000* +L0033488 00100000 00000000 00000000 00000000* L0033520 00000000 00000000 00000000 00000000* L0033552 000000 000000 000000 000000* L0033576 000000 000000 000000 000000* L0033600 000000 000000 000000 000000* L0033624 000000 000000 000000 000000* L0033648 000000 000000 000000 000000* -L0033672 000000 000000 000000 000000* -L0033696 00000010 00000010 00000010 00010010* -L0033728 11110100 00000010 00000010 00000010* -L0033760 11000000 00000000 00000000 00000000* -L0033792 00000000 00000000 00000000 00000000* +L0033672 000100 000000 000000 000000* +L0033696 00000010 00000010 00000010 00000010* +L0033728 01110100 00000010 00000000 01100010* +L0033760 01000000 00000000 00000000 01100000* +L0033792 00000000 10000000 00000000 00000000* L0033824 00110100 00000000 00000000 00000000* -L0033856 00000000 00000000 10000000 00000100* -L0033888 10010010 10000010 00000010 00000010* -L0033920 10000000 00000000 00000000 00000000* -L0033952 01100100 00000000 11100000 00000000* -L0033984 011101 000000 111000 000000* -L0034008 000010 000000 000000 100001* -L0034032 100001 000000 010000 000000* -L0034056 100000 000000 000000 000000* -L0034080 010010 000000 010000 000000* -L0034104 010001 000000 000000 000000* +L0033856 00100000 00000000 11100000 00000000* +L0033888 10010010 00000010 00000010 01100010* +L0033920 11000100 00000000 11100000 11100000* +L0033952 00100000 00000000 10000000 00000000* +L0033984 010101 000000 000000 000000* +L0034008 010010 000000 000000 000000* +L0034032 100001 000000 000000 111000* +L0034056 100010 000000 000000 010000* +L0034080 010000 000000 000000 100000* +L0034104 000001 000000 000000 001000* L0034128 00000000 00000000 00000000 00000000* L0034160 00001000 00000000 00000000 00000000* -L0034192 00000000 00000000 10000000 00000000* +L0034192 00000000 00000000 00000000 00000000* L0034224 00000000 00000000 00000000 00000000* L0034256 00001000 00000000 00000000 00000000* -L0034288 01100100 00000000 01100000 00000000* -L0034320 00001000 00000000 00000000 00000000* -L0034352 01100100 00000000 11100000 00000000* -L0034384 00000000 00000000 00000000 00000000* -L0034416 000010 000000 000000 000000* -L0034440 010000 000000 000000 000000* +L0034288 01000100 00000000 00000000 00000000* +L0034320 00001000 00000000 00000000 00010000* +L0034352 00100000 00000000 00000000 00000000* +L0034384 01000100 00000000 00000000 00000000* +L0034416 000010 000000 000000 000100* +L0034440 000000 000000 000000 000000* L0034464 001100 000000 000000 000000* -L0034488 010010 000000 000000 000000* +L0034488 010000 000000 000000 000000* L0034512 000000 000000 000000 000000* L0034536 001100 000000 000000 000000* -L0034560 00000000 00000000 00000000 00000000* +L0034560 00000000 00000000 00000000 00000100* L0034592 00000000 00000000 00000000 00000000* L0034624 00000000 00000000 00000000 00000000* L0034656 00000000 00000000 00000000 00000000* L0034688 00000000 00000000 00000000 00000000* L0034720 00000000 00000000 00000000 00000000* L0034752 00000000 00000000 00000000 00000000* -L0034784 10000000 00000000 00000000 00000000* +L0034784 00000000 00000000 00000000 00000000* L0034816 00000000 00000000 00000000 00000000* -L0034848 000100 000000 000000 010000* +L0034848 000000 000000 000000 000000* L0034872 000000 000000 000000 000000* L0034896 000000 000000 000000 000000* L0034920 000000 000000 000000 000000* L0034944 000000 000000 000000 000000* -L0034968 000100 000000 000000 000000* +L0034968 000000 000000 000000 000000* L0034992 00000000 00000000 00000000 00000000* L0035024 00000000 00000000 00000000 00000000* L0035056 00000000 00000000 00000000 00000000* L0035088 00000000 00000000 00000000 00000000* L0035120 00000000 00000000 00000000 00000000* L0035152 00000000 00000000 00000000 00000000* -L0035184 10010000 00000000 00000000 01000000* +L0035184 00000000 00000000 00000000 00000100* L0035216 00000000 00000000 00000000 00000000* -L0035248 00000000 00000000 00100000 00000000* +L0035248 00000000 00000000 00000000 00000000* L0035280 000000 000000 000000 000000* -L0035304 000000 000000 000001 000000* -L0035328 000100 000000 000000 000000* +L0035304 000000 000000 000000 000000* +L0035328 000000 000000 000000 000000* L0035352 000000 000000 000000 000000* L0035376 000000 000000 000000 000000* L0035400 000000 000000 000000 000000* @@ -1283,7 +1283,7 @@ L0035648 00000000 00000000 00000000 00000000* L0035680 00000000 00000000 00000000 00000000* L0035712 000000 000000 000000 000000* L0035736 000000 000000 000000 000000* -L0035760 001000 000000 000000 000000* +L0035760 000000 000000 000000 000000* L0035784 000000 000000 000000 000000* L0035808 000000 000000 000000 000000* L0035832 000000 000000 000000 000000* @@ -1292,7 +1292,7 @@ L0035888 00000000 00000000 00000000 00000000* L0035920 00000000 00000000 00000000 00000000* L0035952 00000000 00000000 00000000 00000000* L0035984 00000000 00000000 00000000 00000000* -L0036016 00000100 00000000 00000000 00000000* +L0036016 00000000 00000000 00000000 00000000* L0036048 00000000 00000000 00000000 00000000* L0036080 00000000 00000000 00000000 00000000* L0036112 00000000 00000000 00000000 00000000* @@ -1301,25 +1301,25 @@ L0036168 000000 000000 000000 000000* L0036192 000000 000000 000000 000000* L0036216 000000 000000 000000 000000* L0036240 000000 000000 000000 000000* -L0036264 001000 000000 000000 000000* +L0036264 000000 000000 000000 000000* L0036288 00000000 00000000 00000000 00000000* -L0036320 00000000 00000000 00000000 00100000* +L0036320 00000000 00000000 00000000 00000000* L0036352 00000000 00000000 00000000 00000000* L0036384 00000000 00000000 00000000 00000000* L0036416 00000000 00000000 00000000 00000000* L0036448 00000000 00000000 00000000 00000000* -L0036480 00000000 00000000 00000000 00001000* +L0036480 00000000 00000000 00000000 00000000* L0036512 00000000 00000000 00000000 00000000* L0036544 00000000 00000000 00000000 00000000* L0036576 000000 000000 000000 000000* L0036600 000000 000000 000000 000000* -L0036624 000000 000000 000001 000000* +L0036624 000000 000000 000000 010000* L0036648 000000 000000 000000 000000* L0036672 000000 000000 000000 000000* L0036696 000000 000000 000000 000000* L0036720 00000000 00000000 00000000 00000000* L0036752 00000000 00000000 00000000 00000000* -L0036784 00000000 00000000 00000000 00100000* +L0036784 00000000 00000000 00000000 00000000* L0036816 00000000 00000000 00000000 00000000* L0036848 00000000 00000000 00000000 00000000* L0036880 00000000 00000000 00000000 00000000* @@ -1328,9 +1328,9 @@ L0036944 00000000 00000000 00000000 00000000* L0036976 00000000 00000000 00000000 00000000* L0037008 000000 000000 000000 000000* L0037032 000000 000000 000000 000000* -L0037056 000000 000000 000000 000010* -L0037080 000000 000000 000000 000000* -L0037104 000010 000000 000000 000000* +L0037056 000000 000000 000000 000000* +L0037080 000000 000000 000000 010000* +L0037104 000000 000000 000000 000000* L0037128 000000 000000 000000 000000* L0037152 00000000 00000000 00000000 00000000* L0037184 00000000 00000000 00000000 00000000* @@ -1338,7 +1338,7 @@ L0037216 00000000 00000000 00000000 00000000* L0037248 00000000 00000000 00000000 00000000* L0037280 00000000 00000000 00000000 00000000* L0037312 00000000 00000000 00000000 00000000* -L0037344 00000000 00000000 00000000 00000000* +L0037344 00000000 00000000 00000000 00000100* L0037376 00000000 00000000 00000000 00000000* L0037408 00000000 00000000 00000000 00000000* L0037440 000000 000000 000000 000000* @@ -1347,128 +1347,128 @@ L0037488 000001 000000 000000 000000* L0037512 000000 000000 000000 000000* L0037536 000000 000000 000000 000000* L0037560 000000 000000 000000 000000* -L0037584 00000000 00000000 00000000 00000000* -L0037616 00000000 00000000 00100000 00000000* +L0037584 00000000 00000000 00000000 00000100* +L0037616 00000000 00000000 00000000 00000000* L0037648 00000000 00000000 00000000 00000000* L0037680 00000000 00000000 00000000 00000000* L0037712 00000000 00000000 00000000 00000000* L0037744 00000000 00000000 00000000 00000000* L0037776 00000000 00000000 00000000 00000000* -L0037808 00000000 00000000 00000000 00000000* -L0037840 01000000 00000000 00000000 00000000* -L0037872 000000 000000 010000 000000* +L0037808 01000000 00000000 00000000 00000000* +L0037840 00000000 00000000 00000000 00000000* +L0037872 000000 000000 000000 000000* L0037896 000000 000000 000000 000000* -L0037920 000000 000000 000000 000001* +L0037920 000000 000000 000000 000000* L0037944 000000 000000 000000 000000* L0037968 000000 000000 000000 000000* L0037992 000001 000000 000000 000000* L0038016 00000000 00000000 00000000 00000000* -L0038048 00000000 00000000 00000000 00000000* -L0038080 00000000 00000000 00000000 00000000* +L0038048 00000000 10000000 00000000 00000000* +L0038080 00000000 10000000 00000000 00100000* L0038112 00000000 00000000 00000000 00000000* -L0038144 00010000 00000000 00000000 00000000* +L0038144 00010000 10000000 00000000 00000000* L0038176 00000000 00000000 00000000 00000000* L0038208 00000000 00000000 00000000 00000000* L0038240 00000000 00000000 00000000 00000000* L0038272 00000000 00000000 00000000 00000000* L0038304 000000 000000 000000 000000* L0038328 000000 000000 000000 000000* -L0038352 000000 100000 000000 000000* -L0038376 000000 000000 000000 001000* +L0038352 000000 000000 000000 000000* +L0038376 000000 100000 000000 000000* L0038400 000000 000000 000000 000000* L0038424 001000 000000 000000 000000* -L0038448 00000000 00000000 00000000 00000000* -L0038480 00010000 00000000 00000000 00000000* +L0038448 00000000 10000000 00000000 00000000* +L0038480 00010000 01000100 00000000 00100000* L0038512 00000000 00000000 00000000 00000000* -L0038544 00000000 00000000 00000000 00000000* +L0038544 00000000 10000000 00000000 00000000* L0038576 00000000 00000000 00000000 00000000* -L0038608 00000000 00000000 00100000 00000000* +L0038608 00000000 00000000 00000000 00000000* L0038640 00000000 00000000 00000000 00000000* -L0038672 00000000 00000000 00000000 00000000* +L0038672 00000000 10000000 00000000 00000000* L0038704 00000000 00000000 00000000 00000000* -L0038736 000000 000000 000000 000000* +L0038736 000000 100000 000000 000000* L0038760 000000 000000 000000 000000* -L0038784 001000 000000 000000 001000* +L0038784 001000 000000 000000 000000* L0038808 000000 000000 000000 000000* -L0038832 000000 000000 000000 000000* -L0038856 000000 000000 000001 000000* -L0038880 00000000 10000000 00000000 00000000* -L0038912 00010000 10000000 10000000 00000000* -L0038944 00000000 10000000 00000000 00000000* +L0038832 000000 000010 000000 000000* +L0038856 000000 000000 000000 000000* +L0038880 00000000 00000000 00000000 00000000* +L0038912 00010000 00000000 00000000 00000000* +L0038944 00000000 00000000 00000000 00000000* L0038976 00000000 00000000 00000000 00000000* L0039008 00000000 00000000 00000000 00000000* L0039040 00000000 00000000 00000000 00000000* L0039072 00000000 00000000 00000000 00000000* -L0039104 00000000 10000000 00000000 00000000* +L0039104 00000000 00000000 00000000 00000000* L0039136 00000000 00000000 00000000 00000000* -L0039168 000000 100000 000000 000000* -L0039192 000000 100000 000000 000000* -L0039216 000000 100000 000000 000000* -L0039240 000000 100000 000000 000000* -L0039264 000000 100000 000000 000000* +L0039168 000000 000000 000000 000000* +L0039192 000000 000000 000000 000000* +L0039216 000000 000000 000000 000000* +L0039240 000000 000000 000000 000000* +L0039264 000000 000000 000000 000000* L0039288 000000 000000 000000 000000* L0039312 00000000 00000000 00000000 00000000* L0039344 00000000 00000000 00000000 00000000* L0039376 00000000 00000000 00000000 00000000* L0039408 00000000 00000000 00000000 00000000* -L0039440 00010000 00000000 00000000 10000000* +L0039440 00010000 00000000 00000000 00000000* L0039472 00000000 00000000 00000000 00000000* L0039504 00000000 00000000 00000000 00000000* -L0039536 00000000 00000000 00000000 00000000* -L0039568 00000100 00000000 00000000 00000000* +L0039536 00000100 00000000 00000000 00000000* +L0039568 00000000 00000000 00000000 00000000* L0039600 000000 000000 000000 000000* L0039624 000000 000000 000000 000000* L0039648 000000 000000 000000 000000* L0039672 000000 000000 000000 000000* L0039696 000000 000000 000000 000000* L0039720 000000 000000 000000 000000* -L0039744 00000000 00000000 00000000 00000000* +L0039744 00000000 10000000 00000000 00000000* L0039776 00000000 00000000 00000000 00000000* -L0039808 00111100 00000000 00111100 00000000* +L0039808 00000000 00000000 00000000 00000000* L0039840 00000000 00000000 00000000 00000000* L0039872 00000000 00000000 00000000 00000000* -L0039904 00000000 00000000 00000000 00001000* +L0039904 00000000 00000000 00000000 00000000* L0039936 00000000 00000000 00000000 00000000* -L0039968 00011000 00000000 00011100 00000000* +L0039968 00000000 00000000 00000000 00000000* L0040000 00000000 00000000 00000000 00000000* L0040032 000000 000000 000000 000000* -L0040056 000000 100000 000000 000000* +L0040056 000000 000000 000000 000000* L0040080 000000 000000 000000 000000* -L0040104 001101 000000 100110 000000* +L0040104 000000 000000 000000 000000* L0040128 000000 000000 000000 000000* L0040152 000000 000000 000000 000000* L0040176 00000000 00000000 00000000 00000000* L0040208 00000000 00000000 00000000 00000000* L0040240 00000000 00000000 00000000 00000000* -L0040272 11000000 00000000 00000000 00000000* +L0040272 00000000 00000000 00000000 00000000* L0040304 00000000 00000000 00000000 00000000* L0040336 00000000 00000000 00000000 00000000* L0040368 00000000 00000000 00000000 00000000* L0040400 00000000 00000000 00000000 00000000* -L0040432 10000000 00000000 00000000 00000000* +L0040432 00000000 00000000 00000000 00000000* L0040464 000000 000000 000000 000000* L0040488 000000 000000 000000 000000* L0040512 000000 000000 000000 000000* L0040536 000000 000000 000000 000000* -L0040560 100000 000000 000000 000000* +L0040560 000000 000000 000000 000000* L0040584 000000 000000 000000 000000* L0040608 00000000 00000000 00000000 00000000* L0040640 00000000 00000000 00000000 00000000* -L0040672 00000000 00000000 10000000 00000000* +L0040672 00000000 00000000 00000000 00000000* L0040704 00000000 00000000 00000000 00000000* L0040736 00000000 00000000 00000000 00000000* -L0040768 00000000 00000000 11100000 00000000* -L0040800 00000000 00000000 11100000 00000000* -L0040832 00000000 00000000 11100000 00000000* -L0040864 00000000 00000000 11100000 00000000* -L0040896 000000 000000 111000 000000* -L0040920 000000 000000 010000 000000* +L0040768 00000000 00000000 00000000 00000000* +L0040800 00000000 00000000 00000000 00000000* +L0040832 00000000 00000000 00000000 00000000* +L0040864 00000000 00000000 00000000 00000000* +L0040896 000000 000000 000000 000000* +L0040920 000000 000000 000000 000000* L0040944 000000 000000 000000 000000* L0040968 000000 000000 000000 000000* L0040992 000000 000000 000000 000000* L0041016 000000 000000 000000 000000* L0041040 00000000 00000000 00000000 00000000* -L0041072 00000000 00000000 00000000 10000000* +L0041072 00000000 00000000 00000000 00000000* L0041104 00000000 00000000 00000000 00000000* L0041136 00000000 00000000 00000000 00000000* L0041168 00000000 00000000 00000000 00000000* @@ -1483,8 +1483,8 @@ L0041400 000000 000000 000000 000000* L0041424 000000 000000 000000 000000* L0041448 000000 000000 000000 000000* L0041472 00000000 00000000 00000000 00000000* -L0041504 00000000 00000000 01000000 00000000* -L0041536 00000000 10000000 00000000 00000000* +L0041504 00000000 00000000 00000000 00000000* +L0041536 00000000 00000000 00000000 00000000* L0041568 00000000 00000000 00000000 00000000* L0041600 00000000 00000000 00000000 00000000* L0041632 00000000 00000000 00000000 00000000* @@ -1493,7 +1493,7 @@ L0041696 00000000 00000000 00000000 00000000* L0041728 00000000 00000000 00000000 00000000* L0041760 000000 000000 000000 000000* L0041784 000000 000000 000000 000000* -L0041808 000000 000000 000000 000000* +L0041808 000000 010000 000000 000000* L0041832 000000 000000 000000 000000* L0041856 000000 000000 000000 000000* L0041880 000000 000000 000000 000000* @@ -1506,7 +1506,7 @@ L0042064 00000000 00000000 00000000 00000000* L0042096 00000000 00000000 00000000 00000000* L0042128 00000000 00000000 00000000 00000000* L0042160 00000000 00000000 00000000 00000000* -L0042192 001000 000000 000000 000000* +L0042192 000000 000000 000000 000000* L0042216 000000 000000 000000 000000* L0042240 000000 000000 000000 000000* L0042264 000000 000000 000000 000000* @@ -1521,14 +1521,14 @@ L0042496 00000000 00000000 00000000 00000000* L0042528 00000000 00000000 00000000 00000000* L0042560 00000000 00000000 00000000 00000000* L0042592 00000000 00000000 00000000 00000000* -L0042624 000000 100000 000000 000000* +L0042624 000000 000000 000000 000000* L0042648 000000 000000 000000 000000* L0042672 000000 000000 000000 000000* -L0042696 000000 000000 000000 000000* +L0042696 000000 000000 000000 100000* L0042720 000000 000000 000000 000000* L0042744 000000 000000 000000 000000* L0042768 00000000 00000000 00000000 00000000* -L0042800 00000000 00000000 00010000 00000000* +L0042800 00000000 00000000 00000000 00000000* L0042832 00000000 00000000 00000000 00000000* L0042864 00000000 00000000 00000000 00000000* L0042896 00000000 00000000 00000000 00000000* @@ -1536,41 +1536,41 @@ L0042928 00000000 00000000 00000000 00000000* L0042960 00000000 00000000 00000000 00000000* L0042992 00000000 00000000 00000000 00000000* L0043024 00000000 00000000 00000000 00000000* -L0043056 000000 000000 100000 000000* +L0043056 000000 000000 000000 000000* L0043080 000000 000000 000000 000000* L0043104 000000 000000 000000 000000* L0043128 000000 000000 000000 000000* L0043152 000000 000000 000000 000000* L0043176 000000 000000 000000 000000* L0043200 00000000 00000000 00000000 00000000* -L0043232 00000000 10000000 00000000 00000000* -L0043264 00000000 10000000 00000000 00000000* +L0043232 00000000 00000000 00000000 00000000* +L0043264 00000000 00000000 00000000 00000000* L0043296 00000000 00000000 00000000 00000000* L0043328 00000000 00000000 00000000 00000000* L0043360 00000000 00000000 00000000 00000000* L0043392 00010000 00000000 00000000 00000000* -L0043424 00000000 10000000 00000000 00000000* +L0043424 00000000 00000000 00000000 00000000* L0043456 00000000 00000000 00000000 00000000* -L0043488 000000 100000 000000 000000* +L0043488 000000 000000 000000 000000* L0043512 000000 000000 000000 000000* L0043536 000000 000000 000000 000000* -L0043560 000000 000000 000000 000000* +L0043560 000000 010000 000000 000000* L0043584 000000 000000 000000 000000* L0043608 000000 000000 000000 000000* L0043632 00000000 00000000 00000000 00000000* L0043664 00000000 00000000 00000000 00000000* L0043696 00000000 00000000 00000000 00000000* -L0043728 00000000 00000000 00000100 00000000* +L0043728 00000000 00000000 00000000 00000000* L0043760 00000000 00000000 00000000 00000000* -L0043792 00000000 00000000 00000000 00000000* +L0043792 00100000 00000000 00000000 00000000* L0043824 00000000 00000000 00000000 00000000* L0043856 00000000 00000000 00000000 00000000* -L0043888 00100000 00000000 00000100 00000000* +L0043888 00000000 00000000 00000000 00000000* L0043920 000100 000000 000000 000000* -L0043944 000000 100000 000000 000000* -L0043968 000000 100000 100000 000000* -L0043992 000000 100000 000000 000000* -L0044016 000000 100000 000000 000000* +L0043944 000000 000000 000000 000000* +L0043968 000000 010000 000000 000000* +L0043992 000000 000000 000000 000000* +L0044016 000000 000000 000000 000000* L0044040 000000 000000 000000 000000* L0044064 00000000 00000000 00000000 00000000* L0044096 00000000 00000000 00000000 00000000* @@ -1584,7 +1584,7 @@ L0044320 00000000 00000000 00000000 00000000* L0044352 000000 000000 000000 000000* L0044376 000000 000000 000000 000000* L0044400 000000 000000 000000 000000* -L0044424 000000 000000 000000 000000* +L0044424 000000 010000 000000 000000* L0044448 000000 000000 000000 000000* L0044472 000000 000000 000000 000000* L0044496 00000000 00000000 00000000 00000000* @@ -1592,36 +1592,36 @@ L0044528 00000000 00000000 00000000 00000000* L0044560 00000000 00000000 00000000 00000000* L0044592 00000000 00000000 00000000 00000000* L0044624 00000000 00000000 00000000 00000000* -L0044656 00000000 00000000 01000000 00000000* -L0044688 00000000 00000000 00000000 00000000* -L0044720 00000000 00000000 00000000 00000000* -L0044752 00000000 00000000 00000000 00000000* -L0044784 000000 000000 000000 000000* -L0044808 000000 000000 000000 000000* -L0044832 000000 000000 000000 000000* -L0044856 000000 000000 000000 000000* -L0044880 000000 000000 000001 000000* -L0044904 010000 000000 000000 000000* +L0044656 01100100 00000000 11100000 00000000* +L0044688 01100100 00000000 11100000 00000000* +L0044720 01100100 00000000 11100000 00000000* +L0044752 01100100 00000000 10000000 00000000* +L0044784 010001 000000 000000 000000* +L0044808 010010 000000 000000 000000* +L0044832 010010 000000 000000 000000* +L0044856 010010 000000 000000 000000* +L0044880 010000 000000 000000 000000* +L0044904 000000 000000 000000 000000* L0044928 00000000 00000000 00000000 00000000* -L0044960 00000100 00000000 00000000 00000000* +L0044960 00000000 00000000 00000000 00000000* L0044992 00000000 00000000 00000000 00000000* L0045024 00000000 00000000 00000000 00000000* L0045056 00000000 00000000 00000000 00000000* L0045088 00000000 00000000 00000000 00000000* L0045120 00000000 00000000 00000000 00000000* -L0045152 00000000 00000000 01000000 00000000* +L0045152 00000000 00000000 00000000 00000000* L0045184 00000000 00000000 00000000 00000000* L0045216 000000 000000 000000 000000* L0045240 000000 000000 000000 000000* L0045264 000000 000000 000000 000000* L0045288 000000 000000 000000 000000* -L0045312 000000 000000 000001 000000* +L0045312 000000 000000 000000 000000* L0045336 000000 000000 000000 000000* L0045360 00000000 00000000 00000000 00000000* L0045392 00000000 00000000 00000000 00000000* L0045424 00000000 00000000 00000000 00000000* L0045456 00000000 00000000 00000000 00000000* -L0045488 00000100 00000000 00000000 00000000* +L0045488 00000000 00000000 00000000 00000000* L0045520 00000000 00000000 00000000 00000000* L0045552 00000000 00000000 00000000 00000000* L0045584 00000000 00000000 00000000 00000000* @@ -1630,18 +1630,18 @@ L0045648 000000 000000 000000 000000* L0045672 000000 000000 000000 000000* L0045696 000000 000000 000000 000000* L0045720 000000 000000 000000 000000* -L0045744 010000 000000 000000 000000* +L0045744 000000 000000 000000 000000* L0045768 000000 000000 000000 000000* L0045792 00000000 00000000 00000000 00000000* -L0045824 00000000 00000000 00000000 00000000* +L0045824 00100000 00000000 00000000 00000000* L0045856 00000000 00000000 00000000 00000000* L0045888 00000000 00000000 00000000 00000000* L0045920 00000000 00000000 00000000 00000000* L0045952 00000000 00000000 00000000 00000000* L0045984 00000000 00000000 00000000 00000000* -L0046016 00000000 00000000 00000000 00000000* +L0046016 00000000 00000000 00000000 00100000* L0046048 00000000 00000000 00000000 00000000* -L0046080 000000 000000 000000 100000* +L0046080 000000 000000 000000 000000* L0046104 000000 000000 000000 000000* L0046128 000000 000000 000000 000000* L0046152 000000 000000 000000 000000* @@ -1651,16 +1651,16 @@ L0046224 00000000 00000000 00000000 00000000* L0046256 00000000 00000000 00000000 00000000* L0046288 00000000 00000000 00000000 00000000* L0046320 00000000 00000000 00000000 00000000* -L0046352 00000000 00000000 00000000 00000000* -L0046384 01100100 00000000 00000000 00000000* -L0046416 01100100 00000000 00000000 10000000* -L0046448 01100100 00000000 00000000 00000000* -L0046480 01100100 00000000 00000000 00000000* -L0046512 011001 000000 000000 000000* -L0046536 010010 000000 000000 000000* -L0046560 010010 000000 000010 000000* -L0046584 010010 000000 000000 000000* -L0046608 010010 000000 000000 000000* -L0046632 010000 000000 000000 000000* -CDFEE* -1A8C +L0046352 00100000 00000000 00000000 00000000* +L0046384 00000000 00000000 00000000 00000000* +L0046416 00000000 00000000 00000000 00100000* +L0046448 00000000 00000000 00000000 00000000* +L0046480 00000000 00000000 00000000 00000000* +L0046512 000000 000000 000000 000000* +L0046536 000000 000000 000000 000000* +L0046560 000000 000000 000000 000000* +L0046584 000000 000000 000000 000000* +L0046608 000000 000000 000000 000000* +L0046632 000000 000000 000000 000000* +C6FA2* +190B diff --git a/spi6502b.mfd b/spi6502b.mfd index 96cfda5..5dee314 100644 --- a/spi6502b.mfd +++ b/spi6502b.mfd @@ -2,8 +2,8 @@ MDF Database: version 1.0 MDF_INFO | spi6502b | XC9572XL-10-PC44 MACROCELL | 1 | 1 | int_mosi ATTRIBUTES | 8652706 | 0 -INPUTS | 12 | shiftcnt<3> | shiftcnt<2> | shiftcnt<1> | shiftdone | spidataout<5> | shifting2 | spidataout<1> | start_shifting/start_shifting_RSTF__$INT.EXP | EXP6_.EXP | $OpTx$INV$22__$INT | cpu_Nres | tmo -INPUTMC | 11 | 2 | 15 | 2 | 16 | 3 | 9 | 2 | 2 | 3 | 6 | 2 | 0 | 0 | 2 | 1 | 0 | 1 | 2 | 2 | 3 | 0 | 6 +INPUTS | 12 | shiftcnt<3> | shiftcnt<2> | shiftcnt<1> | shiftdone | spidataout<5> | shifting2 | spidataout<1> | EXP6_.EXP | shifting2.EXP | $OpTx$INV$22__$INT | cpu_Nres | tmo +INPUTMC | 11 | 1 | 14 | 1 | 15 | 1 | 16 | 1 | 3 | 3 | 5 | 1 | 2 | 0 | 2 | 1 | 0 | 1 | 2 | 1 | 5 | 0 | 6 INPUTP | 1 | 49 IMPORTS | 2 | 1 | 0 | 1 | 2 EQ | 21 | @@ -12,82 +12,35 @@ EQ | 21 | # !shiftcnt<3> & shiftcnt<2> & !shiftcnt<1> & !shiftdone & !spidataout<5> & shifting2 ;Imported pterms FB2_1 - # shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & - !shiftdone & !spidataout<3> & shifting2 - # !shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & - !shiftdone & !spidataout<7> & shifting2 -;Imported pterms FB2_3 # shiftcnt<3> & shiftcnt<2> & shiftcnt<1> & !shiftdone & !spidataout<0> & shifting2 # shiftcnt<3> & !shiftcnt<2> & shiftcnt<1> & !shiftdone & !spidataout<2> & shifting2 + # shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & + !shiftdone & !spidataout<3> & shifting2 # !shiftcnt<3> & shiftcnt<2> & shiftcnt<1> & !shiftdone & !spidataout<4> & shifting2 + # !shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & + !shiftdone & !spidataout<7> & shifting2 +;Imported pterms FB2_3 # !shiftcnt<3> & !shiftcnt<2> & shiftcnt<1> & !shiftdone & !spidataout<6> & shifting2; spi_mosi.CLK = !$OpTx$INV$22__$INT; spi_mosi.AP = !cpu_Nres; spi_mosi.OE = !tmo; -MACROCELL | 3 | 10 | slavesel<0> +MACROCELL | 3 | 10 | slavesel ATTRIBUTES | 4588514 | 0 -OUTPUTMC | 4 | 3 | 10 | 3 | 0 | 0 | 4 | 3 | 13 -INPUTS | 8 | spi_Nsel<0> | cpu_a<1> | cpu_a<0> | cpu_d<0>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +OUTPUTMC | 4 | 3 | 10 | 1 | 13 | 0 | 4 | 3 | 13 +INPUTS | 8 | spi_Nsel | cpu_a<1> | cpu_a<0> | cpu_d<0>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 3 | 10 INPUTP | 7 | 59 | 52 | 12 | 50 | 46 | 49 | 24 -EQ | 7 | - spi_Nsel<0>.T = spi_Nsel<0> & cpu_a<1> & cpu_a<0> & - !cpu_d<0>.PIN - # !spi_Nsel<0> & cpu_a<1> & cpu_a<0> & - cpu_d<0>.PIN; - !spi_Nsel<0>.CLK = cs1 & !Ncs2; - spi_Nsel<0>.AP = !cpu_Nres; - spi_Nsel<0>.CE = !cpu_rnw; - -MACROCELL | 3 | 7 | slavesel<1> -ATTRIBUTES | 4588514 | 0 -OUTPUTMC | 3 | 3 | 7 | 3 | 0 | 0 | 5 -INPUTS | 8 | spi_Nsel<1> | cpu_a<1> | cpu_a<0> | cpu_d<1>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 7 -INPUTP | 7 | 59 | 52 | 13 | 50 | 46 | 49 | 24 -EQ | 7 | - spi_Nsel<1>.T = spi_Nsel<1> & cpu_a<1> & cpu_a<0> & - !cpu_d<1>.PIN - # !spi_Nsel<1> & cpu_a<1> & cpu_a<0> & - cpu_d<1>.PIN; - !spi_Nsel<1>.CLK = cs1 & !Ncs2; - spi_Nsel<1>.AP = !cpu_Nres; - spi_Nsel<1>.CE = !cpu_rnw; - -MACROCELL | 3 | 4 | slavesel<2> -ATTRIBUTES | 4588514 | 0 -OUTPUTMC | 3 | 3 | 4 | 3 | 17 | 0 | 7 -INPUTS | 8 | spi_Nsel<2> | cpu_a<1> | cpu_a<0> | cpu_d<2>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 4 -INPUTP | 7 | 59 | 52 | 15 | 50 | 46 | 49 | 24 -EQ | 7 | - spi_Nsel<2>.T = spi_Nsel<2> & cpu_a<1> & cpu_a<0> & - !cpu_d<2>.PIN - # !spi_Nsel<2> & cpu_a<1> & cpu_a<0> & - cpu_d<2>.PIN; - !spi_Nsel<2>.CLK = cs1 & !Ncs2; - spi_Nsel<2>.AP = !cpu_Nres; - spi_Nsel<2>.CE = !cpu_rnw; - -MACROCELL | 3 | 1 | slavesel<3> -ATTRIBUTES | 4588514 | 0 -OUTPUTMC | 3 | 3 | 1 | 3 | 17 | 0 | 14 -INPUTS | 8 | spi_Nsel<3> | cpu_a<1> | cpu_a<0> | cpu_d<3>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 1 -INPUTP | 7 | 59 | 52 | 26 | 50 | 46 | 49 | 24 -EQ | 7 | - spi_Nsel<3>.T = spi_Nsel<3> & cpu_a<1> & cpu_a<0> & - !cpu_d<3>.PIN - # !spi_Nsel<3> & cpu_a<1> & cpu_a<0> & - cpu_d<3>.PIN; - !spi_Nsel<3>.CLK = cs1 & !Ncs2; - spi_Nsel<3>.AP = !cpu_Nres; - spi_Nsel<3>.CE = !cpu_rnw; +EQ | 5 | + spi_Nsel.T = spi_Nsel & cpu_a<1> & cpu_a<0> & !cpu_d<0>.PIN + # !spi_Nsel & cpu_a<1> & cpu_a<0> & cpu_d<0>.PIN; + !spi_Nsel.CLK = cs1 & !Ncs2; + spi_Nsel.AP = !cpu_Nres; + spi_Nsel.CE = !cpu_rnw; MACROCELL | 0 | 15 | cpol ATTRIBUTES | 4326256 | 0 @@ -104,7 +57,7 @@ EQ | 5 | MACROCELL | 0 | 10 | ece ATTRIBUTES | 4326256 | 0 -OUTPUTMC | 3 | 0 | 10 | 0 | 7 | 2 | 3 +OUTPUTMC | 3 | 0 | 10 | 0 | 7 | 1 | 5 INPUTS | 8 | ece | cpu_a<1> | cpu_a<0> | cpu_d<2>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 0 | 10 INPUTP | 7 | 59 | 52 | 15 | 50 | 46 | 49 | 24 @@ -130,7 +83,7 @@ EQ | 5 | MACROCELL | 0 | 9 | frx ATTRIBUTES | 4326256 | 0 -OUTPUTMC | 3 | 0 | 9 | 2 | 5 | 0 | 16 +OUTPUTMC | 3 | 0 | 9 | 3 | 2 | 0 | 16 INPUTS | 8 | frx | cpu_a<1> | cpu_a<0> | cpu_d<4>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 0 | 9 INPUTP | 7 | 59 | 52 | 27 | 50 | 46 | 49 | 24 @@ -141,87 +94,31 @@ EQ | 5 | frx.AR = !cpu_Nres; frx.CE = !cpu_rnw; -MACROCELL | 3 | 15 | ier +MACROCELL | 3 | 8 | ier ATTRIBUTES | 4326256 | 0 -OUTPUTMC | 5 | 3 | 15 | 2 | 4 | 2 | 17 | 3 | 14 | 3 | 16 -INPUTS | 13 | ier | cpu_a<1> | cpu_a<0> | cpu_d<6>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw | cpha | shiftcnt<0> | shiftdone | shifting2 | slaveinten<1>.EXP -INPUTMC | 6 | 3 | 15 | 0 | 17 | 3 | 2 | 2 | 2 | 2 | 0 | 3 | 14 +OUTPUTMC | 3 | 3 | 8 | 2 | 4 | 3 | 0 +INPUTS | 8 | ier | cpu_a<1> | cpu_a<0> | cpu_d<6>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +INPUTMC | 1 | 3 | 8 INPUTP | 7 | 59 | 52 | 31 | 50 | 46 | 49 | 24 -EXPORTS | 1 | 3 | 16 -IMPORTS | 1 | 3 | 14 -EQ | 8 | - ier.T = !ier & !cpu_a<1> & cpu_a<0> & cpu_d<6>.PIN -;Imported pterms FB4_15 - # ier & !cpu_a<1> & cpu_a<0> & !cpu_d<6>.PIN; +EQ | 5 | + ier.T = ier & !cpu_a<1> & cpu_a<0> & !cpu_d<6>.PIN + # !ier & !cpu_a<1> & cpu_a<0> & cpu_d<6>.PIN; !ier.CLK = cs1 & !Ncs2; ier.AR = !cpu_Nres; ier.CE = !cpu_rnw; - ier.EXP = cpu_Nres & cpha & !shiftcnt<0> & !shiftdone & - shifting2 -MACROCELL | 0 | 8 | slaveinten<0> +MACROCELL | 0 | 8 | slaveinten ATTRIBUTES | 4326256 | 0 -OUTPUTMC | 3 | 0 | 8 | 0 | 16 | 2 | 17 -INPUTS | 8 | slaveinten<0> | cpu_a<1> | cpu_a<0> | cpu_d<4>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +OUTPUTMC | 3 | 0 | 8 | 0 | 16 | 3 | 0 +INPUTS | 8 | slaveinten | cpu_a<1> | cpu_a<0> | cpu_d<4>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 0 | 8 INPUTP | 7 | 59 | 52 | 27 | 50 | 46 | 49 | 24 -EQ | 7 | - slaveinten<0>.T = slaveinten<0> & cpu_a<1> & cpu_a<0> & - !cpu_d<4>.PIN - # !slaveinten<0> & cpu_a<1> & cpu_a<0> & - cpu_d<4>.PIN; - !slaveinten<0>.CLK = cs1 & !Ncs2; - slaveinten<0>.AR = !cpu_Nres; - slaveinten<0>.CE = !cpu_rnw; - -MACROCELL | 3 | 14 | slaveinten<1> -ATTRIBUTES | 4326256 | 0 -OUTPUTMC | 5 | 3 | 14 | 2 | 1 | 2 | 17 | 3 | 13 | 3 | 15 -INPUTS | 11 | slaveinten<1> | cpu_a<1> | cpu_a<0> | cpu_d<5>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw | ier | cpu_d<6>.PIN | diag_OBUF.EXP -INPUTMC | 3 | 3 | 14 | 3 | 15 | 3 | 13 -INPUTP | 8 | 59 | 52 | 29 | 50 | 46 | 49 | 24 | 31 -EXPORTS | 1 | 3 | 15 -IMPORTS | 1 | 3 | 13 -EQ | 9 | - slaveinten<1>.T = !slaveinten<1> & cpu_a<1> & cpu_a<0> & - cpu_d<5>.PIN -;Imported pterms FB4_14 - # slaveinten<1> & cpu_a<1> & cpu_a<0> & - !cpu_d<5>.PIN; - !slaveinten<1>.CLK = cs1 & !Ncs2; - slaveinten<1>.AR = !cpu_Nres; - slaveinten<1>.CE = !cpu_rnw; - slaveinten<1>.EXP = ier & !cpu_a<1> & cpu_a<0> & !cpu_d<6>.PIN - -MACROCELL | 3 | 12 | slaveinten<2> -ATTRIBUTES | 4326256 | 0 -OUTPUTMC | 3 | 3 | 12 | 2 | 4 | 2 | 17 -INPUTS | 8 | slaveinten<2> | cpu_a<1> | cpu_a<0> | cpu_d<6>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 12 -INPUTP | 7 | 59 | 52 | 31 | 50 | 46 | 49 | 24 -EQ | 7 | - slaveinten<2>.T = slaveinten<2> & cpu_a<1> & cpu_a<0> & - !cpu_d<6>.PIN - # !slaveinten<2> & cpu_a<1> & cpu_a<0> & - cpu_d<6>.PIN; - !slaveinten<2>.CLK = cs1 & !Ncs2; - slaveinten<2>.AR = !cpu_Nres; - slaveinten<2>.CE = !cpu_rnw; - -MACROCELL | 3 | 11 | slaveinten<3> -ATTRIBUTES | 4326256 | 0 -OUTPUTMC | 3 | 3 | 11 | 2 | 7 | 2 | 17 -INPUTS | 8 | slaveinten<3> | cpu_a<1> | cpu_a<0> | cpu_d<7>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 11 -INPUTP | 7 | 59 | 52 | 33 | 50 | 46 | 49 | 24 -EQ | 7 | - slaveinten<3>.T = slaveinten<3> & cpu_a<1> & cpu_a<0> & - !cpu_d<7>.PIN - # !slaveinten<3> & cpu_a<1> & cpu_a<0> & - cpu_d<7>.PIN; - !slaveinten<3>.CLK = cs1 & !Ncs2; - slaveinten<3>.AR = !cpu_Nres; - slaveinten<3>.CE = !cpu_rnw; +EQ | 5 | + slaveinten.T = slaveinten & cpu_a<1> & cpu_a<0> & !cpu_d<4>.PIN + # !slaveinten & cpu_a<1> & cpu_a<0> & cpu_d<4>.PIN; + !slaveinten.CLK = cs1 & !Ncs2; + slaveinten.AR = !cpu_Nres; + slaveinten.CE = !cpu_rnw; MACROCELL | 0 | 6 | tmo ATTRIBUTES | 4326256 | 0 @@ -275,28 +172,23 @@ EQ | 5 | divisor<2>.AR = !cpu_Nres; divisor<2>.CE = !cpu_rnw; -MACROCELL | 3 | 17 | spidatain<0> +MACROCELL | 1 | 13 | spidatain<0> ATTRIBUTES | 8520560 | 0 -OUTPUTMC | 2 | 2 | 14 | 0 | 4 -INPUTS | 9 | spi_Nsel<3> | spi_miso<3> | spi_Nsel<2> | spi_miso<2> | tc.EXP | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 6 | 3 | 1 | 3 | 4 | 3 | 0 | 2 | 3 | 3 | 2 | 2 | 0 -INPUTP | 3 | 89 | 90 | 49 -IMPORTS | 1 | 3 | 0 -EQ | 8 | - spidatain<0>.D = !spi_Nsel<2> & spi_miso<2> - # !spi_Nsel<3> & spi_miso<3> -;Imported pterms FB4_1 - # !spi_Nsel<0> & spi_miso<0> - # !spi_Nsel<1> & spi_miso<1>; +OUTPUTMC | 2 | 1 | 12 | 0 | 4 +INPUTS | 6 | spi_Nsel | spi_miso | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 +INPUTMC | 4 | 3 | 10 | 1 | 5 | 1 | 4 | 1 | 2 +INPUTP | 2 | 10 | 49 +EQ | 4 | + spidatain<0>.D = !spi_Nsel & spi_miso; spidatain<0>.CLK = !$OpTx$INV$22__$INT; spidatain<0>.AR = !cpu_Nres; spidatain<0>.CE = shiftcnt<0> & shifting2; -MACROCELL | 2 | 14 | spidatain<1> +MACROCELL | 1 | 12 | spidatain<1> ATTRIBUTES | 8520560 | 0 -OUTPUTMC | 2 | 2 | 13 | 0 | 5 +OUTPUTMC | 2 | 1 | 11 | 0 | 5 INPUTS | 5 | spidatain<0> | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 4 | 3 | 17 | 2 | 3 | 3 | 2 | 2 | 0 +INPUTMC | 4 | 1 | 13 | 1 | 5 | 1 | 4 | 1 | 2 INPUTP | 1 | 49 EQ | 4 | spidatain<1>.D = spidatain<0>; @@ -304,11 +196,11 @@ EQ | 4 | spidatain<1>.AR = !cpu_Nres; spidatain<1>.CE = shiftcnt<0> & shifting2; -MACROCELL | 2 | 13 | spidatain<2> +MACROCELL | 1 | 11 | spidatain<2> ATTRIBUTES | 8520560 | 0 -OUTPUTMC | 2 | 2 | 12 | 0 | 7 +OUTPUTMC | 2 | 1 | 10 | 0 | 7 INPUTS | 5 | spidatain<1> | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 4 | 2 | 14 | 2 | 3 | 3 | 2 | 2 | 0 +INPUTMC | 4 | 1 | 12 | 1 | 5 | 1 | 4 | 1 | 2 INPUTP | 1 | 49 EQ | 4 | spidatain<2>.D = spidatain<1>; @@ -316,11 +208,11 @@ EQ | 4 | spidatain<2>.AR = !cpu_Nres; spidatain<2>.CE = shiftcnt<0> & shifting2; -MACROCELL | 2 | 12 | spidatain<3> +MACROCELL | 1 | 10 | spidatain<3> ATTRIBUTES | 8520560 | 0 -OUTPUTMC | 2 | 2 | 11 | 0 | 14 +OUTPUTMC | 2 | 1 | 9 | 0 | 14 INPUTS | 5 | spidatain<2> | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 4 | 2 | 13 | 2 | 3 | 3 | 2 | 2 | 0 +INPUTMC | 4 | 1 | 11 | 1 | 5 | 1 | 4 | 1 | 2 INPUTP | 1 | 49 EQ | 4 | spidatain<3>.D = spidatain<2>; @@ -328,11 +220,11 @@ EQ | 4 | spidatain<3>.AR = !cpu_Nres; spidatain<3>.CE = shiftcnt<0> & shifting2; -MACROCELL | 2 | 11 | spidatain<4> +MACROCELL | 1 | 9 | spidatain<4> ATTRIBUTES | 8520560 | 0 -OUTPUTMC | 2 | 2 | 10 | 0 | 16 +OUTPUTMC | 2 | 1 | 8 | 0 | 16 INPUTS | 5 | spidatain<3> | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 4 | 2 | 12 | 2 | 3 | 3 | 2 | 2 | 0 +INPUTMC | 4 | 1 | 10 | 1 | 5 | 1 | 4 | 1 | 2 INPUTP | 1 | 49 EQ | 4 | spidatain<4>.D = spidatain<3>; @@ -340,11 +232,11 @@ EQ | 4 | spidatain<4>.AR = !cpu_Nres; spidatain<4>.CE = shiftcnt<0> & shifting2; -MACROCELL | 2 | 10 | spidatain<5> +MACROCELL | 1 | 8 | spidatain<5> ATTRIBUTES | 8520560 | 0 -OUTPUTMC | 2 | 2 | 9 | 2 | 1 +OUTPUTMC | 2 | 1 | 7 | 2 | 1 INPUTS | 5 | spidatain<4> | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 4 | 2 | 11 | 2 | 3 | 3 | 2 | 2 | 0 +INPUTMC | 4 | 1 | 9 | 1 | 5 | 1 | 4 | 1 | 2 INPUTP | 1 | 49 EQ | 4 | spidatain<5>.D = spidatain<4>; @@ -352,11 +244,11 @@ EQ | 4 | spidatain<5>.AR = !cpu_Nres; spidatain<5>.CE = shiftcnt<0> & shifting2; -MACROCELL | 2 | 9 | spidatain<6> +MACROCELL | 1 | 7 | spidatain<6> ATTRIBUTES | 8520560 | 0 -OUTPUTMC | 2 | 2 | 6 | 2 | 4 +OUTPUTMC | 2 | 1 | 6 | 2 | 4 INPUTS | 5 | spidatain<5> | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 4 | 2 | 10 | 2 | 3 | 3 | 2 | 2 | 0 +INPUTMC | 4 | 1 | 8 | 1 | 5 | 1 | 4 | 1 | 2 INPUTP | 1 | 49 EQ | 4 | spidatain<6>.D = spidatain<5>; @@ -364,11 +256,11 @@ EQ | 4 | spidatain<6>.AR = !cpu_Nres; spidatain<6>.CE = shiftcnt<0> & shifting2; -MACROCELL | 2 | 6 | spidatain<7> +MACROCELL | 1 | 6 | spidatain<7> ATTRIBUTES | 8520560 | 0 OUTPUTMC | 1 | 2 | 7 INPUTS | 5 | spidatain<6> | $OpTx$INV$22__$INT | cpu_Nres | shiftcnt<0> | shifting2 -INPUTMC | 4 | 2 | 9 | 2 | 3 | 3 | 2 | 2 | 0 +INPUTMC | 4 | 1 | 7 | 1 | 5 | 1 | 4 | 1 | 2 INPUTP | 1 | 49 EQ | 4 | spidatain<7>.D = spidatain<6>; @@ -378,8 +270,8 @@ EQ | 4 | MACROCELL | 3 | 16 | int_sclk ATTRIBUTES | 8651698 | 0 -INPUTS | 8 | cpol | cpu_Nres | cpha | shiftcnt<0> | shiftdone | shifting2 | $OpTx$INV$22__$INT | ier.EXP -INPUTMC | 7 | 0 | 15 | 0 | 17 | 3 | 2 | 2 | 2 | 2 | 0 | 2 | 3 | 3 | 15 +INPUTS | 8 | cpol | cpu_Nres | cpha | shiftcnt<0> | shiftdone | shifting2 | $OpTx$INV$22__$INT | EXP7_.EXP +INPUTMC | 7 | 0 | 15 | 0 | 17 | 1 | 4 | 1 | 3 | 1 | 2 | 1 | 5 | 3 | 15 INPUTP | 1 | 49 IMPORTS | 1 | 3 | 15 EQ | 9 | @@ -393,11 +285,61 @@ EQ | 9 | spi_sclk.AP = !cpu_Nres & cpol; spi_sclk.AR = !cpu_Nres & !cpol; -MACROCELL | 2 | 15 | shiftcnt<3> +MACROCELL | 0 | 14 | int_dout<3> +ATTRIBUTES | 265986 | 0 +INPUTS | 8 | cpu_rnw | spidatain<3> | cpu_a<1> | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | tmo +INPUTMC | 2 | 1 | 10 | 0 | 6 +INPUTP | 6 | 24 | 59 | 50 | 46 | 52 | 20 +EQ | 5 | + cpu_d<3> = cpu_rnw & tmo & !cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & spidatain<3> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2; + cpu_d<3>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; + +MACROCELL | 2 | 1 | int_dout<5> +ATTRIBUTES | 265986 | 0 +INPUTS | 9 | cpu_rnw | cpu_a<1> | start_shifting | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | shifting2 | spidatain<5> +INPUTMC | 3 | 3 | 2 | 1 | 2 | 1 | 8 +INPUTP | 6 | 24 | 59 | 50 | 46 | 52 | 20 +EQ | 7 | + cpu_d<5> = cpu_rnw & spidatain<5> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2 + # cpu_rnw & !cpu_a<1> & start_shifting & cs1 & + !Ncs2 & cpu_a<0> & cpu_Nphi2 + # cpu_rnw & !cpu_a<1> & cs1 & !Ncs2 & cpu_a<0> & + shifting2 & cpu_Nphi2; + cpu_d<5>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; + +MACROCELL | 2 | 4 | int_dout<6> +ATTRIBUTES | 265986 | 0 +INPUTS | 8 | cpu_rnw | spidatain<6> | cpu_a<1> | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | ier +INPUTMC | 2 | 1 | 7 | 3 | 8 +INPUTP | 6 | 24 | 59 | 50 | 46 | 52 | 20 +EQ | 5 | + cpu_d<6> = cpu_rnw & ier & !cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & spidatain<6> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2; + cpu_d<6>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; + +MACROCELL | 2 | 7 | int_dout<7> +ATTRIBUTES | 265986 | 0 +INPUTS | 8 | cpu_rnw | spidatain<7> | cpu_a<1> | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | tc +INPUTMC | 2 | 1 | 6 | 3 | 1 +INPUTP | 6 | 24 | 59 | 50 | 46 | 52 | 20 +EQ | 5 | + cpu_d<7> = cpu_rnw & spidatain<7> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2 + # cpu_rnw & !cpu_a<1> & tc & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2; + cpu_d<7>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; + +MACROCELL | 1 | 14 | shiftcnt<3> ATTRIBUTES | 4326192 | 0 -OUTPUTMC | 5 | 1 | 1 | 2 | 15 | 2 | 2 | 1 | 0 | 1 | 2 +OUTPUTMC | 5 | 1 | 1 | 1 | 14 | 1 | 3 | 1 | 0 | 1 | 2 INPUTS | 7 | shiftcnt<2> | shiftcnt<0> | shiftcnt<1> | shifting2 | shiftcnt<3> | $OpTx$INV$22__$INT | cpu_Nres -INPUTMC | 6 | 2 | 16 | 3 | 2 | 3 | 9 | 2 | 0 | 2 | 15 | 2 | 3 +INPUTMC | 6 | 1 | 15 | 1 | 4 | 1 | 16 | 1 | 2 | 1 | 14 | 1 | 5 INPUTP | 1 | 49 EQ | 5 | shiftcnt<3>.T = shiftcnt<3> & !shifting2 @@ -406,11 +348,11 @@ EQ | 5 | shiftcnt<3>.CLK = !$OpTx$INV$22__$INT; shiftcnt<3>.AR = !cpu_Nres; -MACROCELL | 2 | 16 | shiftcnt<2> +MACROCELL | 1 | 15 | shiftcnt<2> ATTRIBUTES | 4326192 | 0 -OUTPUTMC | 6 | 1 | 1 | 2 | 15 | 2 | 16 | 2 | 2 | 1 | 0 | 1 | 2 +OUTPUTMC | 6 | 1 | 1 | 1 | 14 | 1 | 15 | 1 | 3 | 1 | 0 | 1 | 2 INPUTS | 6 | shiftcnt<0> | shiftcnt<1> | shifting2 | shiftcnt<2> | $OpTx$INV$22__$INT | cpu_Nres -INPUTMC | 5 | 3 | 2 | 3 | 9 | 2 | 0 | 2 | 16 | 2 | 3 +INPUTMC | 5 | 1 | 4 | 1 | 16 | 1 | 2 | 1 | 15 | 1 | 5 INPUTP | 1 | 49 EQ | 4 | shiftcnt<2>.T = shiftcnt<2> & !shifting2 @@ -418,22 +360,22 @@ EQ | 4 | shiftcnt<2>.CLK = !$OpTx$INV$22__$INT; shiftcnt<2>.AR = !cpu_Nres; -MACROCELL | 3 | 2 | shiftcnt<0> +MACROCELL | 1 | 4 | shiftcnt<0> ATTRIBUTES | 8520496 | 0 -OUTPUTMC | 15 | 3 | 17 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 2 | 9 | 2 | 6 | 3 | 16 | 2 | 15 | 2 | 16 | 3 | 2 | 3 | 9 | 2 | 2 | 3 | 15 +OUTPUTMC | 15 | 1 | 13 | 1 | 12 | 1 | 11 | 1 | 10 | 1 | 9 | 1 | 8 | 1 | 7 | 1 | 6 | 3 | 16 | 1 | 14 | 1 | 15 | 1 | 4 | 1 | 16 | 1 | 3 | 3 | 15 INPUTS | 4 | shiftcnt<0> | shifting2 | $OpTx$INV$22__$INT | cpu_Nres -INPUTMC | 3 | 3 | 2 | 2 | 0 | 2 | 3 +INPUTMC | 3 | 1 | 4 | 1 | 2 | 1 | 5 INPUTP | 1 | 49 EQ | 3 | shiftcnt<0>.D = !shiftcnt<0> & shifting2; shiftcnt<0>.CLK = !$OpTx$INV$22__$INT; shiftcnt<0>.AR = !cpu_Nres; -MACROCELL | 3 | 9 | shiftcnt<1> +MACROCELL | 1 | 16 | shiftcnt<1> ATTRIBUTES | 8520496 | 0 -OUTPUTMC | 7 | 1 | 1 | 2 | 15 | 2 | 16 | 3 | 9 | 2 | 2 | 1 | 0 | 1 | 2 +OUTPUTMC | 7 | 1 | 1 | 1 | 14 | 1 | 15 | 1 | 16 | 1 | 3 | 1 | 0 | 1 | 2 INPUTS | 5 | shiftcnt<0> | shiftcnt<1> | shifting2 | $OpTx$INV$22__$INT | cpu_Nres -INPUTMC | 4 | 3 | 2 | 3 | 9 | 2 | 0 | 2 | 3 +INPUTMC | 4 | 1 | 4 | 1 | 16 | 1 | 2 | 1 | 5 INPUTP | 1 | 49 EQ | 4 | shiftcnt<1>.D = shiftcnt<0> & !shiftcnt<1> & shifting2 @@ -441,11 +383,11 @@ EQ | 4 | shiftcnt<1>.CLK = !$OpTx$INV$22__$INT; shiftcnt<1>.AR = !cpu_Nres; -MACROCELL | 2 | 2 | shiftdone +MACROCELL | 1 | 3 | shiftdone ATTRIBUTES | 8520496 | 0 -OUTPUTMC | 7 | 1 | 1 | 3 | 16 | 3 | 0 | 2 | 0 | 1 | 0 | 1 | 2 | 3 | 15 +OUTPUTMC | 7 | 1 | 1 | 3 | 16 | 3 | 1 | 1 | 2 | 1 | 17 | 1 | 0 | 3 | 15 INPUTS | 6 | shiftcnt<3> | shiftcnt<2> | shiftcnt<0> | shiftcnt<1> | $OpTx$INV$22__$INT | cpu_Nres -INPUTMC | 5 | 2 | 15 | 2 | 16 | 3 | 2 | 3 | 9 | 2 | 3 +INPUTMC | 5 | 1 | 14 | 1 | 15 | 1 | 4 | 1 | 16 | 1 | 5 INPUTP | 1 | 49 EQ | 4 | shiftdone.D = shiftcnt<3> & shiftcnt<2> & shiftcnt<0> & @@ -453,43 +395,40 @@ EQ | 4 | shiftdone.CLK = !$OpTx$INV$22__$INT; shiftdone.AR = !cpu_Nres; -MACROCELL | 2 | 5 | start_shifting +MACROCELL | 3 | 2 | start_shifting ATTRIBUTES | 4326192 | 0 -OUTPUTMC | 5 | 2 | 5 | 2 | 1 | 2 | 0 | 3 | 13 | 2 | 3 -INPUTS | 8 | frx | start_shifting | cpu_a<1> | cpu_a<0> | cpu_rnw | cs1 | Ncs2 | start_shifting/start_shifting_RSTF__$INT -INPUTMC | 3 | 0 | 9 | 2 | 5 | 1 | 0 +OUTPUTMC | 5 | 2 | 1 | 3 | 2 | 1 | 2 | 3 | 13 | 1 | 5 +INPUTS | 8 | frx | cpu_a<1> | start_shifting | cpu_a<0> | cpu_rnw | cs1 | Ncs2 | start_shifting/start_shifting_RSTF__$INT +INPUTMC | 3 | 0 | 9 | 3 | 2 | 1 | 17 INPUTP | 5 | 59 | 52 | 24 | 50 | 46 EQ | 4 | - start_shifting.T = !cpu_rnw & !start_shifting & !cpu_a<1> & !cpu_a<0> - # frx & !start_shifting & !cpu_a<1> & !cpu_a<0>; + start_shifting.T = !cpu_rnw & !cpu_a<1> & !start_shifting & !cpu_a<0> + # frx & !cpu_a<1> & !start_shifting & !cpu_a<0>; !start_shifting.CLK = cs1 & !Ncs2; start_shifting.AR = !start_shifting/start_shifting_RSTF__$INT; -MACROCELL | 3 | 0 | tc +MACROCELL | 3 | 1 | tc ATTRIBUTES | 8520672 | 0 -OUTPUTMC | 3 | 2 | 7 | 2 | 17 | 3 | 17 -INPUTS | 9 | cs1 | Ncs2 | shiftdone | cpu_a<1> | cpu_a<0> | spi_Nsel<0> | spi_miso<0> | spi_Nsel<1> | spi_miso<1> -INPUTMC | 3 | 2 | 2 | 3 | 10 | 3 | 7 -INPUTP | 6 | 50 | 46 | 59 | 52 | 10 | 9 -EXPORTS | 1 | 3 | 17 -EQ | 6 | +OUTPUTMC | 2 | 2 | 7 | 3 | 0 +INPUTS | 5 | cs1 | Ncs2 | shiftdone | cpu_a<1> | cpu_a<0> +INPUTMC | 1 | 1 | 3 +INPUTP | 4 | 50 | 46 | 59 | 52 +EQ | 4 | tc.D = Gnd; !tc.CLK = cs1 & !Ncs2; tc.AP = shiftdone; tc.CE = !cpu_a<1> & !cpu_a<0>; - tc.EXP = !spi_Nsel<0> & spi_miso<0> - # !spi_Nsel<1> & spi_miso<1> MACROCELL | 0 | 3 | spidataout<0> ATTRIBUTES | 4326240 | 0 -OUTPUTMC | 2 | 0 | 3 | 1 | 2 -INPUTS | 8 | spidataout<0> | cpu_a<1> | cpu_a<0> | cpu_d<0>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +OUTPUTMC | 2 | 1 | 0 | 0 | 3 +INPUTS | 8 | cpu_a<1> | spidataout<0> | cpu_a<0> | cpu_d<0>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 0 | 3 INPUTP | 7 | 59 | 52 | 12 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<0>.T = spidataout<0> & !cpu_a<1> & !cpu_a<0> & + spidataout<0>.T = !cpu_a<1> & spidataout<0> & !cpu_a<0> & !cpu_d<0>.PIN - # !spidataout<0> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<0> & !cpu_a<0> & cpu_d<0>.PIN; !spidataout<0>.CLK = cs1 & !Ncs2; spidataout<0>.CE = cpu_Nres & !cpu_rnw; @@ -497,83 +436,83 @@ EQ | 6 | MACROCELL | 0 | 2 | spidataout<1> ATTRIBUTES | 4326240 | 0 OUTPUTMC | 2 | 1 | 1 | 0 | 2 -INPUTS | 8 | spidataout<1> | cpu_a<1> | cpu_a<0> | cpu_d<1>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +INPUTS | 8 | cpu_a<1> | spidataout<1> | cpu_a<0> | cpu_d<1>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 0 | 2 INPUTP | 7 | 59 | 52 | 13 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<1>.T = spidataout<1> & !cpu_a<1> & !cpu_a<0> & + spidataout<1>.T = !cpu_a<1> & spidataout<1> & !cpu_a<0> & !cpu_d<1>.PIN - # !spidataout<1> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<1> & !cpu_a<0> & cpu_d<1>.PIN; !spidataout<1>.CLK = cs1 & !Ncs2; spidataout<1>.CE = cpu_Nres & !cpu_rnw; MACROCELL | 0 | 1 | spidataout<2> ATTRIBUTES | 4326240 | 0 -OUTPUTMC | 2 | 0 | 1 | 1 | 2 -INPUTS | 8 | spidataout<2> | cpu_a<1> | cpu_a<0> | cpu_d<2>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +OUTPUTMC | 2 | 1 | 0 | 0 | 1 +INPUTS | 8 | cpu_a<1> | spidataout<2> | cpu_a<0> | cpu_d<2>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 0 | 1 INPUTP | 7 | 59 | 52 | 15 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<2>.T = spidataout<2> & !cpu_a<1> & !cpu_a<0> & + spidataout<2>.T = !cpu_a<1> & spidataout<2> & !cpu_a<0> & !cpu_d<2>.PIN - # !spidataout<2> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<2> & !cpu_a<0> & cpu_d<2>.PIN; !spidataout<2>.CLK = cs1 & !Ncs2; spidataout<2>.CE = cpu_Nres & !cpu_rnw; -MACROCELL | 0 | 0 | spidataout<3> +MACROCELL | 3 | 7 | spidataout<3> ATTRIBUTES | 4326240 | 0 -OUTPUTMC | 2 | 1 | 0 | 0 | 0 -INPUTS | 8 | spidataout<3> | cpu_a<1> | cpu_a<0> | cpu_d<3>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 0 | 0 +OUTPUTMC | 2 | 1 | 0 | 3 | 7 +INPUTS | 8 | cpu_a<1> | spidataout<3> | cpu_a<0> | cpu_d<3>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +INPUTMC | 1 | 3 | 7 INPUTP | 7 | 59 | 52 | 26 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<3>.T = spidataout<3> & !cpu_a<1> & !cpu_a<0> & + spidataout<3>.T = !cpu_a<1> & spidataout<3> & !cpu_a<0> & !cpu_d<3>.PIN - # !spidataout<3> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<3> & !cpu_a<0> & cpu_d<3>.PIN; !spidataout<3>.CLK = cs1 & !Ncs2; spidataout<3>.CE = cpu_Nres & !cpu_rnw; -MACROCELL | 3 | 8 | spidataout<4> +MACROCELL | 3 | 6 | spidataout<4> ATTRIBUTES | 4326240 | 0 -OUTPUTMC | 2 | 3 | 8 | 1 | 2 -INPUTS | 8 | spidataout<4> | cpu_a<1> | cpu_a<0> | cpu_d<4>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 8 +OUTPUTMC | 2 | 1 | 0 | 3 | 6 +INPUTS | 8 | cpu_a<1> | spidataout<4> | cpu_a<0> | cpu_d<4>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +INPUTMC | 1 | 3 | 6 INPUTP | 7 | 59 | 52 | 27 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<4>.T = spidataout<4> & !cpu_a<1> & !cpu_a<0> & + spidataout<4>.T = !cpu_a<1> & spidataout<4> & !cpu_a<0> & !cpu_d<4>.PIN - # !spidataout<4> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<4> & !cpu_a<0> & cpu_d<4>.PIN; !spidataout<4>.CLK = cs1 & !Ncs2; spidataout<4>.CE = cpu_Nres & !cpu_rnw; -MACROCELL | 3 | 6 | spidataout<5> +MACROCELL | 3 | 5 | spidataout<5> ATTRIBUTES | 4326240 | 0 -OUTPUTMC | 2 | 1 | 1 | 3 | 6 -INPUTS | 8 | spidataout<5> | cpu_a<1> | cpu_a<0> | cpu_d<5>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 6 +OUTPUTMC | 2 | 1 | 1 | 3 | 5 +INPUTS | 8 | cpu_a<1> | spidataout<5> | cpu_a<0> | cpu_d<5>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +INPUTMC | 1 | 3 | 5 INPUTP | 7 | 59 | 52 | 29 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<5>.T = spidataout<5> & !cpu_a<1> & !cpu_a<0> & + spidataout<5>.T = !cpu_a<1> & spidataout<5> & !cpu_a<0> & !cpu_d<5>.PIN - # !spidataout<5> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<5> & !cpu_a<0> & cpu_d<5>.PIN; !spidataout<5>.CLK = cs1 & !Ncs2; spidataout<5>.CE = cpu_Nres & !cpu_rnw; -MACROCELL | 3 | 5 | spidataout<6> +MACROCELL | 3 | 4 | spidataout<6> ATTRIBUTES | 4326240 | 0 -OUTPUTMC | 2 | 3 | 5 | 1 | 2 -INPUTS | 8 | spidataout<6> | cpu_a<1> | cpu_a<0> | cpu_d<6>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw -INPUTMC | 1 | 3 | 5 +OUTPUTMC | 2 | 3 | 4 | 1 | 2 +INPUTS | 8 | cpu_a<1> | spidataout<6> | cpu_a<0> | cpu_d<6>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +INPUTMC | 1 | 3 | 4 INPUTP | 7 | 59 | 52 | 31 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<6>.T = spidataout<6> & !cpu_a<1> & !cpu_a<0> & + spidataout<6>.T = !cpu_a<1> & spidataout<6> & !cpu_a<0> & !cpu_d<6>.PIN - # !spidataout<6> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<6> & !cpu_a<0> & cpu_d<6>.PIN; !spidataout<6>.CLK = cs1 & !Ncs2; spidataout<6>.CE = cpu_Nres & !cpu_rnw; @@ -581,263 +520,183 @@ EQ | 6 | MACROCELL | 3 | 3 | spidataout<7> ATTRIBUTES | 4326240 | 0 OUTPUTMC | 2 | 1 | 0 | 3 | 3 -INPUTS | 8 | spidataout<7> | cpu_a<1> | cpu_a<0> | cpu_d<7>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw +INPUTS | 8 | cpu_a<1> | spidataout<7> | cpu_a<0> | cpu_d<7>.PIN | cs1 | Ncs2 | cpu_Nres | cpu_rnw INPUTMC | 1 | 3 | 3 INPUTP | 7 | 59 | 52 | 33 | 50 | 46 | 49 | 24 EQ | 6 | - spidataout<7>.T = spidataout<7> & !cpu_a<1> & !cpu_a<0> & + spidataout<7>.T = !cpu_a<1> & spidataout<7> & !cpu_a<0> & !cpu_d<7>.PIN - # !spidataout<7> & !cpu_a<1> & !cpu_a<0> & + # !cpu_a<1> & !spidataout<7> & !cpu_a<0> & cpu_d<7>.PIN; !spidataout<7>.CLK = cs1 & !Ncs2; spidataout<7>.CE = cpu_Nres & !cpu_rnw; MACROCELL | 0 | 4 | int_dout<0> ATTRIBUTES | 265986 | 0 -INPUTS | 10 | cpu_rnw | spidatain<0> | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | divisor<0> | cpha | spi_Nsel<0> -INPUTMC | 4 | 3 | 17 | 0 | 13 | 0 | 17 | 3 | 10 -INPUTP | 6 | 24 | 59 | 52 | 50 | 46 | 20 +INPUTS | 10 | cpu_rnw | spidatain<0> | cpu_a<1> | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | divisor<0> | cpha | spi_Nsel +INPUTMC | 4 | 1 | 13 | 0 | 13 | 0 | 17 | 3 | 10 +INPUTP | 6 | 24 | 59 | 50 | 46 | 52 | 20 EQ | 9 | - cpu_d<0> = cpu_rnw & spi_Nsel<0> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & cpha & !cpu_a<1> & cpu_a<0> & cs1 & - !Ncs2 & cpu_Nphi2 - # cpu_rnw & divisor<0> & cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<0> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2; + cpu_d<0> = cpu_rnw & spi_Nsel & cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & cpha & !cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & divisor<0> & cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2 + # cpu_rnw & spidatain<0> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2; cpu_d<0>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; MACROCELL | 0 | 5 | int_dout<1> ATTRIBUTES | 265986 | 0 -INPUTS | 10 | cpu_rnw | spidatain<1> | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | divisor<1> | cpol | spi_Nsel<1> -INPUTMC | 4 | 2 | 14 | 0 | 12 | 0 | 15 | 3 | 7 -INPUTP | 6 | 24 | 59 | 52 | 50 | 46 | 20 -EQ | 9 | - cpu_d<1> = cpu_rnw & spi_Nsel<1> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & cpol & !cpu_a<1> & cpu_a<0> & cs1 & - !Ncs2 & cpu_Nphi2 - # cpu_rnw & divisor<1> & cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<1> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2; +INPUTS | 9 | cpu_rnw | spidatain<1> | cpu_a<1> | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | cpol | divisor<1> +INPUTMC | 3 | 1 | 12 | 0 | 15 | 0 | 12 +INPUTP | 6 | 24 | 59 | 50 | 46 | 52 | 20 +EQ | 7 | + cpu_d<1> = cpu_rnw & cpol & !cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & divisor<1> & cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2 + # cpu_rnw & spidatain<1> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2; cpu_d<1>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; MACROCELL | 0 | 7 | int_dout<2> ATTRIBUTES | 265986 | 0 -INPUTS | 10 | cpu_rnw | spidatain<2> | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | divisor<2> | ece | spi_Nsel<2> -INPUTMC | 4 | 2 | 13 | 0 | 11 | 0 | 10 | 3 | 4 -INPUTP | 6 | 24 | 59 | 52 | 50 | 46 | 20 -EQ | 9 | - cpu_d<2> = cpu_rnw & spi_Nsel<2> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & ece & !cpu_a<1> & cpu_a<0> & cs1 & - !Ncs2 & cpu_Nphi2 - # cpu_rnw & divisor<2> & cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<2> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2; - cpu_d<2>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; - -MACROCELL | 0 | 14 | int_dout<3> -ATTRIBUTES | 265986 | 0 -INPUTS | 9 | cpu_rnw | spidatain<3> | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | tmo | spi_Nsel<3> -INPUTMC | 3 | 2 | 12 | 0 | 6 | 3 | 1 -INPUTP | 6 | 24 | 59 | 52 | 50 | 46 | 20 +INPUTS | 9 | cpu_rnw | spidatain<2> | cpu_a<1> | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | ece | divisor<2> +INPUTMC | 3 | 1 | 11 | 0 | 10 | 0 | 11 +INPUTP | 6 | 24 | 59 | 50 | 46 | 52 | 20 EQ | 7 | - cpu_d<3> = cpu_rnw & spi_Nsel<3> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & tmo & !cpu_a<1> & cpu_a<0> & cs1 & - !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<3> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2; - cpu_d<3>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; + cpu_d<2> = cpu_rnw & ece & !cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & divisor<2> & cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2 + # cpu_rnw & spidatain<2> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2; + cpu_d<2>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; MACROCELL | 0 | 16 | int_dout<4> ATTRIBUTES | 265986 | 0 -INPUTS | 10 | cpu_rnw | spidatain<4> | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | spi_int<0> | frx | slaveinten<0> -INPUTMC | 3 | 2 | 11 | 0 | 9 | 0 | 8 -INPUTP | 7 | 24 | 59 | 52 | 50 | 46 | 20 | 7 +INPUTS | 10 | cpu_rnw | spidatain<4> | cpu_a<1> | cs1 | Ncs2 | cpu_a<0> | cpu_Nphi2 | spi_int | frx | slaveinten +INPUTMC | 3 | 1 | 9 | 0 | 9 | 0 | 8 +INPUTP | 7 | 24 | 59 | 50 | 46 | 52 | 20 | 7 EQ | 9 | - cpu_d<4> = cpu_rnw & frx & !cpu_a<1> & cpu_a<0> & cs1 & - !Ncs2 & cpu_Nphi2 - # cpu_rnw & slaveinten<0> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<4> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & cpu_a<1> & !cpu_a<0> & cs1 & !Ncs2 & - !spi_int<0> & cpu_Nphi2; + cpu_d<4> = cpu_rnw & frx & !cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & slaveinten & cpu_a<1> & cs1 & !Ncs2 & + cpu_a<0> & cpu_Nphi2 + # cpu_rnw & spidatain<4> & !cpu_a<1> & cs1 & !Ncs2 & + !cpu_a<0> & cpu_Nphi2 + # cpu_rnw & cpu_a<1> & cs1 & !Ncs2 & !cpu_a<0> & + !spi_int & cpu_Nphi2; cpu_d<4>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; -MACROCELL | 2 | 1 | int_dout<5> -ATTRIBUTES | 265986 | 0 -INPUTS | 11 | cpu_rnw | start_shifting | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | shifting2 | slaveinten<1> | spidatain<5> | shifting2.EXP -INPUTMC | 5 | 2 | 5 | 2 | 0 | 3 | 14 | 2 | 10 | 2 | 0 -INPUTP | 6 | 24 | 59 | 52 | 50 | 46 | 20 -IMPORTS | 1 | 2 | 0 -EQ | 12 | - cpu_d<5> = cpu_rnw & slaveinten<1> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<5> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & start_shifting & !cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & !cpu_a<1> & cpu_a<0> & cs1 & !Ncs2 & - shifting2 & cpu_Nphi2 -;Imported pterms FB3_1 - # cpu_rnw & cpu_a<1> & !cpu_a<0> & cs1 & !Ncs2 & - !spi_int<1> & cpu_Nphi2; - cpu_d<5>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; - -MACROCELL | 2 | 4 | int_dout<6> -ATTRIBUTES | 265986 | 0 -INPUTS | 10 | cpu_rnw | spidatain<6> | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | spi_int<2> | ier | slaveinten<2> -INPUTMC | 3 | 2 | 9 | 3 | 15 | 3 | 12 -INPUTP | 7 | 24 | 59 | 52 | 50 | 46 | 20 | 92 -EQ | 9 | - cpu_d<6> = cpu_rnw & ier & !cpu_a<1> & cpu_a<0> & cs1 & - !Ncs2 & cpu_Nphi2 - # cpu_rnw & slaveinten<2> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<6> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & cpu_a<1> & !cpu_a<0> & cs1 & !Ncs2 & - !spi_int<2> & cpu_Nphi2; - cpu_d<6>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; - -MACROCELL | 2 | 7 | int_dout<7> -ATTRIBUTES | 265986 | 0 -INPUTS | 10 | cpu_rnw | spidatain<7> | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | cpu_Nphi2 | spi_int<3> | tc | slaveinten<3> -INPUTMC | 3 | 2 | 6 | 3 | 0 | 3 | 11 -INPUTP | 7 | 24 | 59 | 52 | 50 | 46 | 20 | 11 -EQ | 9 | - cpu_d<7> = cpu_rnw & slaveinten<3> & cpu_a<1> & cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & spidatain<7> & !cpu_a<1> & !cpu_a<0> & - cs1 & !Ncs2 & cpu_Nphi2 - # cpu_rnw & tc & !cpu_a<1> & cpu_a<0> & cs1 & - !Ncs2 & cpu_Nphi2 - # cpu_rnw & cpu_a<1> & !cpu_a<0> & cs1 & !Ncs2 & - !spi_int<3> & cpu_Nphi2; - cpu_d<7>.OE = cpu_rnw & cs1 & !Ncs2 & cpu_Nphi2; - -MACROCELL | 2 | 0 | shifting2 +MACROCELL | 1 | 2 | shifting2 ATTRIBUTES | 8520480 | 0 -OUTPUTMC | 20 | 1 | 1 | 3 | 17 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 2 | 9 | 2 | 6 | 3 | 16 | 2 | 15 | 2 | 16 | 3 | 2 | 3 | 9 | 2 | 1 | 3 | 13 | 2 | 3 | 1 | 0 | 1 | 2 | 3 | 15 -INPUTS | 10 | shiftdone | start_shifting | $OpTx$INV$22__$INT | cpu_rnw | cpu_a<1> | cpu_a<0> | cs1 | Ncs2 | spi_int<1> | cpu_Nphi2 -INPUTMC | 3 | 2 | 2 | 2 | 5 | 2 | 3 -INPUTP | 7 | 24 | 59 | 52 | 50 | 46 | 3 | 20 -EXPORTS | 1 | 2 | 1 +OUTPUTMC | 20 | 1 | 1 | 1 | 13 | 1 | 12 | 1 | 11 | 1 | 10 | 1 | 9 | 1 | 8 | 1 | 7 | 1 | 6 | 3 | 16 | 2 | 1 | 1 | 14 | 1 | 15 | 1 | 4 | 1 | 16 | 3 | 13 | 1 | 5 | 1 | 0 | 1 | 2 | 3 | 15 +INPUTS | 8 | shiftdone | start_shifting | $OpTx$INV$22__$INT | shiftcnt<3> | shiftcnt<2> | shiftcnt<1> | spidataout<6> | shifting2 +INPUTMC | 8 | 1 | 3 | 3 | 2 | 1 | 5 | 1 | 14 | 1 | 15 | 1 | 16 | 3 | 4 | 1 | 2 +EXPORTS | 1 | 1 | 1 EQ | 4 | shifting2.D = !shiftdone & start_shifting; shifting2.CLK = !$OpTx$INV$22__$INT; - shifting2.EXP = cpu_rnw & cpu_a<1> & !cpu_a<0> & cs1 & !Ncs2 & - !spi_int<1> & cpu_Nphi2 + shifting2.EXP = !shiftcnt<3> & !shiftcnt<2> & shiftcnt<1> & + !shiftdone & !spidataout<6> & shifting2 -MACROCELL | 3 | 13 | diag_OBUF +MACROCELL | 3 | 13 | led_OBUF ATTRIBUTES | 264962 | 0 -OUTPUTMC | 1 | 3 | 14 -INPUTS | 7 | spi_Nsel<0> | start_shifting | shifting2 | slaveinten<1> | cpu_a<1> | cpu_a<0> | cpu_d<5>.PIN -INPUTMC | 4 | 3 | 10 | 2 | 5 | 2 | 0 | 3 | 14 -INPUTP | 3 | 59 | 52 | 29 -EXPORTS | 1 | 3 | 14 -EQ | 3 | - diag = spi_Nsel<0> & !start_shifting & !shifting2; - diag_OBUF.EXP = slaveinten<1> & cpu_a<1> & cpu_a<0> & - !cpu_d<5>.PIN +INPUTS | 3 | spi_Nsel | start_shifting | shifting2 +INPUTMC | 3 | 3 | 10 | 3 | 2 | 1 | 2 +EQ | 1 | + led = spi_Nsel & !start_shifting & !shifting2; MACROCELL | 2 | 8 | cpu_Nirq_OBUFE ATTRIBUTES | 265986 | 0 INPUTS | 1 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST -INPUTMC | 1 | 2 | 17 +INPUTMC | 1 | 3 | 0 EQ | 2 | cpu_Nirq = Gnd; cpu_Nirq.OE = cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST; -MACROCELL | 2 | 3 | $OpTx$INV$22__$INT +MACROCELL | 1 | 5 | $OpTx$INV$22__$INT ATTRIBUTES | 133888 | 0 -OUTPUTMC | 16 | 1 | 1 | 3 | 17 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 2 | 9 | 2 | 6 | 3 | 16 | 2 | 15 | 2 | 16 | 3 | 2 | 3 | 9 | 2 | 2 | 2 | 0 +OUTPUTMC | 16 | 1 | 1 | 1 | 13 | 1 | 12 | 1 | 11 | 1 | 10 | 1 | 9 | 1 | 8 | 1 | 7 | 1 | 6 | 3 | 16 | 1 | 14 | 1 | 15 | 1 | 4 | 1 | 16 | 1 | 3 | 1 | 2 INPUTS | 5 | ece | cpu_Nphi2 | extclk | start_shifting | shifting2 -INPUTMC | 3 | 0 | 10 | 2 | 5 | 2 | 0 +INPUTMC | 3 | 0 | 10 | 3 | 2 | 1 | 2 INPUTP | 2 | 20 | 21 EQ | 3 | $OpTx$INV$22__$INT = ece & !extclk # !ece & !cpu_Nphi2 # !start_shifting & !shifting2; -MACROCELL | 1 | 0 | start_shifting/start_shifting_RSTF__$INT +MACROCELL | 1 | 17 | start_shifting/start_shifting_RSTF__$INT ATTRIBUTES | 133888 | 0 -OUTPUTMC | 2 | 2 | 5 | 1 | 1 -INPUTS | 8 | cpu_Nres | shiftdone | shiftcnt<3> | shiftcnt<2> | shiftcnt<1> | spidataout<3> | shifting2 | spidataout<7> -INPUTMC | 7 | 2 | 2 | 2 | 15 | 2 | 16 | 3 | 9 | 0 | 0 | 2 | 0 | 3 | 3 +OUTPUTMC | 1 | 3 | 2 +INPUTS | 2 | cpu_Nres | shiftdone +INPUTMC | 1 | 1 | 3 INPUTP | 1 | 49 -EXPORTS | 1 | 1 | 1 -EQ | 5 | +EQ | 1 | start_shifting/start_shifting_RSTF__$INT = cpu_Nres & !shiftdone; - start_shifting/start_shifting_RSTF__$INT.EXP = shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & - !shiftdone & !spidataout<3> & shifting2 - # !shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & - !shiftdone & !spidataout<7> & shifting2 -MACROCELL | 2 | 17 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST +MACROCELL | 3 | 0 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST ATTRIBUTES | 133888 | 0 OUTPUTMC | 1 | 2 | 8 -INPUTS | 10 | ier | tc | slaveinten<3> | spi_int<3> | slaveinten<2> | spi_int<2> | slaveinten<0> | spi_int<0> | slaveinten<1> | spi_int<1> -INPUTMC | 6 | 3 | 15 | 3 | 0 | 3 | 11 | 3 | 12 | 0 | 8 | 3 | 14 -INPUTP | 4 | 11 | 92 | 7 | 3 -EQ | 5 | +INPUTS | 4 | ier | tc | slaveinten | spi_int +INPUTMC | 3 | 3 | 8 | 3 | 1 | 0 | 8 +INPUTP | 1 | 7 +EQ | 2 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST = ier & tc - # slaveinten<0> & !spi_int<0> - # slaveinten<1> & !spi_int<1> - # slaveinten<2> & !spi_int<2> - # slaveinten<3> & !spi_int<3>; + # slaveinten & !spi_int; -MACROCELL | 1 | 2 | EXP6_ +MACROCELL | 1 | 0 | EXP6_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 1 -INPUTS | 9 | shiftcnt<3> | shiftcnt<2> | shiftcnt<1> | shiftdone | spidataout<0> | shifting2 | spidataout<2> | spidataout<4> | spidataout<6> -INPUTMC | 9 | 2 | 15 | 2 | 16 | 3 | 9 | 2 | 2 | 0 | 3 | 2 | 0 | 0 | 1 | 3 | 8 | 3 | 5 +INPUTS | 10 | shiftcnt<3> | shiftcnt<2> | shiftcnt<1> | shiftdone | spidataout<0> | shifting2 | spidataout<2> | spidataout<3> | spidataout<4> | spidataout<7> +INPUTMC | 10 | 1 | 14 | 1 | 15 | 1 | 16 | 1 | 3 | 0 | 3 | 1 | 2 | 0 | 1 | 3 | 7 | 3 | 6 | 3 | 3 EXPORTS | 1 | 1 | 1 -EQ | 8 | +EQ | 10 | EXP6_.EXP = shiftcnt<3> & shiftcnt<2> & shiftcnt<1> & !shiftdone & !spidataout<0> & shifting2 # shiftcnt<3> & !shiftcnt<2> & shiftcnt<1> & !shiftdone & !spidataout<2> & shifting2 + # shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & + !shiftdone & !spidataout<3> & shifting2 # !shiftcnt<3> & shiftcnt<2> & shiftcnt<1> & !shiftdone & !spidataout<4> & shifting2 - # !shiftcnt<3> & !shiftcnt<2> & shiftcnt<1> & - !shiftdone & !spidataout<6> & shifting2 + # !shiftcnt<3> & !shiftcnt<2> & !shiftcnt<1> & + !shiftdone & !spidataout<7> & shifting2 -PIN | cpu_Nres | 64 | 0 | N/A | 49 | 41 | 1 | 1 | 3 | 10 | 3 | 7 | 3 | 4 | 3 | 1 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 15 | 0 | 8 | 3 | 14 | 3 | 12 | 3 | 11 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 3 | 17 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 2 | 9 | 2 | 6 | 3 | 16 | 2 | 15 | 2 | 16 | 3 | 2 | 3 | 9 | 2 | 2 | 0 | 3 | 0 | 2 | 0 | 1 | 0 | 0 | 3 | 8 | 3 | 6 | 3 | 5 | 3 | 3 | 1 | 0 -PIN | cpu_rnw | 64 | 0 | N/A | 24 | 35 | 3 | 10 | 3 | 7 | 3 | 4 | 3 | 1 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 15 | 0 | 8 | 3 | 14 | 3 | 12 | 3 | 11 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 2 | 5 | 0 | 3 | 0 | 2 | 0 | 1 | 0 | 0 | 3 | 8 | 3 | 6 | 3 | 5 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 14 | 0 | 16 | 2 | 1 | 2 | 4 | 2 | 7 | 2 | 0 -PIN | Ncs2 | 64 | 0 | N/A | 46 | 36 | 3 | 10 | 3 | 7 | 3 | 4 | 3 | 1 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 15 | 0 | 8 | 3 | 14 | 3 | 12 | 3 | 11 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 2 | 5 | 3 | 0 | 0 | 3 | 0 | 2 | 0 | 1 | 0 | 0 | 3 | 8 | 3 | 6 | 3 | 5 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 14 | 0 | 16 | 2 | 1 | 2 | 4 | 2 | 7 | 2 | 0 -PIN | cs1 | 64 | 0 | N/A | 50 | 36 | 3 | 10 | 3 | 7 | 3 | 4 | 3 | 1 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 15 | 0 | 8 | 3 | 14 | 3 | 12 | 3 | 11 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 2 | 5 | 3 | 0 | 0 | 3 | 0 | 2 | 0 | 1 | 0 | 0 | 3 | 8 | 3 | 6 | 3 | 5 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 14 | 0 | 16 | 2 | 1 | 2 | 4 | 2 | 7 | 2 | 0 -PIN | cpu_a<1> | 64 | 0 | N/A | 59 | 37 | 3 | 10 | 3 | 7 | 3 | 4 | 3 | 1 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 15 | 0 | 8 | 3 | 14 | 3 | 12 | 3 | 11 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 2 | 5 | 3 | 0 | 0 | 3 | 0 | 2 | 0 | 1 | 0 | 0 | 3 | 8 | 3 | 6 | 3 | 5 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 14 | 0 | 16 | 2 | 1 | 2 | 4 | 2 | 7 | 2 | 0 | 3 | 13 -PIN | cpu_a<0> | 64 | 0 | N/A | 52 | 37 | 3 | 10 | 3 | 7 | 3 | 4 | 3 | 1 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 15 | 0 | 8 | 3 | 14 | 3 | 12 | 3 | 11 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 2 | 5 | 3 | 0 | 0 | 3 | 0 | 2 | 0 | 1 | 0 | 0 | 3 | 8 | 3 | 6 | 3 | 5 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 14 | 0 | 16 | 2 | 1 | 2 | 4 | 2 | 7 | 2 | 0 | 3 | 13 -PIN | spi_miso<3> | 64 | 0 | N/A | 89 | 1 | 3 | 17 -PIN | spi_miso<2> | 64 | 0 | N/A | 90 | 1 | 3 | 17 -PIN | spi_miso<1> | 64 | 0 | N/A | 9 | 1 | 3 | 0 -PIN | spi_miso<0> | 64 | 0 | N/A | 10 | 1 | 3 | 0 -PIN | cpu_Nphi2 | 64 | 0 | N/A | 20 | 10 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 14 | 0 | 16 | 2 | 1 | 2 | 4 | 2 | 7 | 2 | 3 | 2 | 0 -PIN | spi_int<0> | 64 | 0 | N/A | 7 | 2 | 0 | 16 | 2 | 17 -PIN | spi_int<1> | 64 | 0 | N/A | 3 | 2 | 2 | 0 | 2 | 17 -PIN | spi_int<2> | 64 | 0 | N/A | 92 | 2 | 2 | 4 | 2 | 17 -PIN | spi_int<3> | 64 | 0 | N/A | 11 | 2 | 2 | 7 | 2 | 17 -PIN | extclk | 64 | 0 | N/A | 21 | 1 | 2 | 3 +MACROCELL | 3 | 15 | EXP7_ +ATTRIBUTES | 2048 | 0 +OUTPUTMC | 1 | 3 | 16 +INPUTS | 5 | cpu_Nres | cpha | shiftcnt<0> | shiftdone | shifting2 +INPUTMC | 4 | 0 | 17 | 1 | 4 | 1 | 3 | 1 | 2 +INPUTP | 1 | 49 +EXPORTS | 1 | 3 | 16 +EQ | 2 | + EXP7_.EXP = cpu_Nres & cpha & !shiftcnt<0> & !shiftdone & + shifting2 + +PIN | cpu_Nres | 64 | 0 | N/A | 49 | 36 | 1 | 1 | 3 | 10 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 8 | 0 | 8 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 1 | 13 | 1 | 12 | 1 | 11 | 1 | 10 | 1 | 9 | 1 | 8 | 1 | 7 | 1 | 6 | 3 | 16 | 1 | 14 | 1 | 15 | 1 | 4 | 1 | 16 | 1 | 3 | 0 | 3 | 0 | 2 | 0 | 1 | 3 | 7 | 3 | 6 | 3 | 5 | 3 | 4 | 3 | 3 | 1 | 17 | 3 | 15 +PIN | cpu_rnw | 64 | 0 | N/A | 24 | 28 | 3 | 10 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 8 | 0 | 8 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 14 | 2 | 1 | 2 | 4 | 2 | 7 | 3 | 2 | 0 | 3 | 0 | 2 | 0 | 1 | 3 | 7 | 3 | 6 | 3 | 5 | 3 | 4 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 16 +PIN | Ncs2 | 64 | 0 | N/A | 46 | 29 | 3 | 10 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 8 | 0 | 8 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 14 | 2 | 1 | 2 | 4 | 2 | 7 | 3 | 2 | 3 | 1 | 0 | 3 | 0 | 2 | 0 | 1 | 3 | 7 | 3 | 6 | 3 | 5 | 3 | 4 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 16 +PIN | cs1 | 64 | 0 | N/A | 50 | 29 | 3 | 10 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 8 | 0 | 8 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 14 | 2 | 1 | 2 | 4 | 2 | 7 | 3 | 2 | 3 | 1 | 0 | 3 | 0 | 2 | 0 | 1 | 3 | 7 | 3 | 6 | 3 | 5 | 3 | 4 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 16 +PIN | cpu_a<0> | 64 | 0 | N/A | 52 | 29 | 3 | 10 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 8 | 0 | 8 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 14 | 2 | 1 | 2 | 4 | 2 | 7 | 3 | 2 | 3 | 1 | 0 | 3 | 0 | 2 | 0 | 1 | 3 | 7 | 3 | 6 | 3 | 5 | 3 | 4 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 16 +PIN | cpu_a<1> | 64 | 0 | N/A | 59 | 29 | 3 | 10 | 0 | 15 | 0 | 10 | 0 | 17 | 0 | 9 | 3 | 8 | 0 | 8 | 0 | 6 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 14 | 2 | 1 | 2 | 4 | 2 | 7 | 3 | 2 | 3 | 1 | 0 | 3 | 0 | 2 | 0 | 1 | 3 | 7 | 3 | 6 | 3 | 5 | 3 | 4 | 3 | 3 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 16 +PIN | spi_miso | 64 | 0 | N/A | 10 | 1 | 1 | 13 +PIN | cpu_Nphi2 | 64 | 0 | N/A | 20 | 9 | 0 | 14 | 2 | 1 | 2 | 4 | 2 | 7 | 0 | 4 | 0 | 5 | 0 | 7 | 0 | 16 | 1 | 5 +PIN | spi_int | 64 | 0 | N/A | 7 | 2 | 0 | 16 | 3 | 0 +PIN | extclk | 64 | 0 | N/A | 21 | 1 | 1 | 5 PIN | spi_mosi | 536871040 | 0 | N/A | 87 -PIN | spi_Nsel<0> | 536871040 | 0 | N/A | 68 -PIN | spi_Nsel<1> | 536871040 | 0 | N/A | 65 -PIN | spi_Nsel<2> | 536871040 | 0 | N/A | 63 -PIN | spi_Nsel<3> | 536871040 | 0 | N/A | 62 +PIN | spi_Nsel | 536871040 | 0 | N/A | 68 PIN | spi_sclk | 536871040 | 0 | N/A | 83 -PIN | diag | 536871040 | 0 | N/A | 72 +PIN | led | 536871040 | 0 | N/A | 72 PIN | cpu_Nirq | 536871040 | 0 | N/A | 38 +PIN | cpu_d<3> | 536870976 | 0 | N/A | 26 | 2 | 0 | 6 | 3 | 7 +PIN | cpu_d<5> | 536870976 | 0 | N/A | 29 | 1 | 3 | 5 +PIN | cpu_d<6> | 536870976 | 0 | N/A | 31 | 2 | 3 | 8 | 3 | 4 +PIN | cpu_d<7> | 536870976 | 0 | N/A | 33 | 1 | 3 | 3 PIN | cpu_d<0> | 536870976 | 0 | N/A | 12 | 4 | 3 | 10 | 0 | 17 | 0 | 13 | 0 | 3 -PIN | cpu_d<1> | 536870976 | 0 | N/A | 13 | 4 | 3 | 7 | 0 | 15 | 0 | 12 | 0 | 2 -PIN | cpu_d<2> | 536870976 | 0 | N/A | 15 | 4 | 3 | 4 | 0 | 10 | 0 | 11 | 0 | 1 -PIN | cpu_d<3> | 536870976 | 0 | N/A | 26 | 3 | 3 | 1 | 0 | 6 | 0 | 0 -PIN | cpu_d<4> | 536870976 | 0 | N/A | 27 | 3 | 0 | 9 | 0 | 8 | 3 | 8 -PIN | cpu_d<5> | 536870976 | 0 | N/A | 29 | 3 | 3 | 14 | 3 | 6 | 3 | 13 -PIN | cpu_d<6> | 536870976 | 0 | N/A | 31 | 4 | 3 | 15 | 3 | 12 | 3 | 5 | 3 | 14 -PIN | cpu_d<7> | 536870976 | 0 | N/A | 33 | 2 | 3 | 11 | 3 | 3 +PIN | cpu_d<1> | 536870976 | 0 | N/A | 13 | 3 | 0 | 15 | 0 | 12 | 0 | 2 +PIN | cpu_d<2> | 536870976 | 0 | N/A | 15 | 3 | 0 | 10 | 0 | 11 | 0 | 1 +PIN | cpu_d<4> | 536870976 | 0 | N/A | 27 | 3 | 0 | 9 | 0 | 8 | 3 | 6 diff --git a/spi6502b.ngc b/spi6502b.ngc index 3660ee4..6cd68ec 100644 --- a/spi6502b.ngc +++ b/spi6502b.ngc @@ -1,3 +1,3 @@ XILINX-XDB 0.1 STUB 0.1 ASCII XILINX-XDM V1.2e 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--git a/spi6502b.rpt b/spi6502b.rpt index 15dedb5..8088d76 100644 --- a/spi6502b.rpt +++ b/spi6502b.rpt @@ -1,7 +1,7 @@ cpldfit: version G.38 Xilinx Inc. Fitter Report -Design Name: spi6502b Date: 5- 6-2017, 5:27PM +Design Name: spi6502b Date: 5- 6-2017, 5:47PM Device Used: XC9572XL-10-PC44 Fitting Status: Successful @@ -9,25 +9,25 @@ Fitting Status: Successful Macrocells Product Terms Registers Pins Function Block Used Used Used Used Inputs Used -56 /72 ( 78%) 247 /360 ( 69%) 43 /72 ( 60%) 32 /34 ( 94%) 127/216 ( 59%) +50 /72 ( 69%) 202 /360 ( 56%) 37 /72 ( 51%) 23 /34 ( 68%) 106/216 ( 49%) PIN RESOURCES: Signal Type Required Mapped | Pin Type Used Remaining ------------------------------------|--------------------------------------- -Input : 16 16 | I/O : 26 2 -Output : 8 8 | GCK/IO : 3 0 -Bidirectional : 8 8 | GTS/IO : 2 0 -GCK : 0 0 | GSR/IO : 1 0 +Input : 10 10 | I/O : 19 9 +Output : 5 5 | GCK/IO : 3 0 +Bidirectional : 8 8 | GTS/IO : 1 1 +GCK : 0 0 | GSR/IO : 0 1 GTS : 0 0 | GSR : 0 0 | ---- ---- - Total 32 32 + Total 23 23 MACROCELL RESOURCES: Total Macrocells Available 72 -Registered Macrocells 43 +Registered Macrocells 37 Non-registered Macrocell driving I/O 10 GLOBAL RESOURCES: @@ -38,9 +38,9 @@ Global set/reset net(s) unused. POWER DATA: -There are 56 macrocells in high performance mode (MCHP). +There are 50 macrocells in high performance mode (MCHP). There are 0 macrocells in low power mode (MCLP). -There are a total of 56 macrocells used (MC). +There are a total of 50 macrocells used (MC). End of Resource Summary *************** Summary of Required Resources ****************** @@ -48,61 +48,55 @@ End of Resource Summary ** LOGIC ** Signal Total Signals Loc Pwr Slew Pin Pin Pin Reg Init Name Pt Used Mode Rate # Type Use State -$OpTx$INV$22__$INT 3 5 FB3_4 STD (b) (b) +$OpTx$INV$22__$INT 3 5 FB2_6 STD 37 I/O (b) cpha 5 8 FB1_18 STD (b) (b) RESET cpol 5 8 FB1_16 STD (b) (b) RESET cpu_Nirq 1 1 FB3_9 STD FAST 14 I/O O -cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST 5 10 FB3_18 STD (b) (b) +cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST 2 4 FB4_1 STD (b) (b) cpu_d<0> 5 10 FB1_5 STD FAST 2 I/O I/O -cpu_d<1> 5 10 FB1_6 STD FAST 3 I/O I/O -cpu_d<2> 5 10 FB1_8 STD FAST 4 I/O I/O -cpu_d<3> 4 9 FB1_15 STD FAST 8 I/O I/O +cpu_d<1> 4 9 FB1_6 STD FAST 3 I/O I/O +cpu_d<2> 4 9 FB1_8 STD FAST 4 I/O I/O +cpu_d<3> 3 8 FB1_15 STD FAST 8 I/O I/O cpu_d<4> 5 10 FB1_17 STD FAST 9 I/O I/O -cpu_d<5> 6 11 FB3_2 STD FAST 11 I/O I/O -cpu_d<6> 5 10 FB3_5 STD FAST 12 I/O I/O -cpu_d<7> 5 10 FB3_8 STD FAST 13 I/O I/O -diag 1 3 FB4_14 STD FAST 29 I/O O +cpu_d<5> 4 9 FB3_2 STD FAST 11 I/O I/O +cpu_d<6> 3 8 FB3_5 STD FAST 12 I/O I/O +cpu_d<7> 3 8 FB3_8 STD FAST 13 I/O I/O divisor<0> 5 8 FB1_14 STD 7 GCK/I/O I RESET divisor<1> 5 8 FB1_13 STD (b) (b) RESET divisor<2> 5 8 FB1_12 STD (b) (b) RESET ece 5 8 FB1_11 STD 6 GCK/I/O I RESET frx 5 8 FB1_10 STD (b) (b) RESET -ier 5 8 FB4_16 STD (b) (b) RESET -shiftcnt<0> 3 4 FB4_3 STD (b) (b) RESET -shiftcnt<1> 4 5 FB4_10 STD (b) (b) RESET -shiftcnt<2> 4 6 FB3_17 STD 22 I/O I RESET -shiftcnt<3> 4 7 FB3_16 STD 24 I/O I RESET -shiftdone 3 6 FB3_3 STD (b) (b) RESET -shifting2 2 3 FB3_1 STD (b) (b) RESET -slaveinten<0> 5 8 FB1_9 STD 5 GCK/I/O I RESET -slaveinten<1> 5 8 FB4_15 STD 33 I/O (b) RESET -slaveinten<2> 5 8 FB4_13 STD (b) (b) RESET -slaveinten<3> 5 8 FB4_12 STD (b) (b) RESET -spi_Nsel<0> 5 8 FB4_11 STD FAST 28 I/O O RESET -spi_Nsel<1> 5 8 FB4_8 STD FAST 27 I/O O RESET -spi_Nsel<2> 5 8 FB4_5 STD FAST 26 I/O O RESET -spi_Nsel<3> 5 8 FB4_2 STD FAST 25 I/O O RESET +ier 5 8 FB4_9 STD (b) (b) RESET +led 1 3 FB4_14 STD FAST 29 I/O O +shiftcnt<0> 3 4 FB2_5 STD 36 I/O (b) RESET +shiftcnt<1> 4 5 FB2_17 STD 44 I/O I RESET +shiftcnt<2> 4 6 FB2_16 STD (b) (b) RESET +shiftcnt<3> 4 7 FB2_15 STD 43 I/O (b) RESET +shiftdone 3 6 FB2_4 STD (b) (b) RESET +shifting2 2 3 FB2_3 STD (b) (b) RESET +slaveinten 5 8 FB1_9 STD 5 GCK/I/O I RESET +spi_Nsel 5 8 FB4_11 STD FAST 28 I/O O RESET spi_mosi 11 16 FB2_2 STD FAST 35 I/O O RESET spi_sclk 6 7 FB4_17 STD FAST 34 I/O O RESET -spidatain<0> 7 12 FB4_18 STD (b) (b) RESET -spidatain<1> 4 5 FB3_15 STD 20 I/O I RESET -spidatain<2> 4 5 FB3_14 STD 19 I/O I RESET -spidatain<3> 4 5 FB3_13 STD (b) (b) RESET -spidatain<4> 4 5 FB3_12 STD (b) (b) RESET -spidatain<5> 4 5 FB3_11 STD 18 I/O I RESET -spidatain<6> 4 5 FB3_10 STD (b) (b) RESET -spidatain<7> 4 5 FB3_7 STD (b) (b) RESET +spidatain<0> 4 6 FB2_14 STD 42 GTS/I/O I RESET +spidatain<1> 4 5 FB2_13 STD (b) (b) RESET +spidatain<2> 4 5 FB2_12 STD (b) (b) RESET +spidatain<3> 4 5 FB2_11 STD 40 GTS/I/O (b) RESET +spidatain<4> 4 5 FB2_10 STD (b) (b) RESET +spidatain<5> 4 5 FB2_9 STD 39 GSR/I/O (b) RESET +spidatain<6> 4 5 FB2_8 STD 38 I/O (b) RESET +spidatain<7> 4 5 FB2_7 STD (b) (b) RESET spidataout<0> 4 8 FB1_4 STD (b) (b) RESET spidataout<1> 4 8 FB1_3 STD (b) (b) RESET -spidataout<2> 4 8 FB1_2 STD 1 I/O I RESET -spidataout<3> 4 8 FB1_1 STD (b) (b) RESET -spidataout<4> 4 8 FB4_9 STD (b) (b) RESET -spidataout<5> 4 8 FB4_7 STD (b) (b) RESET -spidataout<6> 4 8 FB4_6 STD (b) (b) RESET +spidataout<2> 4 8 FB1_2 STD 1 I/O (b) RESET +spidataout<3> 4 8 FB4_8 STD 27 I/O (b) RESET +spidataout<4> 4 8 FB4_7 STD (b) (b) RESET +spidataout<5> 4 8 FB4_6 STD (b) (b) RESET +spidataout<6> 4 8 FB4_5 STD 26 I/O (b) RESET spidataout<7> 4 8 FB4_4 STD (b) (b) RESET -start_shifting 4 8 FB3_6 STD (b) (b) RESET -start_shifting/start_shifting_RSTF__$INT 1 2 FB2_1 STD (b) (b) -tc 3 5 FB4_1 STD (b) (b) RESET +start_shifting 4 8 FB4_3 STD (b) (b) RESET +start_shifting/start_shifting_RSTF__$INT 1 2 FB2_18 STD (b) (b) +tc 3 5 FB4_2 STD 25 I/O (b) RESET tmo 5 8 FB1_7 STD (b) (b) RESET ** INPUTS ** @@ -116,83 +110,75 @@ cpu_a<1> FB3_16 24 I/O I cpu_rnw FB1_14 7 GCK/I/O I cs1 FB3_15 20 I/O I extclk FB1_11 6 GCK/I/O I -spi_int<0> FB2_14 42 GTS/I/O I -spi_int<1> FB2_11 40 GTS/I/O I -spi_int<2> FB2_9 39 GSR/I/O I -spi_int<3> FB1_2 1 I/O I -spi_miso<0> FB2_17 44 I/O I -spi_miso<1> FB2_15 43 I/O I -spi_miso<2> FB2_8 38 I/O I -spi_miso<3> FB2_6 37 I/O I +spi_int FB2_14 42 GTS/I/O I +spi_miso FB2_17 44 I/O I End of Resources *********************Function Block Resource Summary*********************** Function # of FB Inputs Signals Total O/IO IO Block Macrocells Used Used Pt Used Req Avail -FB1 18 35 35 85 0/5 9 -FB2 2 16 16 12 1/0 9 -FB3 18 38 38 70 1/3 9 -FB4 18 38 38 80 6/0 7 +FB1 17 31 31 78 0/5 9 +FB2 17 30 30 67 1/0 9 +FB3 4 14 14 11 1/3 9 +FB4 12 31 31 46 3/0 7 ---- ----- ----- ----- - 56 247 8/8 34 + 50 202 5/8 34 *********************************** FB1 *********************************** -Number of function block inputs used/remaining: 35/19 -Number of signals used by logic mapping into function block: 35 +Number of function block inputs used/remaining: 31/23 +Number of signals used by logic mapping into function block: 31 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use -spidataout<3> 4 0 0 1 FB1_1 STD (b) (b) -spidataout<2> 4 0 0 1 FB1_2 STD 1 I/O I +(unused) 0 0 0 5 FB1_1 (b) +spidataout<2> 4 0 0 1 FB1_2 STD 1 I/O (b) spidataout<1> 4 0 0 1 FB1_3 STD (b) (b) spidataout<0> 4 0 0 1 FB1_4 STD (b) (b) cpu_d<0> 5 0 0 0 FB1_5 STD 2 I/O I/O -cpu_d<1> 5 0 0 0 FB1_6 STD 3 I/O I/O +cpu_d<1> 4 0 0 1 FB1_6 STD 3 I/O I/O tmo 5 0 0 0 FB1_7 STD (b) (b) -cpu_d<2> 5 0 0 0 FB1_8 STD 4 I/O I/O -slaveinten<0> 5 0 0 0 FB1_9 STD 5 GCK/I/O I +cpu_d<2> 4 0 0 1 FB1_8 STD 4 I/O I/O +slaveinten 5 0 0 0 FB1_9 STD 5 GCK/I/O I frx 5 0 0 0 FB1_10 STD (b) (b) ece 5 0 0 0 FB1_11 STD 6 GCK/I/O I divisor<2> 5 0 0 0 FB1_12 STD (b) (b) divisor<1> 5 0 0 0 FB1_13 STD (b) (b) divisor<0> 5 0 0 0 FB1_14 STD 7 GCK/I/O I -cpu_d<3> 4 0 0 1 FB1_15 STD 8 I/O I/O +cpu_d<3> 3 0 0 2 FB1_15 STD 8 I/O I/O cpol 5 0 0 0 FB1_16 STD (b) (b) cpu_d<4> 5 0 0 0 FB1_17 STD 9 I/O I/O cpha 5 0 0 0 FB1_18 STD (b) (b) Signals Used by Logic in Function Block - 1: cpu_d<0>.PIN 13: cpu_rnw 25: spi_int<0> - 2: cpu_d<1>.PIN 14: cs1 26: spidatain<0> - 3: cpu_d<2>.PIN 15: divisor<0> 27: spidatain<1> - 4: cpu_d<3>.PIN 16: divisor<1> 28: spidatain<2> - 5: cpu_d<4>.PIN 17: divisor<2> 29: spidatain<3> - 6: Ncs2 18: ece 30: spidatain<4> - 7: cpha 19: frx 31: spidataout<0> - 8: cpol 20: slaveinten<0> 32: spidataout<1> - 9: cpu_Nphi2 21: spi_Nsel<0> 33: spidataout<2> - 10: cpu_Nres 22: spi_Nsel<1> 34: spidataout<3> - 11: cpu_a<0> 23: spi_Nsel<2> 35: tmo - 12: cpu_a<1> 24: spi_Nsel<3> + 1: cpu_d<0>.PIN 12: cpu_a<1> 22: spi_int + 2: cpu_d<1>.PIN 13: cpu_rnw 23: spidatain<0> + 3: cpu_d<2>.PIN 14: cs1 24: spidatain<1> + 4: cpu_d<3>.PIN 15: divisor<0> 25: spidatain<2> + 5: cpu_d<4>.PIN 16: divisor<1> 26: spidatain<3> + 6: Ncs2 17: divisor<2> 27: spidatain<4> + 7: cpha 18: ece 28: spidataout<0> + 8: cpol 19: frx 29: spidataout<1> + 9: cpu_Nphi2 20: slaveinten 30: spidataout<2> + 10: cpu_Nres 21: spi_Nsel 31: tmo + 11: cpu_a<0> Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs -spidataout<3> ...X.X...XXXXX...................X...... 8 8 -spidataout<2> ..X..X...XXXXX..................X....... 8 8 -spidataout<1> .X...X...XXXXX.................X........ 8 8 -spidataout<0> X....X...XXXXX................X......... 8 8 -cpu_d<0> .....XX.X.XXXXX.....X....X.............. 10 10 -cpu_d<1> .....X.XX.XXXX.X.....X....X............. 10 10 -tmo ...X.X...XXXXX....................X..... 8 8 -cpu_d<2> .....X..X.XXXX..XX....X....X............ 10 10 -slaveinten<0> ....XX...XXXXX.....X.................... 8 8 +spidataout<2> ..X..X...XXXXX...............X.......... 8 8 +spidataout<1> .X...X...XXXXX..............X........... 8 8 +spidataout<0> X....X...XXXXX.............X............ 8 8 +cpu_d<0> .....XX.X.XXXXX.....X.X................. 10 10 +cpu_d<1> .....X.XX.XXXX.X.......X................ 9 9 +tmo ...X.X...XXXXX................X......... 8 8 +cpu_d<2> .....X..X.XXXX..XX......X............... 9 9 +slaveinten ....XX...XXXXX.....X.................... 8 8 frx ....XX...XXXXX....X..................... 8 8 ece ..X..X...XXXXX...X...................... 8 8 divisor<2> ..X..X...XXXXX..X....................... 8 8 divisor<1> .X...X...XXXXX.X........................ 8 8 divisor<0> X....X...XXXXXX......................... 8 8 -cpu_d<3> .....X..X.XXXX.........X....X.....X..... 9 9 +cpu_d<3> .....X..X.XXXX...........X....X......... 8 8 cpol .X...X.X.XXXXX.......................... 8 8 -cpu_d<4> .....X..X.XXXX....XX....X....X.......... 10 10 +cpu_d<4> .....X..X.XXXX....XX.X....X............. 10 10 cpha X....XX..XXXXX.......................... 8 8 0----+----1----+----2----+----3----+----4 0 0 0 0 @@ -211,44 +197,63 @@ X(@) - Signal used as input (wire-AND input) to the macrocell logic. The number of Signals Used may exceed the number of FB Inputs Used due to wire-ANDing in the switch matrix. *********************************** FB2 *********************************** -Number of function block inputs used/remaining: 16/38 -Number of signals used by logic mapping into function block: 16 +Number of function block inputs used/remaining: 30/24 +Number of signals used by logic mapping into function block: 30 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use -start_shifting/start_shifting_RSTF__$INT - 1 0 \/2 2 FB2_1 STD (b) (b) +(unused) 0 0 \/5 0 FB2_1 (b) (b) spi_mosi 11 6<- 0 0 FB2_2 STD 35 I/O O -(unused) 0 0 /\4 1 FB2_3 (b) (b) -(unused) 0 0 0 5 FB2_4 (b) -(unused) 0 0 0 5 FB2_5 36 I/O -(unused) 0 0 0 5 FB2_6 37 I/O I -(unused) 0 0 0 5 FB2_7 (b) -(unused) 0 0 0 5 FB2_8 38 I/O I -(unused) 0 0 0 5 FB2_9 39 GSR/I/O I -(unused) 0 0 0 5 FB2_10 (b) -(unused) 0 0 0 5 FB2_11 40 GTS/I/O I -(unused) 0 0 0 5 FB2_12 (b) -(unused) 0 0 0 5 FB2_13 (b) -(unused) 0 0 0 5 FB2_14 42 GTS/I/O I -(unused) 0 0 0 5 FB2_15 43 I/O I -(unused) 0 0 0 5 FB2_16 (b) -(unused) 0 0 0 5 FB2_17 44 I/O I -(unused) 0 0 0 5 FB2_18 (b) +shifting2 2 0 /\1 2 FB2_3 STD (b) (b) +shiftdone 3 0 0 2 FB2_4 STD (b) (b) +shiftcnt<0> 3 0 0 2 FB2_5 STD 36 I/O (b) +$OpTx$INV$22__$INT 3 0 0 2 FB2_6 STD 37 I/O (b) +spidatain<7> 4 0 0 1 FB2_7 STD (b) (b) +spidatain<6> 4 0 0 1 FB2_8 STD 38 I/O (b) +spidatain<5> 4 0 0 1 FB2_9 STD 39 GSR/I/O (b) +spidatain<4> 4 0 0 1 FB2_10 STD (b) (b) +spidatain<3> 4 0 0 1 FB2_11 STD 40 GTS/I/O (b) +spidatain<2> 4 0 0 1 FB2_12 STD (b) (b) +spidatain<1> 4 0 0 1 FB2_13 STD (b) (b) +spidatain<0> 4 0 0 1 FB2_14 STD 42 GTS/I/O I +shiftcnt<3> 4 0 0 1 FB2_15 STD 43 I/O (b) +shiftcnt<2> 4 0 0 1 FB2_16 STD (b) (b) +shiftcnt<1> 4 0 0 1 FB2_17 STD 44 I/O I +start_shifting/start_shifting_RSTF__$INT + 1 0 0 4 FB2_18 STD (b) (b) Signals Used by Logic in Function Block 1: $OpTx$INV$22__$INT - 7: shifting2 12: spidataout<4> - 2: cpu_Nres 8: spidataout<0> 13: spidataout<5> - 3: shiftcnt<1> 9: spidataout<1> 14: spidataout<6> - 4: shiftcnt<2> 10: spidataout<2> 15: spidataout<7> - 5: shiftcnt<3> 11: spidataout<3> 16: tmo - 6: shiftdone + 11: shifting2 21: spidataout<0> + 2: cpu_Nphi2 12: spi_Nsel 22: spidataout<1> + 3: cpu_Nres 13: spi_miso 23: spidataout<2> + 4: ece 14: spidatain<0> 24: spidataout<3> + 5: extclk 15: spidatain<1> 25: spidataout<4> + 6: shiftcnt<0> 16: spidatain<2> 26: spidataout<5> + 7: shiftcnt<1> 17: spidatain<3> 27: spidataout<6> + 8: shiftcnt<2> 18: spidatain<4> 28: spidataout<7> + 9: shiftcnt<3> 19: spidatain<5> 29: start_shifting + 10: shiftdone 20: spidatain<6> 30: tmo Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs +spi_mosi X.X...XXXXX.........XXXXXXXX.X.......... 16 16 +shifting2 X........X..................X........... 3 3 +shiftdone X.X..XXXX............................... 6 6 +shiftcnt<0> X.X..X....X............................. 4 4 +$OpTx$INV$22__$INT .X.XX.....X.................X........... 5 5 +spidatain<7> X.X..X....X........X.................... 5 5 +spidatain<6> X.X..X....X.......X..................... 5 5 +spidatain<5> X.X..X....X......X...................... 5 5 +spidatain<4> X.X..X....X.....X....................... 5 5 +spidatain<3> X.X..X....X....X........................ 5 5 +spidatain<2> X.X..X....X...X......................... 5 5 +spidatain<1> X.X..X....X..X.......................... 5 5 +spidatain<0> X.X..X....XXX........................... 6 6 +shiftcnt<3> X.X..XXXX.X............................. 7 7 +shiftcnt<2> X.X..XXX..X............................. 6 6 +shiftcnt<1> X.X..XX...X............................. 5 5 start_shifting/start_shifting_RSTF__$INT - .X...X.................................. 2 2 -spi_mosi XXXXXXXXXXXXXXXX........................ 16 16 + ..X......X.............................. 2 2 0----+----1----+----2----+----3----+----4 0 0 0 0 Legend: @@ -266,68 +271,43 @@ X(@) - Signal used as input (wire-AND input) to the macrocell logic. The number of Signals Used may exceed the number of FB Inputs Used due to wire-ANDing in the switch matrix. *********************************** FB3 *********************************** -Number of function block inputs used/remaining: 38/16 -Number of signals used by logic mapping into function block: 38 +Number of function block inputs used/remaining: 14/40 +Number of signals used by logic mapping into function block: 14 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use -shifting2 2 0 \/1 2 FB3_1 STD (b) (b) -cpu_d<5> 6 1<- 0 0 FB3_2 STD 11 I/O I/O -shiftdone 3 0 0 2 FB3_3 STD (b) (b) -$OpTx$INV$22__$INT 3 0 0 2 FB3_4 STD (b) (b) -cpu_d<6> 5 0 0 0 FB3_5 STD 12 I/O I/O -start_shifting 4 0 0 1 FB3_6 STD (b) (b) -spidatain<7> 4 0 0 1 FB3_7 STD (b) (b) -cpu_d<7> 5 0 0 0 FB3_8 STD 13 I/O I/O +(unused) 0 0 0 5 FB3_1 (b) +cpu_d<5> 4 0 0 1 FB3_2 STD 11 I/O I/O +(unused) 0 0 0 5 FB3_3 (b) +(unused) 0 0 0 5 FB3_4 (b) +cpu_d<6> 3 0 0 2 FB3_5 STD 12 I/O I/O +(unused) 0 0 0 5 FB3_6 (b) +(unused) 0 0 0 5 FB3_7 (b) +cpu_d<7> 3 0 0 2 FB3_8 STD 13 I/O I/O cpu_Nirq 1 0 0 4 FB3_9 STD 14 I/O O -spidatain<6> 4 0 0 1 FB3_10 STD (b) (b) -spidatain<5> 4 0 0 1 FB3_11 STD 18 I/O I -spidatain<4> 4 0 0 1 FB3_12 STD (b) (b) -spidatain<3> 4 0 0 1 FB3_13 STD (b) (b) -spidatain<2> 4 0 0 1 FB3_14 STD 19 I/O I -spidatain<1> 4 0 0 1 FB3_15 STD 20 I/O I -shiftcnt<3> 4 0 0 1 FB3_16 STD 24 I/O I -shiftcnt<2> 4 0 0 1 FB3_17 STD 22 I/O I -cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST - 5 0 0 0 FB3_18 STD (b) (b) +(unused) 0 0 0 5 FB3_10 (b) +(unused) 0 0 0 5 FB3_11 18 I/O I +(unused) 0 0 0 5 FB3_12 (b) +(unused) 0 0 0 5 FB3_13 (b) +(unused) 0 0 0 5 FB3_14 19 I/O I +(unused) 0 0 0 5 FB3_15 20 I/O I +(unused) 0 0 0 5 FB3_16 24 I/O I +(unused) 0 0 0 5 FB3_17 22 I/O I +(unused) 0 0 0 5 FB3_18 (b) Signals Used by Logic in Function Block - 1: $OpTx$INV$22__$INT - 14: shiftcnt<0> 27: spi_int<3> - 2: Ncs2 15: shiftcnt<1> 28: spidatain<0> - 3: cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST - 16: shiftcnt<2> 29: spidatain<1> - 4: cpu_Nphi2 17: shiftcnt<3> 30: spidatain<2> - 5: cpu_Nres 18: shiftdone 31: spidatain<3> - 6: cpu_a<0> 19: shifting2 32: spidatain<4> - 7: cpu_a<1> 20: slaveinten<0> 33: spidatain<5> - 8: cpu_rnw 21: slaveinten<1> 34: spidatain<6> - 9: cs1 22: slaveinten<2> 35: spidatain<7> - 10: ece 23: slaveinten<3> 36: start_shifting - 11: extclk 24: spi_int<0> 37: start_shifting/start_shifting_RSTF__$INT - 12: frx 25: spi_int<1> 38: tc - 13: ier 26: spi_int<2> + 1: Ncs2 6: cpu_rnw 11: spidatain<6> + 2: cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST + 7: cs1 12: spidatain<7> + 3: cpu_Nphi2 8: ier 13: start_shifting + 4: cpu_a<0> 9: shifting2 14: tc + 5: cpu_a<1> 10: spidatain<5> Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs -shifting2 X................X.................X.... 3 3 -cpu_d<5> .X.X.XXXX.........X.X...X.......X..X.... 11 11 -shiftdone X...X........XXXX....................... 6 6 -$OpTx$INV$22__$INT ...X.....XX.......X................X.... 5 5 -cpu_d<6> .X.X.XXXX...X........X...X.......X...... 10 10 -start_shifting .X...XXXX..X.......................XX... 8 8 -spidatain<7> X...X........X....X..............X...... 5 5 -cpu_d<7> .X.X.XXXX.............X...X.......X..X.. 10 10 -cpu_Nirq ..X..................................... 1 1 -spidatain<6> X...X........X....X.............X....... 5 5 -spidatain<5> X...X........X....X............X........ 5 5 -spidatain<4> X...X........X....X...........X......... 5 5 -spidatain<3> X...X........X....X..........X.......... 5 5 -spidatain<2> X...X........X....X.........X........... 5 5 -spidatain<1> X...X........X....X........X............ 5 5 -shiftcnt<3> X...X........XXXX.X..................... 7 7 -shiftcnt<2> X...X........XXX..X..................... 6 6 -cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST - ............X......XXXXXXXX..........X.. 10 10 +cpu_d<5> X.XXXXX.XX..X........................... 9 9 +cpu_d<6> X.XXXXXX..X............................. 8 8 +cpu_d<7> X.XXXXX....X.X.......................... 8 8 +cpu_Nirq .X...................................... 1 1 0----+----1----+----2----+----3----+----4 0 0 0 0 Legend: @@ -345,65 +325,59 @@ X(@) - Signal used as input (wire-AND input) to the macrocell logic. The number of Signals Used may exceed the number of FB Inputs Used due to wire-ANDing in the switch matrix. *********************************** FB4 *********************************** -Number of function block inputs used/remaining: 38/16 -Number of signals used by logic mapping into function block: 38 +Number of function block inputs used/remaining: 31/23 +Number of signals used by logic mapping into function block: 31 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use -tc 3 0 /\2 0 FB4_1 STD (b) (b) -spi_Nsel<3> 5 0 0 0 FB4_2 STD 25 I/O O -shiftcnt<0> 3 0 0 2 FB4_3 STD (b) (b) +cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST + 2 0 0 3 FB4_1 STD (b) (b) +tc 3 0 0 2 FB4_2 STD 25 I/O (b) +start_shifting 4 0 0 1 FB4_3 STD (b) (b) spidataout<7> 4 0 0 1 FB4_4 STD (b) (b) -spi_Nsel<2> 5 0 0 0 FB4_5 STD 26 I/O O -spidataout<6> 4 0 0 1 FB4_6 STD (b) (b) -spidataout<5> 4 0 0 1 FB4_7 STD (b) (b) -spi_Nsel<1> 5 0 0 0 FB4_8 STD 27 I/O O -spidataout<4> 4 0 0 1 FB4_9 STD (b) (b) -shiftcnt<1> 4 0 0 1 FB4_10 STD (b) (b) -spi_Nsel<0> 5 0 0 0 FB4_11 STD 28 I/O O -slaveinten<3> 5 0 0 0 FB4_12 STD (b) (b) -slaveinten<2> 5 0 0 0 FB4_13 STD (b) (b) -diag 1 0 \/1 3 FB4_14 STD 29 I/O O -slaveinten<1> 5 1<- \/1 0 FB4_15 STD 33 I/O (b) -ier 5 1<- \/1 0 FB4_16 STD (b) (b) +spidataout<6> 4 0 0 1 FB4_5 STD 26 I/O (b) +spidataout<5> 4 0 0 1 FB4_6 STD (b) (b) +spidataout<4> 4 0 0 1 FB4_7 STD (b) (b) +spidataout<3> 4 0 0 1 FB4_8 STD 27 I/O (b) +ier 5 0 0 0 FB4_9 STD (b) (b) +(unused) 0 0 0 5 FB4_10 (b) +spi_Nsel 5 0 0 0 FB4_11 STD 28 I/O O +(unused) 0 0 0 5 FB4_12 (b) +(unused) 0 0 0 5 FB4_13 (b) +led 1 0 0 4 FB4_14 STD 29 I/O O +(unused) 0 0 0 5 FB4_15 33 I/O +(unused) 0 0 \/1 4 FB4_16 (b) (b) spi_sclk 6 1<- 0 0 FB4_17 STD 34 I/O O -spidatain<0> 7 2<- 0 0 FB4_18 STD (b) (b) +(unused) 0 0 0 5 FB4_18 (b) Signals Used by Logic in Function Block 1: $OpTx$INV$22__$INT - 14: cpu_a<0> 27: spi_Nsel<1> - 2: cpu_d<0>.PIN 15: cpu_a<1> 28: spi_Nsel<2> - 3: cpu_d<1>.PIN 16: cpu_rnw 29: spi_Nsel<3> - 4: cpu_d<2>.PIN 17: cs1 30: spi_miso<0> - 5: cpu_d<3>.PIN 18: ier 31: spi_miso<1> - 6: cpu_d<4>.PIN 19: shiftcnt<0> 32: spi_miso<2> - 7: cpu_d<5>.PIN 20: shiftcnt<1> 33: spi_miso<3> - 8: cpu_d<6>.PIN 21: shiftdone 34: spidataout<4> - 9: cpu_d<7>.PIN 22: shifting2 35: spidataout<5> - 10: Ncs2 23: slaveinten<1> 36: spidataout<6> - 11: cpha 24: slaveinten<2> 37: spidataout<7> - 12: cpol 25: slaveinten<3> 38: start_shifting - 13: cpu_Nres 26: spi_Nsel<0> + 12: cpu_a<0> 22: spi_Nsel + 2: cpu_d<0>.PIN 13: cpu_a<1> 23: spi_int + 3: cpu_d<3>.PIN 14: cpu_rnw 24: spidataout<3> + 4: cpu_d<4>.PIN 15: cs1 25: spidataout<4> + 5: cpu_d<5>.PIN 16: frx 26: spidataout<5> + 6: cpu_d<6>.PIN 17: ier 27: spidataout<6> + 7: cpu_d<7>.PIN 18: shiftcnt<0> 28: spidataout<7> + 8: Ncs2 19: shiftdone 29: start_shifting + 9: cpha 20: shifting2 30: start_shifting/start_shifting_RSTF__$INT + 10: cpol 21: slaveinten 31: tc + 11: cpu_Nres Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs -tc .........X...XX.X...X................... 5 5 -spi_Nsel<3> ....X....X..XXXXX...........X........... 8 8 -shiftcnt<0> X...........X.....X..X.................. 4 4 -spidataout<7> ........XX..XXXXX...................X... 8 8 -spi_Nsel<2> ...X.....X..XXXXX..........X............ 8 8 -spidataout<6> .......X.X..XXXXX..................X.... 8 8 -spidataout<5> ......X..X..XXXXX.................X..... 8 8 -spi_Nsel<1> ..X......X..XXXXX.........X............. 8 8 -spidataout<4> .....X...X..XXXXX................X...... 8 8 -shiftcnt<1> X...........X.....XX.X.................. 5 5 -spi_Nsel<0> .X.......X..XXXXX........X.............. 8 8 -slaveinten<3> ........XX..XXXXX.......X............... 8 8 -slaveinten<2> .......X.X..XXXXX......X................ 8 8 -diag .....................X...X...........X.. 3 3 -slaveinten<1> ......X..X..XXXXX.....X................. 8 8 -ier .......X.X..XXXXXX...................... 8 8 -spi_sclk X.........XXX.....X.XX.................. 7 7 -spidatain<0> X...........X.....X..X...XXXXXXXX....... 12 12 +cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST + ................X...X.X.......X......... 4 4 +tc .......X...XX.X...X..................... 5 5 +start_shifting .......X...XXXXX............XX.......... 8 8 +spidataout<7> ......XX..XXXXX............X............ 8 8 +spidataout<6> .....X.X..XXXXX...........X............. 8 8 +spidataout<5> ....X..X..XXXXX..........X.............. 8 8 +spidataout<4> ...X...X..XXXXX.........X............... 8 8 +spidataout<3> ..X....X..XXXXX........X................ 8 8 +ier .....X.X..XXXXX.X....................... 8 8 +spi_Nsel .X.....X..XXXXX......X.................. 8 8 +led ...................X.X......X........... 3 3 +spi_sclk X.......XXX......XXX.................... 7 7 0----+----1----+----2----+----3----+----4 0 0 0 0 Legend: @@ -430,6 +404,8 @@ $OpTx$INV$22__$INT <= ((ece AND NOT extclk) + + FTCPE_cpha: FTCPE port map (cpha,cpha_T,cpha_C,NOT cpu_Nres,'0',NOT cpu_rnw); cpha_T <= ((cpha AND NOT cpu_a(1) AND cpu_a(0) AND NOT cpu_d(0).PIN) OR (NOT cpha AND NOT cpu_a(1) AND cpu_a(0) AND cpu_d(0).PIN)); @@ -447,13 +423,7 @@ cpu_Nirq_OE <= cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST; cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST <= ((ier AND tc) - OR (slaveinten(0) AND NOT spi_int(0)) - OR (slaveinten(1) AND NOT spi_int(1)) - OR (slaveinten(2) AND NOT spi_int(2)) - OR (slaveinten(3) AND NOT spi_int(3))); - - -diag <= (spi_Nsel(0) AND NOT start_shifting AND NOT shifting2); + OR (slaveinten AND NOT spi_int)); FTCPE_divisor0: FTCPE port map (divisor(0),divisor_T(0),divisor_C(0),NOT cpu_Nres,'0',NOT cpu_rnw); divisor_T(0) <= ((divisor(0) AND cpu_a(1) AND NOT cpu_a(0) AND NOT cpu_d(0).PIN) @@ -481,108 +451,91 @@ frx_T <= ((frx AND NOT cpu_a(1) AND cpu_a(0) AND NOT cpu_d(4).PIN) frx_C <= NOT ((cs1 AND NOT Ncs2)); FTCPE_ier: FTCPE port map (ier,ier_T,ier_C,NOT cpu_Nres,'0',NOT cpu_rnw); -ier_T <= ((slaveinten(1).EXP) +ier_T <= ((ier AND NOT cpu_a(1) AND cpu_a(0) AND NOT cpu_d(6).PIN) OR (NOT ier AND NOT cpu_a(1) AND cpu_a(0) AND cpu_d(6).PIN)); ier_C <= NOT ((cs1 AND NOT Ncs2)); -cpu_d_I(0) <= ((cpu_rnw AND spi_Nsel(0) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND cpha AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND - NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND divisor(0) AND cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(0) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2)); +cpu_d_I(0) <= ((cpu_rnw AND spi_Nsel AND cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND cpha AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND divisor(0) AND cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND spidatain(0) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2)); cpu_d(0) <= cpu_d_I(0) when cpu_d_OE(0) = '1' else 'Z'; cpu_d_OE(0) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); -cpu_d_I(1) <= ((cpu_rnw AND spi_Nsel(1) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND cpol AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND - NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND divisor(1) AND cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(1) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2)); +cpu_d_I(1) <= ((cpu_rnw AND cpol AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND divisor(1) AND cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND spidatain(1) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2)); cpu_d(1) <= cpu_d_I(1) when cpu_d_OE(1) = '1' else 'Z'; cpu_d_OE(1) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); -cpu_d_I(2) <= ((cpu_rnw AND spi_Nsel(2) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND ece AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND - NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND divisor(2) AND cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(2) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2)); +cpu_d_I(2) <= ((cpu_rnw AND ece AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND divisor(2) AND cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND spidatain(2) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2)); cpu_d(2) <= cpu_d_I(2) when cpu_d_OE(2) = '1' else 'Z'; cpu_d_OE(2) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); -cpu_d_I(3) <= ((cpu_rnw AND spi_Nsel(3) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND tmo AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND - NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(3) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2)); +cpu_d_I(3) <= ((cpu_rnw AND tmo AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND spidatain(3) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2)); cpu_d(3) <= cpu_d_I(3) when cpu_d_OE(3) = '1' else 'Z'; cpu_d_OE(3) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); -cpu_d_I(4) <= ((cpu_rnw AND frx AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND - NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND slaveinten(0) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(4) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND cpu_a(1) AND NOT cpu_a(0) AND cs1 AND NOT Ncs2 AND - NOT spi_int(0) AND cpu_Nphi2)); +cpu_d_I(4) <= ((cpu_rnw AND frx AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND slaveinten AND cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND spidatain(4) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND cpu_a(1) AND cs1 AND NOT Ncs2 AND NOT cpu_a(0) AND + NOT spi_int AND cpu_Nphi2)); cpu_d(4) <= cpu_d_I(4) when cpu_d_OE(4) = '1' else 'Z'; cpu_d_OE(4) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); -cpu_d_I(5) <= ((shifting2.EXP) - OR (cpu_rnw AND slaveinten(1) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(5) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND start_shifting AND NOT cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND NOT Ncs2 AND +cpu_d_I(5) <= ((cpu_rnw AND spidatain(5) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND NOT cpu_a(1) AND start_shifting AND cs1 AND + NOT Ncs2 AND cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND cpu_a(0) AND shifting2 AND cpu_Nphi2)); cpu_d(5) <= cpu_d_I(5) when cpu_d_OE(5) = '1' else 'Z'; cpu_d_OE(5) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); -cpu_d_I(6) <= ((cpu_rnw AND ier AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND - NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND slaveinten(2) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(6) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND cpu_a(1) AND NOT cpu_a(0) AND cs1 AND NOT Ncs2 AND - NOT spi_int(2) AND cpu_Nphi2)); +cpu_d_I(6) <= ((cpu_rnw AND ier AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND spidatain(6) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2)); cpu_d(6) <= cpu_d_I(6) when cpu_d_OE(6) = '1' else 'Z'; cpu_d_OE(6) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); -cpu_d_I(7) <= ((cpu_rnw AND slaveinten(3) AND cpu_a(1) AND cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND spidatain(7) AND NOT cpu_a(1) AND NOT cpu_a(0) AND - cs1 AND NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND tc AND NOT cpu_a(1) AND cpu_a(0) AND cs1 AND - NOT Ncs2 AND cpu_Nphi2) - OR (cpu_rnw AND cpu_a(1) AND NOT cpu_a(0) AND cs1 AND NOT Ncs2 AND - NOT spi_int(3) AND cpu_Nphi2)); +cpu_d_I(7) <= ((cpu_rnw AND spidatain(7) AND NOT cpu_a(1) AND cs1 AND NOT Ncs2 AND + NOT cpu_a(0) AND cpu_Nphi2) + OR (cpu_rnw AND NOT cpu_a(1) AND tc AND cs1 AND NOT Ncs2 AND + cpu_a(0) AND cpu_Nphi2)); cpu_d(7) <= cpu_d_I(7) when cpu_d_OE(7) = '1' else 'Z'; cpu_d_OE(7) <= (cpu_rnw AND cs1 AND NOT Ncs2 AND cpu_Nphi2); FDCPE_spi_mosi: FDCPE port map (spi_mosi_I,spi_mosi,NOT $OpTx$INV$22__$INT,'0',NOT cpu_Nres); -spi_mosi <= ((start_shifting/start_shifting_RSTF__$INT.EXP) - OR (EXP6_.EXP) +spi_mosi <= ((EXP6_.EXP) + OR (shifting2.EXP) OR (shiftcnt(3) AND shiftcnt(2) AND NOT shiftcnt(1) AND NOT shiftdone AND NOT spidataout(1) AND shifting2) OR (NOT shiftcnt(3) AND shiftcnt(2) AND NOT shiftcnt(1) AND @@ -593,12 +546,15 @@ spi_mosi_OE <= NOT tmo; FDCPE_spi_sclk: FDCPE port map (spi_sclk,spi_sclk_D,NOT $OpTx$INV$22__$INT,spi_sclk_CLR,spi_sclk_PRE); spi_sclk_D <= cpol XOR -spi_sclk_D <= ((ier.EXP) +spi_sclk_D <= ((EXP7_.EXP) OR (cpu_Nres AND NOT cpha AND shiftcnt(0) AND NOT shiftdone AND shifting2)); spi_sclk_CLR <= (NOT cpu_Nres AND NOT cpol); spi_sclk_PRE <= (NOT cpu_Nres AND cpol); + +led <= (spi_Nsel AND NOT start_shifting AND NOT shifting2); + FDCPE_shiftcnt0: FDCPE port map (shiftcnt(0),shiftcnt_D(0),NOT $OpTx$INV$22__$INT,NOT cpu_Nres,'0'); shiftcnt_D(0) <= (NOT shiftcnt(0) AND shifting2); @@ -622,65 +578,18 @@ shiftdone_D <= (shiftcnt(3) AND shiftcnt(2) AND shiftcnt(0) AND FDCPE_shifting2: FDCPE port map (shifting2,shifting2_D,NOT $OpTx$INV$22__$INT,'0','0'); shifting2_D <= (NOT shiftdone AND start_shifting); -FTCPE_slaveinten0: FTCPE port map (slaveinten(0),slaveinten_T(0),slaveinten_C(0),NOT cpu_Nres,'0',NOT cpu_rnw); -slaveinten_T(0) <= ((slaveinten(0) AND cpu_a(1) AND cpu_a(0) AND - NOT cpu_d(4).PIN) - OR (NOT slaveinten(0) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(4).PIN)); -slaveinten_C(0) <= NOT ((cs1 AND NOT Ncs2)); +FTCPE_slaveinten: FTCPE port map (slaveinten,slaveinten_T,slaveinten_C,NOT cpu_Nres,'0',NOT cpu_rnw); +slaveinten_T <= ((slaveinten AND cpu_a(1) AND cpu_a(0) AND NOT cpu_d(4).PIN) + OR (NOT slaveinten AND cpu_a(1) AND cpu_a(0) AND cpu_d(4).PIN)); +slaveinten_C <= NOT ((cs1 AND NOT Ncs2)); -FTCPE_slaveinten1: FTCPE port map (slaveinten(1),slaveinten_T(1),slaveinten_C(1),NOT cpu_Nres,'0',NOT cpu_rnw); -slaveinten_T(1) <= ((diag_OBUF.EXP) - OR (NOT slaveinten(1) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(5).PIN)); -slaveinten_C(1) <= NOT ((cs1 AND NOT Ncs2)); - -FTCPE_slaveinten2: FTCPE port map (slaveinten(2),slaveinten_T(2),slaveinten_C(2),NOT cpu_Nres,'0',NOT cpu_rnw); -slaveinten_T(2) <= ((slaveinten(2) AND cpu_a(1) AND cpu_a(0) AND - NOT cpu_d(6).PIN) - OR (NOT slaveinten(2) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(6).PIN)); -slaveinten_C(2) <= NOT ((cs1 AND NOT Ncs2)); - -FTCPE_slaveinten3: FTCPE port map (slaveinten(3),slaveinten_T(3),slaveinten_C(3),NOT cpu_Nres,'0',NOT cpu_rnw); -slaveinten_T(3) <= ((slaveinten(3) AND cpu_a(1) AND cpu_a(0) AND - NOT cpu_d(7).PIN) - OR (NOT slaveinten(3) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(7).PIN)); -slaveinten_C(3) <= NOT ((cs1 AND NOT Ncs2)); - -FTCPE_spi_Nsel0: FTCPE port map (spi_Nsel(0),spi_Nsel_T(0),spi_Nsel_C(0),'0',NOT cpu_Nres,NOT cpu_rnw); -spi_Nsel_T(0) <= ((spi_Nsel(0) AND cpu_a(1) AND cpu_a(0) AND - NOT cpu_d(0).PIN) - OR (NOT spi_Nsel(0) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(0).PIN)); -spi_Nsel_C(0) <= NOT ((cs1 AND NOT Ncs2)); - -FTCPE_spi_Nsel1: FTCPE port map (spi_Nsel(1),spi_Nsel_T(1),spi_Nsel_C(1),'0',NOT cpu_Nres,NOT cpu_rnw); -spi_Nsel_T(1) <= ((spi_Nsel(1) AND cpu_a(1) AND cpu_a(0) AND - NOT cpu_d(1).PIN) - OR (NOT spi_Nsel(1) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(1).PIN)); -spi_Nsel_C(1) <= NOT ((cs1 AND NOT Ncs2)); - -FTCPE_spi_Nsel2: FTCPE port map (spi_Nsel(2),spi_Nsel_T(2),spi_Nsel_C(2),'0',NOT cpu_Nres,NOT cpu_rnw); -spi_Nsel_T(2) <= ((spi_Nsel(2) AND cpu_a(1) AND cpu_a(0) AND - NOT cpu_d(2).PIN) - OR (NOT spi_Nsel(2) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(2).PIN)); -spi_Nsel_C(2) <= NOT ((cs1 AND NOT Ncs2)); - -FTCPE_spi_Nsel3: FTCPE port map (spi_Nsel(3),spi_Nsel_T(3),spi_Nsel_C(3),'0',NOT cpu_Nres,NOT cpu_rnw); -spi_Nsel_T(3) <= ((spi_Nsel(3) AND cpu_a(1) AND cpu_a(0) AND - NOT cpu_d(3).PIN) - OR (NOT spi_Nsel(3) AND cpu_a(1) AND cpu_a(0) AND - cpu_d(3).PIN)); -spi_Nsel_C(3) <= NOT ((cs1 AND NOT Ncs2)); +FTCPE_spi_Nsel: FTCPE port map (spi_Nsel,spi_Nsel_T,spi_Nsel_C,'0',NOT cpu_Nres,NOT cpu_rnw); +spi_Nsel_T <= ((spi_Nsel AND cpu_a(1) AND cpu_a(0) AND NOT cpu_d(0).PIN) + OR (NOT spi_Nsel AND cpu_a(1) AND cpu_a(0) AND cpu_d(0).PIN)); +spi_Nsel_C <= NOT ((cs1 AND NOT Ncs2)); FDCPE_spidatain0: FDCPE port map (spidatain(0),spidatain_D(0),NOT $OpTx$INV$22__$INT,NOT cpu_Nres,'0',spidatain_CE(0)); -spidatain_D(0) <= ((tc.EXP) - OR (NOT spi_Nsel(2) AND spi_miso(2)) - OR (NOT spi_Nsel(3) AND spi_miso(3))); +spidatain_D(0) <= (NOT spi_Nsel AND spi_miso); spidatain_CE(0) <= (shiftcnt(0) AND shifting2); FDCPE_spidatain1: FDCPE port map (spidatain(1),spidatain(0),NOT $OpTx$INV$22__$INT,NOT cpu_Nres,'0',spidatain_CE(1)); @@ -705,72 +614,72 @@ FDCPE_spidatain7: FDCPE port map (spidatain(7),spidatain(6),NOT $OpTx$INV$22__$I spidatain_CE(7) <= (shiftcnt(0) AND shifting2); FTCPE_spidataout0: FTCPE port map (spidataout(0),spidataout_T(0),spidataout_C(0),'0','0',spidataout_CE(0)); -spidataout_T(0) <= ((spidataout(0) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(0) <= ((NOT cpu_a(1) AND spidataout(0) AND NOT cpu_a(0) AND NOT cpu_d(0).PIN) - OR (NOT spidataout(0) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(0) AND NOT cpu_a(0) AND cpu_d(0).PIN)); spidataout_C(0) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(0) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_spidataout1: FTCPE port map (spidataout(1),spidataout_T(1),spidataout_C(1),'0','0',spidataout_CE(1)); -spidataout_T(1) <= ((spidataout(1) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(1) <= ((NOT cpu_a(1) AND spidataout(1) AND NOT cpu_a(0) AND NOT cpu_d(1).PIN) - OR (NOT spidataout(1) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(1) AND NOT cpu_a(0) AND cpu_d(1).PIN)); spidataout_C(1) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(1) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_spidataout2: FTCPE port map (spidataout(2),spidataout_T(2),spidataout_C(2),'0','0',spidataout_CE(2)); -spidataout_T(2) <= ((spidataout(2) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(2) <= ((NOT cpu_a(1) AND spidataout(2) AND NOT cpu_a(0) AND NOT cpu_d(2).PIN) - OR (NOT spidataout(2) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(2) AND NOT cpu_a(0) AND cpu_d(2).PIN)); spidataout_C(2) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(2) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_spidataout3: FTCPE port map (spidataout(3),spidataout_T(3),spidataout_C(3),'0','0',spidataout_CE(3)); -spidataout_T(3) <= ((spidataout(3) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(3) <= ((NOT cpu_a(1) AND spidataout(3) AND NOT cpu_a(0) AND NOT cpu_d(3).PIN) - OR (NOT spidataout(3) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(3) AND NOT cpu_a(0) AND cpu_d(3).PIN)); spidataout_C(3) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(3) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_spidataout4: FTCPE port map (spidataout(4),spidataout_T(4),spidataout_C(4),'0','0',spidataout_CE(4)); -spidataout_T(4) <= ((spidataout(4) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(4) <= ((NOT cpu_a(1) AND spidataout(4) AND NOT cpu_a(0) AND NOT cpu_d(4).PIN) - OR (NOT spidataout(4) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(4) AND NOT cpu_a(0) AND cpu_d(4).PIN)); spidataout_C(4) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(4) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_spidataout5: FTCPE port map (spidataout(5),spidataout_T(5),spidataout_C(5),'0','0',spidataout_CE(5)); -spidataout_T(5) <= ((spidataout(5) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(5) <= ((NOT cpu_a(1) AND spidataout(5) AND NOT cpu_a(0) AND NOT cpu_d(5).PIN) - OR (NOT spidataout(5) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(5) AND NOT cpu_a(0) AND cpu_d(5).PIN)); spidataout_C(5) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(5) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_spidataout6: FTCPE port map (spidataout(6),spidataout_T(6),spidataout_C(6),'0','0',spidataout_CE(6)); -spidataout_T(6) <= ((spidataout(6) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(6) <= ((NOT cpu_a(1) AND spidataout(6) AND NOT cpu_a(0) AND NOT cpu_d(6).PIN) - OR (NOT spidataout(6) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(6) AND NOT cpu_a(0) AND cpu_d(6).PIN)); spidataout_C(6) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(6) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_spidataout7: FTCPE port map (spidataout(7),spidataout_T(7),spidataout_C(7),'0','0',spidataout_CE(7)); -spidataout_T(7) <= ((spidataout(7) AND NOT cpu_a(1) AND NOT cpu_a(0) AND +spidataout_T(7) <= ((NOT cpu_a(1) AND spidataout(7) AND NOT cpu_a(0) AND NOT cpu_d(7).PIN) - OR (NOT spidataout(7) AND NOT cpu_a(1) AND NOT cpu_a(0) AND + OR (NOT cpu_a(1) AND NOT spidataout(7) AND NOT cpu_a(0) AND cpu_d(7).PIN)); spidataout_C(7) <= NOT ((cs1 AND NOT Ncs2)); spidataout_CE(7) <= (cpu_Nres AND NOT cpu_rnw); FTCPE_start_shifting: FTCPE port map (start_shifting,start_shifting_T,start_shifting_C,NOT start_shifting/start_shifting_RSTF__$INT,'0'); -start_shifting_T <= ((NOT cpu_rnw AND NOT start_shifting AND NOT cpu_a(1) AND NOT cpu_a(0)) - OR (frx AND NOT start_shifting AND NOT cpu_a(1) AND NOT cpu_a(0))); +start_shifting_T <= ((NOT cpu_rnw AND NOT cpu_a(1) AND NOT start_shifting AND NOT cpu_a(0)) + OR (frx AND NOT cpu_a(1) AND NOT start_shifting AND NOT cpu_a(0))); start_shifting_C <= NOT ((cs1 AND NOT Ncs2)); @@ -814,13 +723,13 @@ Device : XC9572XL-10-PC44 Pin Signal Pin Signal No. Name No. Name - 1 spi_int<3> 23 GND + 1 TIE 23 GND 2 cpu_d<0> 24 cpu_a<1> - 3 cpu_d<1> 25 spi_Nsel<3> - 4 cpu_d<2> 26 spi_Nsel<2> - 5 cpu_Nphi2 27 spi_Nsel<1> - 6 extclk 28 spi_Nsel<0> - 7 cpu_rnw 29 diag + 3 cpu_d<1> 25 TIE + 4 cpu_d<2> 26 TIE + 5 cpu_Nphi2 27 TIE + 6 extclk 28 spi_Nsel + 7 cpu_rnw 29 led 8 cpu_d<3> 30 TDO 9 cpu_d<4> 31 GND 10 GND 32 VCC @@ -828,14 +737,14 @@ No. Name No. Name 12 cpu_d<6> 34 spi_sclk 13 cpu_d<7> 35 spi_mosi 14 cpu_Nirq 36 TIE - 15 TDI 37 spi_miso<3> - 16 TMS 38 spi_miso<2> - 17 TCK 39 spi_int<2> - 18 Ncs2 40 spi_int<1> + 15 TDI 37 TIE + 16 TMS 38 TIE + 17 TCK 39 TIE + 18 Ncs2 40 TIE 19 cpu_Nres 41 VCC - 20 cs1 42 spi_int<0> - 21 VCC 43 spi_miso<1> - 22 cpu_a<0> 44 spi_miso<0> + 20 cs1 42 spi_int + 21 VCC 43 TIE + 22 cpu_a<0> 44 spi_miso Legend : NC = Not Connected, unbonded pin diff --git a/spi6502b.syr b/spi6502b.syr index 10de977..86a74ef 100644 --- a/spi6502b.syr +++ b/spi6502b.syr @@ -1,10 +1,10 @@ Release 6.3.03i - xst G.38 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav -CPU : 0.00 / 0.28 s | Elapsed : 0.00 / 0.00 s +CPU : 0.00 / 0.25 s | Elapsed : 0.00 / 0.00 s --> Parameter xsthdpdir set to ./xst -CPU : 0.00 / 0.28 s | Elapsed : 0.00 / 0.00 s +CPU : 0.00 / 0.25 s | Elapsed : 0.00 / 0.00 s --> Reading design: spi6502b.prj @@ -67,14 +67,14 @@ wysiwyg : NO * HDL Compilation * ========================================================================= Compiling vhdl file C:/sources/AppleIISd/SPI6502B1.1.vhd in Library work. -Architecture behavioral of Entity spi6502b is up to date. +Entity (Architecture ) compiled. ========================================================================= * HDL Analysis * ========================================================================= Analyzing Entity (Architecture ). INFO:Xst:1561 - C:/sources/AppleIISd/SPI6502B1.1.vhd line 203: Mux is complete : default of case is discarded -INFO:Xst:1561 - C:/sources/AppleIISd/SPI6502B1.1.vhd line 320: Mux is complete : default of case is discarded +INFO:Xst:1561 - C:/sources/AppleIISd/SPI6502B1.1.vhd line 316: Mux is complete : default of case is discarded Entity analyzed. Unit generated. @@ -101,17 +101,17 @@ Synthesizing Unit . Found 4-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . - Found 4-bit register for signal . - Found 4-bit register for signal . + Found 1-bit register for signal . + Found 1-bit register for signal . Found 8-bit register for signal . Found 8-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . Found 1-bit register for signal . - Found 30 1-bit 2-to-1 multiplexers. + Found 24 1-bit 2-to-1 multiplexers. Summary: inferred 1 Counter(s). - inferred 18 D-type flip-flop(s). + inferred 20 D-type flip-flop(s). inferred 1 Adder/Subtracter(s). inferred 10 Tristate(s). Unit synthesized. @@ -133,10 +133,10 @@ Macro Statistics # Adders/Subtractors : 1 4-bit adder : 1 # Registers : 25 - 1-bit register : 20 + 1-bit register : 22 8-bit register : 1 3-bit register : 1 - 4-bit register : 3 + 4-bit register : 1 # Multiplexers : 12 2-to-1 multiplexer : 12 # Tristates : 3 @@ -169,11 +169,11 @@ Clock Enable : YES wysiwyg : NO Design Statistics -# IOs : 32 +# IOs : 23 Macro Statistics : -# Registers : 74 -# 1-bit register : 74 +# Registers : 60 +# 1-bit register : 60 # Tristates : 3 # 1-bit tristate buffer : 2 # 8-bit tristate buffer : 1 @@ -181,35 +181,33 @@ Macro Statistics : # 1-bit xor2 : 5 Cell Usage : -# BELS : 320 -# AND2 : 156 -# AND3 : 2 +# BELS : 252 +# AND2 : 119 +# AND3 : 5 # AND4 : 1 # GND : 1 -# INV : 95 -# OR2 : 56 +# INV : 77 +# OR2 : 42 # OR3 : 1 -# OR4 : 1 -# OR5 : 1 # VCC : 1 # XOR2 : 5 -# FlipFlops/Latches : 43 +# FlipFlops/Latches : 37 # FD : 1 # FDC : 5 -# FDCE : 30 +# FDCE : 27 # FDCP : 1 # FDP : 1 -# FDPE : 5 -# IO Buffers : 32 -# IBUF : 16 +# FDPE : 2 +# IO Buffers : 23 +# IBUF : 10 # IOBUFE : 8 -# OBUF : 6 +# OBUF : 3 # OBUFE : 2 ========================================================================= -CPU : 0.67 / 1.11 s | Elapsed : 1.00 / 1.00 s +CPU : 0.65 / 1.07 s | Elapsed : 0.00 / 1.00 s --> -Total memory usage is 68952 kilobytes +Total memory usage is 68376 kilobytes diff --git a/spi6502b.vm6 b/spi6502b.vm6 index dcde2e5..694f27c 100644 --- a/spi6502b.vm6 +++ b/spi6502b.vm6 @@ -8,4088 +8,3425 @@ NETWORK | spi6502b | 0 | 0 | 16391 INPUT_INSTANCE | 0 | 0 | NULL | cpu_Nres_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_Nres | 5046 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | cpu_Nres | 4063 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX MACROCELL_INSTANCE | Inv+PrldLow+PinTrst+OptxMapped | int_mosi | spi6502b_COPY_0_COPY_0 | 2155889920 | 12 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<5> | 4982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM +NODE | spidataout<5> | 4018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<1> | 4978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM +NODE | spidataout<1> | 4014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting/start_shifting_RSTF__$INT.EXP | 5420 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.EXP | start_shifting/start_shifting_RSTF__$INT | 4 | 0 | MC_EXPORT +NODE | EXP6_.EXP | 4389 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP6_.EXP | EXP6_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP6_.EXP | 5421 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP6_.EXP | EXP6_ | 4 | 0 | MC_EXPORT +NODE | shifting2.EXP | 4390 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.EXP | shifting2 | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tmo | 4957 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM +NODE | tmo | 3983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_mosi | 4937 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.Q | int_mosi | 0 | 0 | MC_Q +NODE | int_mosi | 3972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.Q | int_mosi | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_mosi$OE | 4938 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.BUFOE.OUT | int_mosi | 2 | 0 | MC_OE +NODE | int_mosi$OE | 3973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.BUFOE.OUT | int_mosi | 2 | 0 | MC_OE SIGNAL_INSTANCE | int_mosi.SI | int_mosi | 0 | 12 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<5> | 4982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM +NODE | spidataout<5> | 4018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<1> | 4978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM +NODE | spidataout<1> | 4014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting/start_shifting_RSTF__$INT.EXP | 5420 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.EXP | start_shifting/start_shifting_RSTF__$INT | 4 | 0 | MC_EXPORT +NODE | EXP6_.EXP | 4389 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP6_.EXP | EXP6_ | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | EXP6_.EXP | 5421 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP6_.EXP | EXP6_ | 4 | 0 | MC_EXPORT +NODE | shifting2.EXP | 4390 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.EXP | shifting2 | 4 | 0 | MC_EXPORT INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tmo | 4957 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM +NODE | tmo | 3983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_mosi.D1 | 5063 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_mosi.D1 | 4074 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_mosi.D2 | 5064 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | start_shifting/start_shifting_RSTF__$INT.EXP +SIGNAL | NODE | int_mosi.D2 | 4075 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | EXP6_.EXP +SPPTERM | 1 | IV_TRUE | shifting2.EXP SPPTERM | 6 | IV_TRUE | shiftcnt<3> | IV_TRUE | shiftcnt<2> | IV_FALSE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<1> | IV_TRUE | shifting2 SPPTERM | 6 | IV_FALSE | shiftcnt<3> | IV_TRUE | shiftcnt<2> | IV_FALSE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<5> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | int_mosi.CLKF | 5065 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | int_mosi.CLKF | 4076 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF -SIGNAL | NODE | int_mosi.SETF | 5066 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 5 | 9 | MC_SI_SETF +SIGNAL | NODE | int_mosi.SETF | 4077 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 5 | 9 | MC_SI_SETF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_mosi.TRST | 5068 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_mosi.TRST | 4079 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 4 | 9 | MC_SI_TRST SPPTERM | 1 | IV_FALSE | tmo SRFF_INSTANCE | int_mosi.REG | int_mosi | 0 | 3 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_mosi.D | 5062 | ? | 0 | 0 | int_mosi | NULL | NULL | int_mosi.XOR | 0 | 7 | ALU_F +NODE | int_mosi.D | 4073 | ? | 0 | 0 | int_mosi | NULL | NULL | int_mosi.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | int_mosi.CLKF | 5065 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | int_mosi.CLKF | 4076 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 2 | 8 | SRFF_S -SIGNAL | NODE | int_mosi.SETF | 5066 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 5 | 9 | MC_SI_SETF +SIGNAL | NODE | int_mosi.SETF | 4077 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 5 | 9 | MC_SI_SETF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_mosi.Q | 5069 | ? | 0 | 0 | int_mosi | NULL | NULL | int_mosi.REG | 0 | 8 | SRFF_Q +NODE | int_mosi.Q | 4080 | ? | 0 | 0 | int_mosi | NULL | NULL | int_mosi.REG | 0 | 8 | SRFF_Q BUF_INSTANCE | int_mosi.BUFOE | int_mosi | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_mosi.TRST | 5068 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_mosi.TRST | 4079 | ? | 0 | 4096 | int_mosi | NULL | NULL | int_mosi.SI | 4 | 9 | MC_SI_TRST SPPTERM | 1 | IV_FALSE | tmo OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_mosi.BUFOE.OUT | 5067 | ? | 0 | 0 | int_mosi | NULL | NULL | int_mosi.BUFOE | 0 | 10 | BUF_OUT +NODE | int_mosi.BUFOE.OUT | 4078 | ? | 0 | 0 | int_mosi | NULL | NULL | int_mosi.BUFOE | 0 | 10 | BUF_OUT INPUT_INSTANCE | 0 | 0 | NULL | cpu_rnw_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_rnw | 5047 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | cpu_rnw | 4064 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | Ncs2_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | Ncs2 | 5051 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | Ncs2 | 4068 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | cs1_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cs1 | 5050 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | cs1 | 4067 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_INSTANCE | 0 | 0 | NULL | N3455 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | N2889 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<0> | 5033 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<0> | 0 | 6 | OI_OUT +NODE | cpu_d<0> | 4054 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<0> | 0 | 6 | OI_OUT OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | cpu_a_1_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_a<1> | 5048 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX INPUT_INSTANCE | 0 | 0 | NULL | cpu_a_0_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_a<0> | 5049 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | cpu_a<0> | 4069 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slavesel<0> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | slavesel<0>$Q | 4940 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | slavesel<0>.SI | slavesel<0> | 0 | 8 | 5 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slavesel<0>.D1 | 5071 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slavesel<0>.D2 | 5072 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | slavesel<0> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3455 -SPPTERM | 4 | IV_FALSE | slavesel<0> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3455 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slavesel<0>.CLKF | 5073 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF -SIGNAL | NODE | slavesel<0>.SETF | 5074 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slavesel<0>.CE | 5075 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | slavesel<0>.REG | slavesel<0> | 0 | 4 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slavesel<0>.D | 5070 | ? | 0 | 0 | slavesel<0> | NULL | NULL | slavesel<0>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slavesel<0>.CLKF | 5073 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 2 | 8 | SRFF_S -SIGNAL | NODE | slavesel<0>.SETF | 5074 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slavesel<0>.CE | 5075 | ? | 0 | 4096 | slavesel<0> | NULL | NULL | slavesel<0>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slavesel<0>.Q | 5076 | ? | 0 | 0 | slavesel<0> | NULL | NULL | slavesel<0>.REG | 0 | 8 | SRFF_Q - -INPUT_INSTANCE | 0 | 0 | NULL | N3457 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | cpu_a_1_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<1> | 5034 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<1> | 0 | 6 | OI_OUT +NODE | cpu_a<1> | 4066 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slavesel<1> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 2 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slavesel | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<1> | 4943 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 1 | 0 | MC_UIM +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | slavesel<1>$Q | 4942 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 0 | 0 | MC_Q +NODE | slavesel$Q | 3975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slavesel<1> | 4943 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 1 | 0 | MC_UIM +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | slavesel<1>.SI | slavesel<1> | 0 | 8 | 5 +SIGNAL_INSTANCE | slavesel.SI | slavesel | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<1> | 4943 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 1 | 0 | MC_UIM +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slavesel<1>.D1 | 5078 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | slavesel.D1 | 4082 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slavesel<1>.D2 | 5079 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | slavesel<1> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3457 -SPPTERM | 4 | IV_FALSE | slavesel<1> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3457 +SIGNAL | NODE | slavesel.D2 | 4083 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | slavesel | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2889 +SPPTERM | 4 | IV_FALSE | slavesel | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2889 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slavesel<1>.CLKF | 5080 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | slavesel.CLKF | 4084 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF -SIGNAL | NODE | slavesel<1>.SETF | 5081 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 5 | 9 | MC_SI_SETF +SIGNAL | NODE | slavesel.SETF | 4085 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 5 | 9 | MC_SI_SETF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slavesel<1>.CE | 5082 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | slavesel.CE | 4086 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -SRFF_INSTANCE | slavesel<1>.REG | slavesel<1> | 0 | 4 | 1 +SRFF_INSTANCE | slavesel.REG | slavesel | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slavesel<1>.D | 5077 | ? | 0 | 0 | slavesel<1> | NULL | NULL | slavesel<1>.XOR | 0 | 7 | ALU_F +NODE | slavesel.D | 4081 | ? | 0 | 0 | slavesel | NULL | NULL | slavesel.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slavesel<1>.CLKF | 5080 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | slavesel.CLKF | 4084 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 2 | 8 | SRFF_S -SIGNAL | NODE | slavesel<1>.SETF | 5081 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 5 | 9 | MC_SI_SETF +SIGNAL | NODE | slavesel.SETF | 4085 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 5 | 9 | MC_SI_SETF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slavesel<1>.CE | 5082 | ? | 0 | 4096 | slavesel<1> | NULL | NULL | slavesel<1>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | slavesel.CE | 4086 | ? | 0 | 4096 | slavesel | NULL | NULL | slavesel.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slavesel<1>.Q | 5083 | ? | 0 | 0 | slavesel<1> | NULL | NULL | slavesel<1>.REG | 0 | 8 | SRFF_Q +NODE | slavesel.Q | 4087 | ? | 0 | 0 | slavesel | NULL | NULL | slavesel.REG | 0 | 8 | SRFF_Q -INPUT_INSTANCE | 0 | 0 | NULL | N3459 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | N2891 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<2> | 5035 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<2> | 0 | 6 | OI_OUT +NODE | cpu_d<1> | 4055 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<1> | 0 | 6 | OI_OUT OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slavesel<2> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<2> | 4945 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | slavesel<2>$Q | 4944 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slavesel<2> | 4945 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | slavesel<2>.SI | slavesel<2> | 0 | 8 | 5 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<2> | 4945 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slavesel<2>.D1 | 5085 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slavesel<2>.D2 | 5086 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | slavesel<2> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3459 -SPPTERM | 4 | IV_FALSE | slavesel<2> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3459 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slavesel<2>.CLKF | 5087 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF -SIGNAL | NODE | slavesel<2>.SETF | 5088 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slavesel<2>.CE | 5089 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | slavesel<2>.REG | slavesel<2> | 0 | 4 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slavesel<2>.D | 5084 | ? | 0 | 0 | slavesel<2> | NULL | NULL | slavesel<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slavesel<2>.CLKF | 5087 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 2 | 8 | SRFF_S -SIGNAL | NODE | slavesel<2>.SETF | 5088 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slavesel<2>.CE | 5089 | ? | 0 | 4096 | slavesel<2> | NULL | NULL | slavesel<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slavesel<2>.Q | 5090 | ? | 0 | 0 | slavesel<2> | NULL | NULL | slavesel<2>.REG | 0 | 8 | SRFF_Q - -INPUT_INSTANCE | 0 | 0 | NULL | N3461 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<3> | 5036 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<3> | 0 | 6 | OI_OUT -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3461 | 5009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3461 | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slavesel<3> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<3> | 4947 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3461 | 5009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3461 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | slavesel<3>$Q | 4946 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slavesel<3> | 4947 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | slavesel<3>.SI | slavesel<3> | 0 | 8 | 5 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<3> | 4947 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3461 | 5009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3461 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slavesel<3>.D1 | 5092 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slavesel<3>.D2 | 5093 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | slavesel<3> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3461 -SPPTERM | 4 | IV_FALSE | slavesel<3> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3461 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slavesel<3>.CLKF | 5094 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF -SIGNAL | NODE | slavesel<3>.SETF | 5095 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slavesel<3>.CE | 5096 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | slavesel<3>.REG | slavesel<3> | 0 | 4 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slavesel<3>.D | 5091 | ? | 0 | 0 | slavesel<3> | NULL | NULL | slavesel<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slavesel<3>.CLKF | 5094 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 2 | 8 | SRFF_S -SIGNAL | NODE | slavesel<3>.SETF | 5095 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slavesel<3>.CE | 5096 | ? | 0 | 4096 | slavesel<3> | NULL | NULL | slavesel<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slavesel<3>.Q | 5097 | ? | 0 | 0 | slavesel<3> | NULL | NULL | slavesel<3>.REG | 0 | 8 | SRFF_Q +NODE | N2891 | 4034 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2891 | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cpol | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpol | 4948 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM +NODE | cpol | 3977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX +NODE | N2891 | 4034 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2891 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cpol | 4948 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM +NODE | cpol | 3977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM SIGNAL_INSTANCE | cpol.SI | cpol | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpol | 4948 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM +NODE | cpol | 3977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX +NODE | N2891 | 4034 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2891 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cpol.D1 | 5099 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cpol.D1 | 4089 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cpol.D2 | 5100 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | cpol | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3457 -SPPTERM | 4 | IV_FALSE | cpol | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3457 +SIGNAL | NODE | cpol.D2 | 4090 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | cpol | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2891 +SPPTERM | 4 | IV_FALSE | cpol | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2891 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cpol.CLKF | 5101 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | cpol.CLKF | 4091 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | cpol.RSTF | 5102 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | cpol.RSTF | 4092 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cpol.CE | 5103 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cpol.CE | 4093 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | cpol.REG | cpol | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cpol.D | 5098 | ? | 0 | 0 | cpol | NULL | NULL | cpol.XOR | 0 | 7 | ALU_F +NODE | cpol.D | 4088 | ? | 0 | 0 | cpol | NULL | NULL | cpol.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cpol.CLKF | 5101 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | cpol.CLKF | 4091 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | cpol.RSTF | 5102 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | cpol.RSTF | 4092 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cpol.CE | 5103 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cpol.CE | 4093 | ? | 0 | 4096 | cpol | NULL | NULL | cpol.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cpol.Q | 5104 | ? | 0 | 0 | cpol | NULL | NULL | cpol.REG | 0 | 8 | SRFF_Q +NODE | cpol.Q | 4094 | ? | 0 | 0 | cpol | NULL | NULL | cpol.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | N2893 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | cpu_d<2> | 4056 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<2> | 0 | 6 | OI_OUT +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | N2893 | 4035 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2893 | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | ece | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ece | 4949 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM +NODE | ece | 3978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX +NODE | N2893 | 4035 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2893 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ece | 4949 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM +NODE | ece | 3978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM SIGNAL_INSTANCE | ece.SI | ece | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ece | 4949 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM +NODE | ece | 3978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX +NODE | N2893 | 4035 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2893 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ece.D1 | 5106 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ece.D1 | 4096 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ece.D2 | 5107 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | ece | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3459 -SPPTERM | 4 | IV_FALSE | ece | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3459 +SIGNAL | NODE | ece.D2 | 4097 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | ece | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2893 +SPPTERM | 4 | IV_FALSE | ece | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2893 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | ece.CLKF | 5108 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | ece.CLKF | 4098 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | ece.RSTF | 5109 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | ece.RSTF | 4099 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | ece.CE | 5110 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | ece.CE | 4100 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | ece.REG | ece | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ece.D | 5105 | ? | 0 | 0 | ece | NULL | NULL | ece.XOR | 0 | 7 | ALU_F +NODE | ece.D | 4095 | ? | 0 | 0 | ece | NULL | NULL | ece.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | ece.CLKF | 5108 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | ece.CLKF | 4098 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | ece.RSTF | 5109 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | ece.RSTF | 4099 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | ece.CE | 5110 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | ece.CE | 4100 | ? | 0 | 4096 | ece | NULL | NULL | ece.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ece.Q | 5111 | ? | 0 | 0 | ece | NULL | NULL | ece.REG | 0 | 8 | SRFF_Q +NODE | ece.Q | 4101 | ? | 0 | 0 | ece | NULL | NULL | ece.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | cpha | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM SIGNAL_INSTANCE | cpha.SI | cpha | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cpha.D1 | 5113 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cpha.D1 | 4103 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cpha.D2 | 5114 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | cpha | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3455 -SPPTERM | 4 | IV_FALSE | cpha | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3455 +SIGNAL | NODE | cpha.D2 | 4104 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | cpha | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2889 +SPPTERM | 4 | IV_FALSE | cpha | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2889 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | cpha.CLKF | 5115 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | cpha.CLKF | 4105 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | cpha.RSTF | 5116 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | cpha.RSTF | 4106 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | cpha.CE | 5117 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cpha.CE | 4107 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | cpha.REG | cpha | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cpha.D | 5112 | ? | 0 | 0 | cpha | NULL | NULL | cpha.XOR | 0 | 7 | ALU_F +NODE | cpha.D | 4102 | ? | 0 | 0 | cpha | NULL | NULL | cpha.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | cpha.CLKF | 5115 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | cpha.CLKF | 4105 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | cpha.RSTF | 5116 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | cpha.RSTF | 4106 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | cpha.CE | 5117 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | cpha.CE | 4107 | ? | 0 | 4096 | cpha | NULL | NULL | cpha.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cpha.Q | 5118 | ? | 0 | 0 | cpha | NULL | NULL | cpha.REG | 0 | 8 | SRFF_Q +NODE | cpha.Q | 4108 | ? | 0 | 0 | cpha | NULL | NULL | cpha.REG | 0 | 8 | SRFF_Q -INPUT_INSTANCE | 0 | 0 | NULL | N3463 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | N2897 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<4> | 5037 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<4> | 0 | 6 | OI_OUT +NODE | cpu_d<4> | 4057 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<4> | 0 | 6 | OI_OUT OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3463 | 5010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3463 | 0 | 5 | II_IMUX +NODE | N2897 | 4037 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2897 | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | frx | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | frx | 4951 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM +NODE | frx | 3980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3463 | 5010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3463 | 0 | 5 | II_IMUX +NODE | N2897 | 4037 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2897 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | frx | 4951 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM +NODE | frx | 3980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM SIGNAL_INSTANCE | frx.SI | frx | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | frx | 4951 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM +NODE | frx | 3980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3463 | 5010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3463 | 0 | 5 | II_IMUX +NODE | N2897 | 4037 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2897 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | frx.D1 | 5120 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | frx.D1 | 4110 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | frx.D2 | 5121 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | frx | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3463 -SPPTERM | 4 | IV_FALSE | frx | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3463 +SIGNAL | NODE | frx.D2 | 4111 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | frx | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2897 +SPPTERM | 4 | IV_FALSE | frx | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2897 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | frx.CLKF | 5122 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | frx.CLKF | 4112 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | frx.RSTF | 5123 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | frx.RSTF | 4113 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | frx.CE | 5124 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | frx.CE | 4114 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | frx.REG | frx | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | frx.D | 5119 | ? | 0 | 0 | frx | NULL | NULL | frx.XOR | 0 | 7 | ALU_F +NODE | frx.D | 4109 | ? | 0 | 0 | frx | NULL | NULL | frx.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | frx.CLKF | 5122 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | frx.CLKF | 4112 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | frx.RSTF | 5123 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | frx.RSTF | 4113 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | frx.CE | 5124 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | frx.CE | 4114 | ? | 0 | 4096 | frx | NULL | NULL | frx.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | frx.Q | 5125 | ? | 0 | 0 | frx | NULL | NULL | frx.REG | 0 | 8 | SRFF_Q +NODE | frx.Q | 4115 | ? | 0 | 0 | frx | NULL | NULL | frx.REG | 0 | 8 | SRFF_Q -INPUT_INSTANCE | 0 | 0 | NULL | N3467 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | N2901 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<6> | 5039 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<6> | 0 | 6 | OI_OUT +NODE | cpu_d<6> | 4052 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<6> | 0 | 6 | OI_OUT OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX +NODE | N2901 | 4038 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2901 | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | ier | spi6502b_COPY_0_COPY_0 | 2424312832 | 13 | 2 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | ier | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM +NODE | ier | 3981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX +NODE | N2901 | 4038 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2901 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1>.EXP | 5430 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.EXP | slaveinten<1> | 4 | 0 | MC_EXPORT +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | ier.EXP | 5431 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.EXP | ier | 4 | 0 | MC_EXPORT +NODE | ier | 3981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | ier.SI | ier | 0 | 13 | 6 +SIGNAL_INSTANCE | ier.SI | ier | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM +NODE | ier | 3981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX +NODE | N2901 | 4038 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2901 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1>.EXP | 5430 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.EXP | slaveinten<1> | 4 | 0 | MC_EXPORT +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | ier.D1 | 5127 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | ier.D1 | 4117 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | ier.D2 | 5128 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | slaveinten<1>.EXP -SPPTERM | 4 | IV_FALSE | ier | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3467 +SIGNAL | NODE | ier.D2 | 4118 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | ier | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2901 +SPPTERM | 4 | IV_FALSE | ier | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2901 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | ier.CLKF | 5129 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | ier.CLKF | 4119 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | ier.RSTF | 5130 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | ier.RSTF | 4120 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | ier.EXP | 5427 | ? | 0 | 0 | ier | NULL | NULL | ier.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 5 | IV_TRUE | cpu_Nres_IBUF | IV_TRUE | cpha | IV_FALSE | shiftcnt<0> | IV_FALSE | shiftdone | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | ier.CE | 5131 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | ier.CE | 4121 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | ier.REG | ier | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | ier.D | 5126 | ? | 0 | 0 | ier | NULL | NULL | ier.XOR | 0 | 7 | ALU_F +NODE | ier.D | 4116 | ? | 0 | 0 | ier | NULL | NULL | ier.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | ier.CLKF | 5129 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | ier.CLKF | 4119 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | ier.RSTF | 5130 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | ier.RSTF | 4120 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | ier.CE | 5131 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | ier.CE | 4121 | ? | 0 | 4096 | ier | NULL | NULL | ier.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | ier.Q | 5132 | ? | 0 | 0 | ier | NULL | NULL | ier.REG | 0 | 8 | SRFF_Q +NODE | ier.Q | 4122 | ? | 0 | 0 | ier | NULL | NULL | ier.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slaveinten<0> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slaveinten | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<0> | 4953 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<0>.Q | slaveinten<0> | 1 | 0 | MC_UIM +NODE | slaveinten | 3982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten.Q | slaveinten | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3463 | 5010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3463 | 0 | 5 | II_IMUX +NODE | N2897 | 4037 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2897 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slaveinten<0> | 4953 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<0>.Q | slaveinten<0> | 1 | 0 | MC_UIM +NODE | slaveinten | 3982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten.Q | slaveinten | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | slaveinten<0>.SI | slaveinten<0> | 0 | 8 | 5 +SIGNAL_INSTANCE | slaveinten.SI | slaveinten | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<0> | 4953 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<0>.Q | slaveinten<0> | 1 | 0 | MC_UIM +NODE | slaveinten | 3982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten.Q | slaveinten | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3463 | 5010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3463 | 0 | 5 | II_IMUX +NODE | N2897 | 4037 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2897 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slaveinten<0>.D1 | 5134 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | slaveinten.D1 | 4124 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slaveinten<0>.D2 | 5135 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | slaveinten<0> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3463 -SPPTERM | 4 | IV_FALSE | slaveinten<0> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3463 +SIGNAL | NODE | slaveinten.D2 | 4125 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | slaveinten | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2897 +SPPTERM | 4 | IV_FALSE | slaveinten | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2897 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slaveinten<0>.CLKF | 5136 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | slaveinten.CLKF | 4126 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | slaveinten<0>.RSTF | 5137 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | slaveinten.RSTF | 4127 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slaveinten<0>.CE | 5138 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | slaveinten.CE | 4128 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -SRFF_INSTANCE | slaveinten<0>.REG | slaveinten<0> | 0 | 4 | 1 +SRFF_INSTANCE | slaveinten.REG | slaveinten | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slaveinten<0>.D | 5133 | ? | 0 | 0 | slaveinten<0> | NULL | NULL | slaveinten<0>.XOR | 0 | 7 | ALU_F +NODE | slaveinten.D | 4123 | ? | 0 | 0 | slaveinten | NULL | NULL | slaveinten.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slaveinten<0>.CLKF | 5136 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | slaveinten.CLKF | 4126 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | slaveinten<0>.RSTF | 5137 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | slaveinten.RSTF | 4127 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slaveinten<0>.CE | 5138 | ? | 0 | 4096 | slaveinten<0> | NULL | NULL | slaveinten<0>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | slaveinten.CE | 4128 | ? | 0 | 4096 | slaveinten | NULL | NULL | slaveinten.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slaveinten<0>.Q | 5139 | ? | 0 | 0 | slaveinten<0> | NULL | NULL | slaveinten<0>.REG | 0 | 8 | SRFF_Q +NODE | slaveinten.Q | 4129 | ? | 0 | 0 | slaveinten | NULL | NULL | slaveinten.REG | 0 | 8 | SRFF_Q -INPUT_INSTANCE | 0 | 0 | NULL | N3465 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | N2895 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<5> | 5038 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<5> | 0 | 6 | OI_OUT +NODE | cpu_d<3> | 4050 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<3> | 0 | 6 | OI_OUT OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3465 | 5013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3465 | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slaveinten<1> | spi6502b_COPY_0_COPY_0 | 2424312832 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3465 | 5013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3465 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | diag_OBUF.EXP | 5429 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | diag_OBUF.EXP | diag_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | slaveinten<1>.EXP | 5430 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.EXP | slaveinten<1> | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | slaveinten<1>.SI | slaveinten<1> | 0 | 11 | 6 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3465 | 5013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3465 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | diag_OBUF.EXP | 5429 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | diag_OBUF.EXP | diag_OBUF | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slaveinten<1>.D1 | 5141 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slaveinten<1>.D2 | 5142 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | diag_OBUF.EXP -SPPTERM | 4 | IV_FALSE | slaveinten<1> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3465 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slaveinten<1>.CLKF | 5143 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | slaveinten<1>.RSTF | 5144 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | slaveinten<1>.EXP | 5426 | ? | 0 | 0 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_TRUE | ier | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3467 -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slaveinten<1>.CE | 5145 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | slaveinten<1>.REG | slaveinten<1> | 0 | 4 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slaveinten<1>.D | 5140 | ? | 0 | 0 | slaveinten<1> | NULL | NULL | slaveinten<1>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slaveinten<1>.CLKF | 5143 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | slaveinten<1>.RSTF | 5144 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slaveinten<1>.CE | 5145 | ? | 0 | 4096 | slaveinten<1> | NULL | NULL | slaveinten<1>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slaveinten<1>.Q | 5146 | ? | 0 | 0 | slaveinten<1> | NULL | NULL | slaveinten<1>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slaveinten<2> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<2> | 4955 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<2>.Q | slaveinten<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slaveinten<2> | 4955 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<2>.Q | slaveinten<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | slaveinten<2>.SI | slaveinten<2> | 0 | 8 | 5 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<2> | 4955 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<2>.Q | slaveinten<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slaveinten<2>.D1 | 5148 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slaveinten<2>.D2 | 5149 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | slaveinten<2> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3467 -SPPTERM | 4 | IV_FALSE | slaveinten<2> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3467 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slaveinten<2>.CLKF | 5150 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | slaveinten<2>.RSTF | 5151 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slaveinten<2>.CE | 5152 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | slaveinten<2>.REG | slaveinten<2> | 0 | 4 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slaveinten<2>.D | 5147 | ? | 0 | 0 | slaveinten<2> | NULL | NULL | slaveinten<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slaveinten<2>.CLKF | 5150 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | slaveinten<2>.RSTF | 5151 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slaveinten<2>.CE | 5152 | ? | 0 | 4096 | slaveinten<2> | NULL | NULL | slaveinten<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slaveinten<2>.Q | 5153 | ? | 0 | 0 | slaveinten<2> | NULL | NULL | slaveinten<2>.REG | 0 | 8 | SRFF_Q - -INPUT_INSTANCE | 0 | 0 | NULL | N3469 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_d<7> | 5040 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<7> | 0 | 6 | OI_OUT -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | N3469 | 5012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3469 | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | slaveinten<3> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<3> | 4956 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<3>.Q | slaveinten<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3469 | 5012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3469 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | slaveinten<3> | 4956 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<3>.Q | slaveinten<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | slaveinten<3>.SI | slaveinten<3> | 0 | 8 | 5 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<3> | 4956 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<3>.Q | slaveinten<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3469 | 5012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3469 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | slaveinten<3>.D1 | 5155 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | slaveinten<3>.D2 | 5156 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | slaveinten<3> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3469 -SPPTERM | 4 | IV_FALSE | slaveinten<3> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3469 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | slaveinten<3>.CLKF | 5157 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | slaveinten<3>.RSTF | 5158 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | slaveinten<3>.CE | 5159 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | slaveinten<3>.REG | slaveinten<3> | 0 | 4 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | slaveinten<3>.D | 5154 | ? | 0 | 0 | slaveinten<3> | NULL | NULL | slaveinten<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | slaveinten<3>.CLKF | 5157 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | slaveinten<3>.RSTF | 5158 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | slaveinten<3>.CE | 5159 | ? | 0 | 4096 | slaveinten<3> | NULL | NULL | slaveinten<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | slaveinten<3>.Q | 5160 | ? | 0 | 0 | slaveinten<3> | NULL | NULL | slaveinten<3>.REG | 0 | 8 | SRFF_Q +NODE | N2895 | 4036 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2895 | 0 | 5 | II_IMUX MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | tmo | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tmo | 4957 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM +NODE | tmo | 3983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3461 | 5009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3461 | 0 | 5 | II_IMUX +NODE | N2895 | 4036 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2895 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | tmo | 4957 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM +NODE | tmo | 3983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM SIGNAL_INSTANCE | tmo.SI | tmo | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tmo | 4957 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM +NODE | tmo | 3983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3461 | 5009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3461 | 0 | 5 | II_IMUX +NODE | N2895 | 4036 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2895 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | tmo.D1 | 5162 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | tmo.D1 | 4131 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | tmo.D2 | 5163 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | tmo | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3461 -SPPTERM | 4 | IV_FALSE | tmo | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N3461 +SIGNAL | NODE | tmo.D2 | 4132 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | tmo | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N2895 +SPPTERM | 4 | IV_FALSE | tmo | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | N2895 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | tmo.CLKF | 5164 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | tmo.CLKF | 4133 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | tmo.RSTF | 5165 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | tmo.RSTF | 4134 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | tmo.CE | 5166 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | tmo.CE | 4135 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | tmo.REG | tmo | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | tmo.D | 5161 | ? | 0 | 0 | tmo | NULL | NULL | tmo.XOR | 0 | 7 | ALU_F +NODE | tmo.D | 4130 | ? | 0 | 0 | tmo | NULL | NULL | tmo.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | tmo.CLKF | 5164 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | tmo.CLKF | 4133 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | tmo.RSTF | 5165 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | tmo.RSTF | 4134 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | tmo.CE | 5166 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | tmo.CE | 4135 | ? | 0 | 4096 | tmo | NULL | NULL | tmo.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | tmo.Q | 5167 | ? | 0 | 0 | tmo | NULL | NULL | tmo.REG | 0 | 8 | SRFF_Q +NODE | tmo.Q | 4136 | ? | 0 | 0 | tmo | NULL | NULL | tmo.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | divisor<0> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<0> | 4958 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM +NODE | divisor<0> | 3984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | divisor<0> | 4958 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM +NODE | divisor<0> | 3984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | divisor<0>.SI | divisor<0> | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<0> | 4958 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM +NODE | divisor<0> | 3984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | divisor<0>.D1 | 5169 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | divisor<0>.D1 | 4138 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | divisor<0>.D2 | 5170 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | divisor<0> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3455 -SPPTERM | 4 | IV_FALSE | divisor<0> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3455 +SIGNAL | NODE | divisor<0>.D2 | 4139 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | divisor<0> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2889 +SPPTERM | 4 | IV_FALSE | divisor<0> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2889 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | divisor<0>.CLKF | 5171 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | divisor<0>.CLKF | 4140 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | divisor<0>.RSTF | 5172 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | divisor<0>.RSTF | 4141 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | divisor<0>.CE | 5173 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | divisor<0>.CE | 4142 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | divisor<0>.REG | divisor<0> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | divisor<0>.D | 5168 | ? | 0 | 0 | divisor<0> | NULL | NULL | divisor<0>.XOR | 0 | 7 | ALU_F +NODE | divisor<0>.D | 4137 | ? | 0 | 0 | divisor<0> | NULL | NULL | divisor<0>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | divisor<0>.CLKF | 5171 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | divisor<0>.CLKF | 4140 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | divisor<0>.RSTF | 5172 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | divisor<0>.RSTF | 4141 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | divisor<0>.CE | 5173 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | divisor<0>.CE | 4142 | ? | 0 | 4096 | divisor<0> | NULL | NULL | divisor<0>.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | divisor<0>.Q | 5174 | ? | 0 | 0 | divisor<0> | NULL | NULL | divisor<0>.REG | 0 | 8 | SRFF_Q +NODE | divisor<0>.Q | 4143 | ? | 0 | 0 | divisor<0> | NULL | NULL | divisor<0>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | divisor<1> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<1> | 4959 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM +NODE | divisor<1> | 3985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX +NODE | N2891 | 4034 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2891 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | divisor<1> | 4959 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM +NODE | divisor<1> | 3985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | divisor<1>.SI | divisor<1> | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<1> | 4959 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM +NODE | divisor<1> | 3985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX +NODE | N2891 | 4034 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2891 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | divisor<1>.D1 | 5176 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | divisor<1>.D1 | 4145 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | divisor<1>.D2 | 5177 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | divisor<1> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3457 -SPPTERM | 4 | IV_FALSE | divisor<1> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3457 +SIGNAL | NODE | divisor<1>.D2 | 4146 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | divisor<1> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2891 +SPPTERM | 4 | IV_FALSE | divisor<1> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2891 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | divisor<1>.CLKF | 5178 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | divisor<1>.CLKF | 4147 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | divisor<1>.RSTF | 5179 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | divisor<1>.RSTF | 4148 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | divisor<1>.CE | 5180 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | divisor<1>.CE | 4149 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | divisor<1>.REG | divisor<1> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | divisor<1>.D | 5175 | ? | 0 | 0 | divisor<1> | NULL | NULL | divisor<1>.XOR | 0 | 7 | ALU_F +NODE | divisor<1>.D | 4144 | ? | 0 | 0 | divisor<1> | NULL | NULL | divisor<1>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | divisor<1>.CLKF | 5178 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | divisor<1>.CLKF | 4147 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | divisor<1>.RSTF | 5179 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | divisor<1>.RSTF | 4148 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | divisor<1>.CE | 5180 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | divisor<1>.CE | 4149 | ? | 0 | 4096 | divisor<1> | NULL | NULL | divisor<1>.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | divisor<1>.Q | 5181 | ? | 0 | 0 | divisor<1> | NULL | NULL | divisor<1>.REG | 0 | 8 | SRFF_Q +NODE | divisor<1>.Q | 4150 | ? | 0 | 0 | divisor<1> | NULL | NULL | divisor<1>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | divisor<2> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<2> | 4960 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM +NODE | divisor<2> | 3986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX +NODE | N2893 | 4035 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2893 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | divisor<2> | 4960 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM +NODE | divisor<2> | 3986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | divisor<2>.SI | divisor<2> | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<2> | 4960 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM +NODE | divisor<2> | 3986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX +NODE | N2893 | 4035 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2893 | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | divisor<2>.D1 | 5183 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | divisor<2>.D1 | 4152 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | divisor<2>.D2 | 5184 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | divisor<2> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3459 -SPPTERM | 4 | IV_FALSE | divisor<2> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3459 +SIGNAL | NODE | divisor<2>.D2 | 4153 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | divisor<2> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2893 +SPPTERM | 4 | IV_FALSE | divisor<2> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2893 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | divisor<2>.CLKF | 5185 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | divisor<2>.CLKF | 4154 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | divisor<2>.RSTF | 5186 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | divisor<2>.RSTF | 4155 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | divisor<2>.CE | 5187 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | divisor<2>.CE | 4156 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF SRFF_INSTANCE | divisor<2>.REG | divisor<2> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | divisor<2>.D | 5182 | ? | 0 | 0 | divisor<2> | NULL | NULL | divisor<2>.XOR | 0 | 7 | ALU_F +NODE | divisor<2>.D | 4151 | ? | 0 | 0 | divisor<2> | NULL | NULL | divisor<2>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | divisor<2>.CLKF | 5185 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | divisor<2>.CLKF | 4154 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | divisor<2>.RSTF | 5186 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | divisor<2>.RSTF | 4155 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | divisor<2>.CE | 5187 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | divisor<2>.CE | 4156 | ? | 0 | 4096 | divisor<2> | NULL | NULL | divisor<2>.SI | 10 | 9 | MC_SI_CE SPPTERM | 1 | IV_FALSE | cpu_rnw_IBUF OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | divisor<2>.Q | 5188 | ? | 0 | 0 | divisor<2> | NULL | NULL | divisor<2>.REG | 0 | 8 | SRFF_Q +NODE | divisor<2>.Q | 4157 | ? | 0 | 0 | divisor<2> | NULL | NULL | divisor<2>.REG | 0 | 8 | SRFF_Q -INPUT_INSTANCE | 0 | 0 | NULL | spi_miso_3_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_INSTANCE | 0 | 0 | NULL | spi_miso_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_miso<3> | 5058 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | spi_miso | 4065 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_miso_3_IBUF | 5020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_3_IBUF | 0 | 5 | II_IMUX +NODE | spi_miso_IBUF | 3987 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_IBUF | 0 | 5 | II_IMUX -INPUT_INSTANCE | 0 | 0 | NULL | spi_miso_2_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_miso<2> | 5057 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_miso_2_IBUF | 5019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_2_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | spi_miso_1_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_miso<1> | 5056 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_miso_1_IBUF | 5018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_1_IBUF | 0 | 5 | II_IMUX - -INPUT_INSTANCE | 0 | 0 | NULL | spi_miso_0_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_miso<0> | 5059 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_miso_0_IBUF | 5021 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_0_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<0> | spi6502b_COPY_0_COPY_0 | 2155873280 | 9 | 1 +MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<0> | spi6502b_COPY_0_COPY_0 | 2155873280 | 6 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<3> | 4947 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 1 | 0 | MC_UIM +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_3_IBUF | 5020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_3_IBUF | 0 | 5 | II_IMUX +NODE | spi_miso_IBUF | 3987 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<2> | 4945 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_2_IBUF | 5019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tc.EXP | 5428 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.EXP | tc | 4 | 0 | MC_EXPORT +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<0> | 4961 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM +NODE | spidatain<0> | 3988 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | spidatain<0>.SI | spidatain<0> | 0 | 9 | 5 +SIGNAL_INSTANCE | spidatain<0>.SI | spidatain<0> | 0 | 6 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<3> | 4947 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 1 | 0 | MC_UIM +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_3_IBUF | 5020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_3_IBUF | 0 | 5 | II_IMUX +NODE | spi_miso_IBUF | 3987 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<2> | 4945 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_2_IBUF | 5019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tc.EXP | 5428 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.EXP | tc | 4 | 0 | MC_EXPORT +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<0>.D1 | 5190 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<0>.D1 | 4159 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<0>.D2 | 5191 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | tc.EXP -SPPTERM | 2 | IV_FALSE | slavesel<2> | IV_TRUE | spi_miso_2_IBUF -SPPTERM | 2 | IV_FALSE | slavesel<3> | IV_TRUE | spi_miso_3_IBUF +SIGNAL | NODE | spidatain<0>.D2 | 4160 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | slavesel | IV_TRUE | spi_miso_IBUF OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<0>.CLKF | 5192 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<0>.CLKF | 4161 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<0>.RSTF | 5193 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<0>.RSTF | 4162 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<0>.CE | 5194 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<0>.CE | 4163 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<0>.REG | spidatain<0> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<0>.D | 5189 | ? | 0 | 0 | spidatain<0> | NULL | NULL | spidatain<0>.XOR | 0 | 7 | ALU_F +NODE | spidatain<0>.D | 4158 | ? | 0 | 0 | spidatain<0> | NULL | NULL | spidatain<0>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<0>.CLKF | 5192 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<0>.CLKF | 4161 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<0>.RSTF | 5193 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<0>.RSTF | 4162 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<0>.CE | 5194 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<0>.CE | 4163 | ? | 0 | 4096 | spidatain<0> | NULL | NULL | spidatain<0>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<0>.Q | 5195 | ? | 0 | 0 | spidatain<0> | NULL | NULL | spidatain<0>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<0>.Q | 4164 | ? | 0 | 0 | spidatain<0> | NULL | NULL | spidatain<0>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<1> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<0> | 4961 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM +NODE | spidatain<0> | 3988 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<1> | 4962 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM +NODE | spidatain<1> | 3989 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | spidatain<1>.SI | spidatain<1> | 0 | 5 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<0> | 4961 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM +NODE | spidatain<0> | 3988 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<1>.D1 | 5197 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<1>.D1 | 4166 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<1>.D2 | 5198 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidatain<1>.D2 | 4167 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | spidatain<0> OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<1>.CLKF | 5199 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<1>.CLKF | 4168 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<1>.RSTF | 5200 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<1>.RSTF | 4169 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<1>.CE | 5201 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<1>.CE | 4170 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<1>.REG | spidatain<1> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<1>.D | 5196 | ? | 0 | 0 | spidatain<1> | NULL | NULL | spidatain<1>.XOR | 0 | 7 | ALU_F +NODE | spidatain<1>.D | 4165 | ? | 0 | 0 | spidatain<1> | NULL | NULL | spidatain<1>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<1>.CLKF | 5199 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<1>.CLKF | 4168 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<1>.RSTF | 5200 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<1>.RSTF | 4169 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<1>.CE | 5201 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<1>.CE | 4170 | ? | 0 | 4096 | spidatain<1> | NULL | NULL | spidatain<1>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<1>.Q | 5202 | ? | 0 | 0 | spidatain<1> | NULL | NULL | spidatain<1>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<1>.Q | 4171 | ? | 0 | 0 | spidatain<1> | NULL | NULL | spidatain<1>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<2> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<1> | 4962 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM +NODE | spidatain<1> | 3989 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<2> | 4963 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM +NODE | spidatain<2> | 3990 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | spidatain<2>.SI | spidatain<2> | 0 | 5 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<1> | 4962 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM +NODE | spidatain<1> | 3989 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<2>.D1 | 5204 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<2>.D1 | 4173 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<2>.D2 | 5205 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidatain<2>.D2 | 4174 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | spidatain<1> OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<2>.CLKF | 5206 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<2>.CLKF | 4175 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<2>.RSTF | 5207 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<2>.RSTF | 4176 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<2>.CE | 5208 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<2>.CE | 4177 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<2>.REG | spidatain<2> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<2>.D | 5203 | ? | 0 | 0 | spidatain<2> | NULL | NULL | spidatain<2>.XOR | 0 | 7 | ALU_F +NODE | spidatain<2>.D | 4172 | ? | 0 | 0 | spidatain<2> | NULL | NULL | spidatain<2>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<2>.CLKF | 5206 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<2>.CLKF | 4175 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<2>.RSTF | 5207 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<2>.RSTF | 4176 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<2>.CE | 5208 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<2>.CE | 4177 | ? | 0 | 4096 | spidatain<2> | NULL | NULL | spidatain<2>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<2>.Q | 5209 | ? | 0 | 0 | spidatain<2> | NULL | NULL | spidatain<2>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<2>.Q | 4178 | ? | 0 | 0 | spidatain<2> | NULL | NULL | spidatain<2>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<3> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<2> | 4963 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM +NODE | spidatain<2> | 3990 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<3> | 4964 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM +NODE | spidatain<3> | 3991 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | spidatain<3>.SI | spidatain<3> | 0 | 5 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<2> | 4963 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM +NODE | spidatain<2> | 3990 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<3>.D1 | 5211 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<3>.D1 | 4180 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<3>.D2 | 5212 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidatain<3>.D2 | 4181 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | spidatain<2> OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<3>.CLKF | 5213 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<3>.CLKF | 4182 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<3>.RSTF | 5214 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<3>.RSTF | 4183 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<3>.CE | 5215 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<3>.CE | 4184 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<3>.REG | spidatain<3> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<3>.D | 5210 | ? | 0 | 0 | spidatain<3> | NULL | NULL | spidatain<3>.XOR | 0 | 7 | ALU_F +NODE | spidatain<3>.D | 4179 | ? | 0 | 0 | spidatain<3> | NULL | NULL | spidatain<3>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<3>.CLKF | 5213 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<3>.CLKF | 4182 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<3>.RSTF | 5214 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<3>.RSTF | 4183 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<3>.CE | 5215 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<3>.CE | 4184 | ? | 0 | 4096 | spidatain<3> | NULL | NULL | spidatain<3>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<3>.Q | 5216 | ? | 0 | 0 | spidatain<3> | NULL | NULL | spidatain<3>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<3>.Q | 4185 | ? | 0 | 0 | spidatain<3> | NULL | NULL | spidatain<3>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<4> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<3> | 4964 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM +NODE | spidatain<3> | 3991 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<4> | 4965 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM +NODE | spidatain<4> | 3992 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | spidatain<4>.SI | spidatain<4> | 0 | 5 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<3> | 4964 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM +NODE | spidatain<3> | 3991 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<4>.D1 | 5218 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<4>.D1 | 4187 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<4>.D2 | 5219 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidatain<4>.D2 | 4188 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | spidatain<3> OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<4>.CLKF | 5220 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<4>.CLKF | 4189 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<4>.RSTF | 5221 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<4>.RSTF | 4190 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<4>.CE | 5222 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<4>.CE | 4191 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<4>.REG | spidatain<4> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<4>.D | 5217 | ? | 0 | 0 | spidatain<4> | NULL | NULL | spidatain<4>.XOR | 0 | 7 | ALU_F +NODE | spidatain<4>.D | 4186 | ? | 0 | 0 | spidatain<4> | NULL | NULL | spidatain<4>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<4>.CLKF | 5220 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<4>.CLKF | 4189 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<4>.RSTF | 5221 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<4>.RSTF | 4190 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<4>.CE | 5222 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<4>.CE | 4191 | ? | 0 | 4096 | spidatain<4> | NULL | NULL | spidatain<4>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<4>.Q | 5223 | ? | 0 | 0 | spidatain<4> | NULL | NULL | spidatain<4>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<4>.Q | 4192 | ? | 0 | 0 | spidatain<4> | NULL | NULL | spidatain<4>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<5> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<4> | 4965 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM +NODE | spidatain<4> | 3992 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<5> | 4966 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM +NODE | spidatain<5> | 3993 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | spidatain<5>.SI | spidatain<5> | 0 | 5 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<4> | 4965 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM +NODE | spidatain<4> | 3992 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<5>.D1 | 5225 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<5>.D1 | 4194 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<5>.D2 | 5226 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidatain<5>.D2 | 4195 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | spidatain<4> OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<5>.CLKF | 5227 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<5>.CLKF | 4196 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<5>.RSTF | 5228 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<5>.RSTF | 4197 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<5>.CE | 5229 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<5>.CE | 4198 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<5>.REG | spidatain<5> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<5>.D | 5224 | ? | 0 | 0 | spidatain<5> | NULL | NULL | spidatain<5>.XOR | 0 | 7 | ALU_F +NODE | spidatain<5>.D | 4193 | ? | 0 | 0 | spidatain<5> | NULL | NULL | spidatain<5>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<5>.CLKF | 5227 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<5>.CLKF | 4196 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<5>.RSTF | 5228 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<5>.RSTF | 4197 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<5>.CE | 5229 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<5>.CE | 4198 | ? | 0 | 4096 | spidatain<5> | NULL | NULL | spidatain<5>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<5>.Q | 5230 | ? | 0 | 0 | spidatain<5> | NULL | NULL | spidatain<5>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<5>.Q | 4199 | ? | 0 | 0 | spidatain<5> | NULL | NULL | spidatain<5>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<6> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<5> | 4966 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM +NODE | spidatain<5> | 3993 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<6> | 4967 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM +NODE | spidatain<6> | 3994 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | spidatain<6>.SI | spidatain<6> | 0 | 5 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<5> | 4966 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM +NODE | spidatain<5> | 3993 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<6>.D1 | 5232 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<6>.D1 | 4201 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<6>.D2 | 5233 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidatain<6>.D2 | 4202 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | spidatain<5> OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<6>.CLKF | 5234 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<6>.CLKF | 4203 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<6>.RSTF | 5235 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<6>.RSTF | 4204 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<6>.CE | 5236 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<6>.CE | 4205 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<6>.REG | spidatain<6> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<6>.D | 5231 | ? | 0 | 0 | spidatain<6> | NULL | NULL | spidatain<6>.XOR | 0 | 7 | ALU_F +NODE | spidatain<6>.D | 4200 | ? | 0 | 0 | spidatain<6> | NULL | NULL | spidatain<6>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<6>.CLKF | 5234 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<6>.CLKF | 4203 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<6>.RSTF | 5235 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<6>.RSTF | 4204 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<6>.CE | 5236 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<6>.CE | 4205 | ? | 0 | 4096 | spidatain<6> | NULL | NULL | spidatain<6>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<6>.Q | 5237 | ? | 0 | 0 | spidatain<6> | NULL | NULL | spidatain<6>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<6>.Q | 4206 | ? | 0 | 0 | spidatain<6> | NULL | NULL | spidatain<6>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | spidatain<7> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<6> | 4967 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM +NODE | spidatain<6> | 3994 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidatain<7> | 4968 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<7>.Q | spidatain<7> | 1 | 0 | MC_UIM +NODE | spidatain<7> | 3995 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<7>.Q | spidatain<7> | 1 | 0 | MC_UIM SIGNAL_INSTANCE | spidatain<7>.SI | spidatain<7> | 0 | 5 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<6> | 4967 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM +NODE | spidatain<6> | 3994 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidatain<7>.D1 | 5239 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidatain<7>.D1 | 4208 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidatain<7>.D2 | 5240 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidatain<7>.D2 | 4209 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 2 | 9 | MC_SI_D2 SPPTERM | 1 | IV_TRUE | spidatain<6> OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidatain<7>.CLKF | 5241 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<7>.CLKF | 4210 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | spidatain<7>.RSTF | 5242 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<7>.RSTF | 4211 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidatain<7>.CE | 5243 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<7>.CE | 4212 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 SRFF_INSTANCE | spidatain<7>.REG | spidatain<7> | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidatain<7>.D | 5238 | ? | 0 | 0 | spidatain<7> | NULL | NULL | spidatain<7>.XOR | 0 | 7 | ALU_F +NODE | spidatain<7>.D | 4207 | ? | 0 | 0 | spidatain<7> | NULL | NULL | spidatain<7>.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidatain<7>.CLKF | 5241 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidatain<7>.CLKF | 4210 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | spidatain<7>.RSTF | 5242 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | spidatain<7>.RSTF | 4211 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidatain<7>.CE | 5243 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidatain<7>.CE | 4212 | ? | 0 | 4096 | spidatain<7> | NULL | NULL | spidatain<7>.SI | 10 | 9 | MC_SI_CE SPPTERM | 2 | IV_TRUE | shiftcnt<0> | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidatain<7>.Q | 5244 | ? | 0 | 0 | spidatain<7> | NULL | NULL | spidatain<7>.REG | 0 | 8 | SRFF_Q +NODE | spidatain<7>.Q | 4213 | ? | 0 | 0 | spidatain<7> | NULL | NULL | spidatain<7>.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | PrldLow+OptxMapped | int_sclk | spi6502b_COPY_0_COPY_0 | 2155873280 | 8 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpol | 4948 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM +NODE | cpol | 3977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier.EXP | 5431 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.EXP | ier | 4 | 0 | MC_EXPORT +NODE | EXP7_.EXP | 4392 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP7_.EXP | EXP7_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_sclk | 4969 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_sclk.Q | int_sclk | 0 | 0 | MC_Q +NODE | int_sclk | 3996 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_sclk.Q | int_sclk | 0 | 0 | MC_Q SIGNAL_INSTANCE | int_sclk.SI | int_sclk | 0 | 8 | 5 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpol | 4948 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM +NODE | cpol | 3977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier.EXP | 5431 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.EXP | ier | 4 | 0 | MC_EXPORT +NODE | EXP7_.EXP | 4392 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP7_.EXP | EXP7_ | 4 | 0 | MC_EXPORT OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_sclk.D1 | 5246 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_sclk.D1 | 4215 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 1 | 9 | MC_SI_D1 SPPTERM | 1 | IV_TRUE | cpol OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_sclk.D2 | 5247 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | ier.EXP +SIGNAL | NODE | int_sclk.D2 | 4216 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 1 | IV_TRUE | EXP7_.EXP SPPTERM | 5 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpha | IV_TRUE | shiftcnt<0> | IV_FALSE | shiftdone | IV_TRUE | shifting2 OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | int_sclk.CLKF | 5248 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | int_sclk.CLKF | 4217 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF -SIGNAL | NODE | int_sclk.SETF | 5249 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 5 | 9 | MC_SI_SETF +SIGNAL | NODE | int_sclk.SETF | 4218 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 5 | 9 | MC_SI_SETF SPPTERM | 2 | IV_FALSE | cpu_Nres_IBUF | IV_TRUE | cpol OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | int_sclk.RSTF | 5250 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | int_sclk.RSTF | 4219 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 2 | IV_FALSE | cpu_Nres_IBUF | IV_FALSE | cpol SRFF_INSTANCE | int_sclk.REG | int_sclk | 0 | 4 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_sclk.D | 5245 | ? | 0 | 0 | int_sclk | NULL | NULL | int_sclk.XOR | 0 | 7 | ALU_F +NODE | int_sclk.D | 4214 | ? | 0 | 0 | int_sclk | NULL | NULL | int_sclk.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | int_sclk.CLKF | 5248 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | int_sclk.CLKF | 4217 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM INPUT_NODE_TYPE | 2 | 8 | SRFF_S -SIGNAL | NODE | int_sclk.SETF | 5249 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 5 | 9 | MC_SI_SETF +SIGNAL | NODE | int_sclk.SETF | 4218 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 5 | 9 | MC_SI_SETF SPPTERM | 2 | IV_FALSE | cpu_Nres_IBUF | IV_TRUE | cpol INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | int_sclk.RSTF | 5250 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | int_sclk.RSTF | 4219 | ? | 0 | 4096 | int_sclk | NULL | NULL | int_sclk.SI | 6 | 9 | MC_SI_RSTF SPPTERM | 2 | IV_FALSE | cpu_Nres_IBUF | IV_FALSE | cpol OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_sclk.Q | 5251 | ? | 0 | 0 | int_sclk | NULL | NULL | int_sclk.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | shiftcnt<3> | spi6502b_COPY_0_COPY_0 | 2155877376 | 7 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | shiftcnt<3>.SI | shiftcnt<3> | 0 | 7 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | shiftcnt<3>.D1 | 5253 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | shiftcnt<3>.D2 | 5254 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | shiftcnt<3> | IV_FALSE | shifting2 -SPPTERM | 4 | IV_TRUE | shiftcnt<2> | IV_TRUE | shiftcnt<0> | IV_TRUE | shiftcnt<1> | IV_TRUE | shifting2 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | shiftcnt<3>.CLKF | 5255 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | shiftcnt<3>.RSTF | 5256 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF - -SRFF_INSTANCE | shiftcnt<3>.REG | shiftcnt<3> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | shiftcnt<3>.D | 5252 | ? | 0 | 0 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | shiftcnt<3>.CLKF | 5255 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | shiftcnt<3>.RSTF | 5256 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | shiftcnt<3>.Q | 5257 | ? | 0 | 0 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | shiftcnt<2> | spi6502b_COPY_0_COPY_0 | 2155877376 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | shiftcnt<2>.SI | shiftcnt<2> | 0 | 6 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | shiftcnt<2>.D1 | 5259 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | shiftcnt<2>.D2 | 5260 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_TRUE | shiftcnt<2> | IV_FALSE | shifting2 -SPPTERM | 3 | IV_TRUE | shiftcnt<0> | IV_TRUE | shiftcnt<1> | IV_TRUE | shifting2 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | shiftcnt<2>.CLKF | 5261 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | shiftcnt<2>.RSTF | 5262 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF - -SRFF_INSTANCE | shiftcnt<2>.REG | shiftcnt<2> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | shiftcnt<2>.D | 5258 | ? | 0 | 0 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | shiftcnt<2>.CLKF | 5261 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | shiftcnt<2>.RSTF | 5262 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | shiftcnt<2>.Q | 5263 | ? | 0 | 0 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped | shiftcnt<0> | spi6502b_COPY_0_COPY_0 | 2155873280 | 4 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | shiftcnt<0>.SI | shiftcnt<0> | 0 | 4 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | shiftcnt<0>.D1 | 5265 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | shiftcnt<0>.D2 | 5266 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 2 | IV_FALSE | shiftcnt<0> | IV_TRUE | shifting2 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | shiftcnt<0>.CLKF | 5267 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | shiftcnt<0>.RSTF | 5268 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF - -SRFF_INSTANCE | shiftcnt<0>.REG | shiftcnt<0> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | shiftcnt<0>.D | 5264 | ? | 0 | 0 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | shiftcnt<0>.CLKF | 5267 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | shiftcnt<0>.RSTF | 5268 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | shiftcnt<0>.Q | 5269 | ? | 0 | 0 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped | shiftcnt<1> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | shiftcnt<1>.SI | shiftcnt<1> | 0 | 5 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | shiftcnt<1>.D1 | 5271 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | shiftcnt<1>.D2 | 5272 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | shiftcnt<0> | IV_FALSE | shiftcnt<1> | IV_TRUE | shifting2 -SPPTERM | 3 | IV_FALSE | shiftcnt<0> | IV_TRUE | shiftcnt<1> | IV_TRUE | shifting2 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | shiftcnt<1>.CLKF | 5273 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | shiftcnt<1>.RSTF | 5274 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF - -SRFF_INSTANCE | shiftcnt<1>.REG | shiftcnt<1> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | shiftcnt<1>.D | 5270 | ? | 0 | 0 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | shiftcnt<1>.CLKF | 5273 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | shiftcnt<1>.RSTF | 5274 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | shiftcnt<1>.Q | 5275 | ? | 0 | 0 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped | shiftdone | spi6502b_COPY_0_COPY_0 | 2155873280 | 6 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | shiftdone.SI | shiftdone | 0 | 6 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<0> | 4972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | shiftdone.D1 | 5277 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | shiftdone.D2 | 5278 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | shiftcnt<3> | IV_TRUE | shiftcnt<2> | IV_TRUE | shiftcnt<0> | IV_TRUE | shiftcnt<1> -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | shiftdone.CLKF | 5279 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | shiftdone.RSTF | 5280 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF - -SRFF_INSTANCE | shiftdone.REG | shiftdone | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | shiftdone.D | 5276 | ? | 0 | 0 | shiftdone | NULL | NULL | shiftdone.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | shiftdone.CLKF | 5279 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | shiftdone.RSTF | 5280 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | shiftdone.Q | 5281 | ? | 0 | 0 | shiftdone | NULL | NULL | shiftdone.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | start_shifting | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | frx | 4951 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting/start_shifting_RSTF__$INT.UIM | 5044 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.Q | start_shifting/start_shifting_RSTF__$INT | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | start_shifting.SI | start_shifting | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | frx | 4951 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting/start_shifting_RSTF__$INT.UIM | 5044 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.Q | start_shifting/start_shifting_RSTF__$INT | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | start_shifting.D1 | 5283 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | start_shifting.D2 | 5284 | ? | 0 | 6144 | start_shifting | NULL | NULL | start_shifting.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_FALSE | cpu_rnw_IBUF | IV_FALSE | start_shifting | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF -SPPTERM | 4 | IV_TRUE | frx | IV_FALSE | start_shifting | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | start_shifting.CLKF | 5285 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF -SIGNAL | NODE | start_shifting.RSTF | 5286 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | start_shifting/start_shifting_RSTF__$INT.UIM - -SRFF_INSTANCE | start_shifting.REG | start_shifting | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | start_shifting.D | 5282 | ? | 0 | 0 | start_shifting | NULL | NULL | start_shifting.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | start_shifting.CLKF | 5285 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 3 | 8 | SRFF_R -SIGNAL | NODE | start_shifting.RSTF | 5286 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 6 | 9 | MC_SI_RSTF -SPPTERM | 1 | IV_FALSE | start_shifting/start_shifting_RSTF__$INT.UIM -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | start_shifting.Q | 5287 | ? | 0 | 0 | start_shifting | NULL | NULL | start_shifting.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | tc | spi6502b_COPY_0_COPY_0 | 2424308736 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_0_IBUF | 5021 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<1> | 4943 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_1_IBUF | 5018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | tc | 4976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | tc.EXP | 5428 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.EXP | tc | 4 | 0 | MC_EXPORT - -SIGNAL_INSTANCE | tc.SI | tc | 0 | 9 | 6 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_0_IBUF | 5021 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<1> | 4943 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_miso_1_IBUF | 5018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_miso_1_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | tc.D1 | 5289 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | tc.D2 | 5290 | ? | 0 | 6144 | tc | NULL | NULL | tc.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | tc.CLKF | 5291 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF -SIGNAL | NODE | tc.SETF | 5292 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_TRUE | shiftdone -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | tc.EXP | 5424 | ? | 0 | 0 | tc | NULL | NULL | tc.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 2 | IV_FALSE | slavesel<0> | IV_TRUE | spi_miso_0_IBUF -SPPTERM | 2 | IV_FALSE | slavesel<1> | IV_TRUE | spi_miso_1_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | tc.CE | 5293 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF - -SRFF_INSTANCE | tc.REG | tc | 0 | 4 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | tc.D | 5288 | ? | 0 | 0 | tc | NULL | NULL | tc.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | tc.CLKF | 5291 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 2 | 8 | SRFF_S -SIGNAL | NODE | tc.SETF | 5292 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 5 | 9 | MC_SI_SETF -SPPTERM | 1 | IV_TRUE | shiftdone -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | tc.CE | 5293 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | tc.Q | 5294 | ? | 0 | 0 | tc | NULL | NULL | tc.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<0> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<0> | 4977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<0> | 4977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<0>.SI | spidataout<0> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<0> | 4977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3455 | 5006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3455 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<0>.D1 | 5296 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<0>.D2 | 5297 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<0> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3455 -SPPTERM | 4 | IV_FALSE | spidataout<0> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3455 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<0>.CLKF | 5298 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<0>.CE | 5299 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<0>.REG | spidataout<0> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<0>.D | 5295 | ? | 0 | 0 | spidataout<0> | NULL | NULL | spidataout<0>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<0>.CLKF | 5298 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<0>.CE | 5299 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<0>.Q | 5300 | ? | 0 | 0 | spidataout<0> | NULL | NULL | spidataout<0>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<1> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<1> | 4978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<1> | 4978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<1>.SI | spidataout<1> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<1> | 4978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3457 | 5007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3457 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<1>.D1 | 5302 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<1>.D2 | 5303 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<1> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3457 -SPPTERM | 4 | IV_FALSE | spidataout<1> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3457 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<1>.CLKF | 5304 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<1>.CE | 5305 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<1>.REG | spidataout<1> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<1>.D | 5301 | ? | 0 | 0 | spidataout<1> | NULL | NULL | spidataout<1>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<1>.CLKF | 5304 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<1>.CE | 5305 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<1>.Q | 5306 | ? | 0 | 0 | spidataout<1> | NULL | NULL | spidataout<1>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<2> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<2> | 4979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<2> | 4979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<2>.SI | spidataout<2> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<2> | 4979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3459 | 5008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3459 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<2>.D1 | 5308 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<2>.D2 | 5309 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<2> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3459 -SPPTERM | 4 | IV_FALSE | spidataout<2> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3459 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<2>.CLKF | 5310 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<2>.CE | 5311 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<2>.REG | spidataout<2> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<2>.D | 5307 | ? | 0 | 0 | spidataout<2> | NULL | NULL | spidataout<2>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<2>.CLKF | 5310 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<2>.CE | 5311 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<2>.Q | 5312 | ? | 0 | 0 | spidataout<2> | NULL | NULL | spidataout<2>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<3> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<3> | 4980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3461 | 5009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3461 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<3> | 4980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<3>.SI | spidataout<3> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<3> | 4980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3461 | 5009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3461 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<3>.D1 | 5314 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<3>.D2 | 5315 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<3> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3461 -SPPTERM | 4 | IV_FALSE | spidataout<3> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3461 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<3>.CLKF | 5316 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<3>.CE | 5317 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<3>.REG | spidataout<3> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<3>.D | 5313 | ? | 0 | 0 | spidataout<3> | NULL | NULL | spidataout<3>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<3>.CLKF | 5316 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<3>.CE | 5317 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<3>.Q | 5318 | ? | 0 | 0 | spidataout<3> | NULL | NULL | spidataout<3>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<4> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<4> | 4981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3463 | 5010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3463 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<4> | 4981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<4>.SI | spidataout<4> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<4> | 4981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3463 | 5010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3463 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<4>.D1 | 5320 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<4>.D2 | 5321 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<4> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3463 -SPPTERM | 4 | IV_FALSE | spidataout<4> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3463 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<4>.CLKF | 5322 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<4>.CE | 5323 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<4>.REG | spidataout<4> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<4>.D | 5319 | ? | 0 | 0 | spidataout<4> | NULL | NULL | spidataout<4>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<4>.CLKF | 5322 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<4>.CE | 5323 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<4>.Q | 5324 | ? | 0 | 0 | spidataout<4> | NULL | NULL | spidataout<4>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<5> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<5> | 4982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3465 | 5013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3465 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<5> | 4982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<5>.SI | spidataout<5> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<5> | 4982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3465 | 5013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3465 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<5>.D1 | 5326 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<5>.D2 | 5327 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<5> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3465 -SPPTERM | 4 | IV_FALSE | spidataout<5> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3465 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<5>.CLKF | 5328 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<5>.CE | 5329 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<5>.REG | spidataout<5> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<5>.D | 5325 | ? | 0 | 0 | spidataout<5> | NULL | NULL | spidataout<5>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<5>.CLKF | 5328 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<5>.CE | 5329 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<5>.Q | 5330 | ? | 0 | 0 | spidataout<5> | NULL | NULL | spidataout<5>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<6> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<6> | 4983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<6> | 4983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<6>.SI | spidataout<6> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<6> | 4983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3467 | 5011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3467 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<6>.D1 | 5332 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<6>.D2 | 5333 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<6> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3467 -SPPTERM | 4 | IV_FALSE | spidataout<6> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3467 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<6>.CLKF | 5334 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<6>.CE | 5335 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<6>.REG | spidataout<6> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<6>.D | 5331 | ? | 0 | 0 | spidataout<6> | NULL | NULL | spidataout<6>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<6>.CLKF | 5334 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<6>.CE | 5335 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<6>.Q | 5336 | ? | 0 | 0 | spidataout<6> | NULL | NULL | spidataout<6>.REG | 0 | 8 | SRFF_Q - -MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<7> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<7> | 4984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3469 | 5012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3469 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | spidataout<7> | 4984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM - -SIGNAL_INSTANCE | spidataout<7>.SI | spidataout<7> | 0 | 8 | 4 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<7> | 4984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3469 | 5012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3469 | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | spidataout<7>.D1 | 5338 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | spidataout<7>.D2 | 5339 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 4 | IV_TRUE | spidataout<7> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N3469 -SPPTERM | 4 | IV_FALSE | spidataout<7> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N3469 -OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | spidataout<7>.CLKF | 5340 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE -SIGNAL | NODE | spidataout<7>.CE | 5341 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF - -SRFF_INSTANCE | spidataout<7>.REG | spidataout<7> | 0 | 3 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | spidataout<7>.D | 5337 | ? | 0 | 0 | spidataout<7> | NULL | NULL | spidataout<7>.XOR | 0 | 7 | ALU_F -INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | spidataout<7>.CLKF | 5340 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 3 | 9 | MC_SI_CLKF -SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF -INPUT_NODE_TYPE | 4 | 8 | SRFF_CE -SIGNAL | NODE | spidataout<7>.CE | 5341 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 10 | 9 | MC_SI_CE -SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | spidataout<7>.Q | 5342 | ? | 0 | 0 | spidataout<7> | NULL | NULL | spidataout<7>.REG | 0 | 8 | SRFF_Q +NODE | int_sclk.Q | 4220 | ? | 0 | 0 | int_sclk | NULL | NULL | int_sclk.REG | 0 | 8 | SRFF_Q INPUT_INSTANCE | 0 | 0 | NULL | cpu_Nphi2_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | cpu_Nphi2 | 5060 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | cpu_Nphi2 | 4071 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<0> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<3> | spi6502b_COPY_0_COPY_0 | 2155888640 | 8 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<0> | 4961 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM +NODE | spidatain<3> | 3991 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<0> | 4958 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM +NODE | tmo | 3983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<0> | 4987 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.Q | int_dout<0> | 0 | 0 | MC_Q +NODE | int_dout<3> | 3998 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.Q | int_dout<3> | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<0>$OE | 4988 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.BUFOE.OUT | int_dout<0> | 2 | 0 | MC_OE +NODE | int_dout<3>$OE | 3999 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.BUFOE.OUT | int_dout<3> | 2 | 0 | MC_OE -SIGNAL_INSTANCE | int_dout<0>.SI | int_dout<0> | 0 | 10 | 3 +SIGNAL_INSTANCE | int_dout<3>.SI | int_dout<3> | 0 | 8 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<0> | 4961 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM +NODE | spidatain<3> | 3991 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<0> | 4958 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpha | 4950 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM +NODE | tmo | 3983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<0>.D1 | 5344 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<3>.D1 | 4222 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<0>.D2 | 5345 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slavesel<0> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpha | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | divisor<0> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<0> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SIGNAL | NODE | int_dout<3>.D2 | 4223 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | tmo | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<3> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<0>.TRST | 5347 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF - -SRFF_INSTANCE | int_dout<0>.REG | int_dout<0> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<0>.D | 5343 | ? | 0 | 0 | int_dout<0> | NULL | NULL | int_dout<0>.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<0>.Q | 5348 | ? | 0 | 0 | int_dout<0> | NULL | NULL | int_dout<0>.REG | 0 | 8 | SRFF_Q - -BUF_INSTANCE | int_dout<0>.BUFOE | int_dout<0> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<0>.TRST | 5347 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<0>.BUFOE.OUT | 5346 | ? | 0 | 0 | int_dout<0> | NULL | NULL | int_dout<0>.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<1> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<1> | 4962 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<1> | 4959 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpol | 4948 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<1> | 4943 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<1> | 4989 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.Q | int_dout<1> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<1>$OE | 4990 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.BUFOE.OUT | int_dout<1> | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | int_dout<1>.SI | int_dout<1> | 0 | 10 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<1> | 4962 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<1> | 4959 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpol | 4948 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<1> | 4943 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<1>.D1 | 5350 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<1>.D2 | 5351 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slavesel<1> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpol | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | divisor<1> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<1> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<1>.TRST | 5353 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF - -SRFF_INSTANCE | int_dout<1>.REG | int_dout<1> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<1>.D | 5349 | ? | 0 | 0 | int_dout<1> | NULL | NULL | int_dout<1>.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<1>.Q | 5354 | ? | 0 | 0 | int_dout<1> | NULL | NULL | int_dout<1>.REG | 0 | 8 | SRFF_Q - -BUF_INSTANCE | int_dout<1>.BUFOE | int_dout<1> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<1>.TRST | 5353 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<1>.BUFOE.OUT | 5352 | ? | 0 | 0 | int_dout<1> | NULL | NULL | int_dout<1>.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<2> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<2> | 4963 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<2> | 4960 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ece | 4949 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<2> | 4945 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<2> | 4991 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.Q | int_dout<2> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<2>$OE | 4992 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.BUFOE.OUT | int_dout<2> | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | int_dout<2>.SI | int_dout<2> | 0 | 10 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<2> | 4963 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | divisor<2> | 4960 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ece | 4949 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<2> | 4945 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<2>.D1 | 5356 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<2>.D2 | 5357 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slavesel<2> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | ece | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | divisor<2> | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<2> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<2>.TRST | 5359 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF - -SRFF_INSTANCE | int_dout<2>.REG | int_dout<2> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<2>.D | 5355 | ? | 0 | 0 | int_dout<2> | NULL | NULL | int_dout<2>.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<2>.Q | 5360 | ? | 0 | 0 | int_dout<2> | NULL | NULL | int_dout<2>.REG | 0 | 8 | SRFF_Q - -BUF_INSTANCE | int_dout<2>.BUFOE | int_dout<2> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<2>.TRST | 5359 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<2>.BUFOE.OUT | 5358 | ? | 0 | 0 | int_dout<2> | NULL | NULL | int_dout<2>.BUFOE | 0 | 10 | BUF_OUT - -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<3> | spi6502b_COPY_0_COPY_0 | 2155888640 | 9 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<3> | 4964 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tmo | 4957 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<3> | 4947 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<3> | 4993 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.Q | int_dout<3> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<3>$OE | 4994 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.BUFOE.OUT | int_dout<3> | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | int_dout<3>.SI | int_dout<3> | 0 | 9 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<3> | 4964 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<3>.Q | spidatain<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tmo | 4957 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tmo.Q | tmo | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<3> | 4947 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<3>.D1 | 5362 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<3>.D2 | 5363 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slavesel<3> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | tmo | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<3> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<3>.TRST | 5365 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<3>.TRST | 4225 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF SRFF_INSTANCE | int_dout<3>.REG | int_dout<3> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<3>.D | 5361 | ? | 0 | 0 | int_dout<3> | NULL | NULL | int_dout<3>.XOR | 0 | 7 | ALU_F +NODE | int_dout<3>.D | 4221 | ? | 0 | 0 | int_dout<3> | NULL | NULL | int_dout<3>.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<3>.Q | 5366 | ? | 0 | 0 | int_dout<3> | NULL | NULL | int_dout<3>.REG | 0 | 8 | SRFF_Q +NODE | int_dout<3>.Q | 4226 | ? | 0 | 0 | int_dout<3> | NULL | NULL | int_dout<3>.REG | 0 | 8 | SRFF_Q BUF_INSTANCE | int_dout<3>.BUFOE | int_dout<3> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<3>.TRST | 5365 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<3>.TRST | 4225 | ? | 0 | 4096 | int_dout<3> | NULL | NULL | int_dout<3>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<3>.BUFOE.OUT | 5364 | ? | 0 | 0 | int_dout<3> | NULL | NULL | int_dout<3>.BUFOE | 0 | 10 | BUF_OUT +NODE | int_dout<3>.BUFOE.OUT | 4224 | ? | 0 | 0 | int_dout<3> | NULL | NULL | int_dout<3>.BUFOE | 0 | 10 | BUF_OUT -INPUT_INSTANCE | 0 | 0 | NULL | spi_int_0_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_int<0> | 5055 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_int_0_IBUF | 5017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_0_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<4> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<5> | spi6502b_COPY_0_COPY_0 | 2155888640 | 9 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<4> | 4965 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_0_IBUF | 5017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_0_IBUF | 0 | 5 | II_IMUX +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | frx | 4951 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<0> | 4953 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<0>.Q | slaveinten<0> | 1 | 0 | MC_UIM +NODE | spidatain<5> | 3993 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<4> | 4995 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.Q | int_dout<4> | 0 | 0 | MC_Q +NODE | int_dout<5> | 4000 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.Q | int_dout<5> | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<4>$OE | 4996 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.BUFOE.OUT | int_dout<4> | 2 | 0 | MC_OE +NODE | int_dout<5>$OE | 4001 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.BUFOE.OUT | int_dout<5> | 2 | 0 | MC_OE -SIGNAL_INSTANCE | int_dout<4>.SI | int_dout<4> | 0 | 10 | 3 +SIGNAL_INSTANCE | int_dout<5>.SI | int_dout<5> | 0 | 9 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<4> | 4965 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_0_IBUF | 5017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_0_IBUF | 0 | 5 | II_IMUX +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | frx | 4951 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<0> | 4953 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<0>.Q | slaveinten<0> | 1 | 0 | MC_UIM +NODE | spidatain<5> | 3993 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<4>.D1 | 5368 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<5>.D1 | 4228 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<4>.D2 | 5369 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | frx | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slaveinten<0> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<4> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | spi_int_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SIGNAL | NODE | int_dout<5>.D2 | 4229 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<5> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | start_shifting | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | shifting2 | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<4>.TRST | 5371 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF - -SRFF_INSTANCE | int_dout<4>.REG | int_dout<4> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<4>.D | 5367 | ? | 0 | 0 | int_dout<4> | NULL | NULL | int_dout<4>.XOR | 0 | 7 | ALU_F -OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<4>.Q | 5372 | ? | 0 | 0 | int_dout<4> | NULL | NULL | int_dout<4>.REG | 0 | 8 | SRFF_Q - -BUF_INSTANCE | int_dout<4>.BUFOE | int_dout<4> | 0 | 1 | 1 -INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<4>.TRST | 5371 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 4 | 9 | MC_SI_TRST -SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<4>.BUFOE.OUT | 5370 | ? | 0 | 0 | int_dout<4> | NULL | NULL | int_dout<4>.BUFOE | 0 | 10 | BUF_OUT - -INPUT_INSTANCE | 0 | 0 | NULL | spi_int_1_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_int<1> | 5054 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_int_1_IBUF | 5016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_1_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<5> | spi6502b_COPY_0_COPY_0 | 2155888640 | 11 | 2 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<5> | 4966 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2.EXP | 5423 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.EXP | shifting2 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<5> | 4997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.Q | int_dout<5> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<5>$OE | 4998 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.BUFOE.OUT | int_dout<5> | 2 | 0 | MC_OE - -SIGNAL_INSTANCE | int_dout<5>.SI | int_dout<5> | 0 | 11 | 3 -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<5> | 4966 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<5>.Q | spidatain<5> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2.EXP | 5423 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.EXP | shifting2 | 4 | 0 | MC_EXPORT -OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<5>.D1 | 5374 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 1 | 9 | MC_SI_D1 -SPPTERM | 0 | IV_ZERO -OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<5>.D2 | 5375 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 1 | IV_TRUE | shifting2.EXP -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slaveinten<1> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<5> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | start_shifting | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | shifting2 | IV_TRUE | cpu_Nphi2_IBUF -OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<5>.TRST | 5377 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<5>.TRST | 4231 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF SRFF_INSTANCE | int_dout<5>.REG | int_dout<5> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<5>.D | 5373 | ? | 0 | 0 | int_dout<5> | NULL | NULL | int_dout<5>.XOR | 0 | 7 | ALU_F +NODE | int_dout<5>.D | 4227 | ? | 0 | 0 | int_dout<5> | NULL | NULL | int_dout<5>.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<5>.Q | 5378 | ? | 0 | 0 | int_dout<5> | NULL | NULL | int_dout<5>.REG | 0 | 8 | SRFF_Q +NODE | int_dout<5>.Q | 4232 | ? | 0 | 0 | int_dout<5> | NULL | NULL | int_dout<5>.REG | 0 | 8 | SRFF_Q BUF_INSTANCE | int_dout<5>.BUFOE | int_dout<5> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<5>.TRST | 5377 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<5>.TRST | 4231 | ? | 0 | 4096 | int_dout<5> | NULL | NULL | int_dout<5>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<5>.BUFOE.OUT | 5376 | ? | 0 | 0 | int_dout<5> | NULL | NULL | int_dout<5>.BUFOE | 0 | 10 | BUF_OUT +NODE | int_dout<5>.BUFOE.OUT | 4230 | ? | 0 | 0 | int_dout<5> | NULL | NULL | int_dout<5>.BUFOE | 0 | 10 | BUF_OUT -INPUT_INSTANCE | 0 | 0 | NULL | spi_int_2_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_int<2> | 5053 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_int_2_IBUF | 5015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_2_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<6> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<6> | spi6502b_COPY_0_COPY_0 | 2155888640 | 8 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<6> | 4967 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM +NODE | spidatain<6> | 3994 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_2_IBUF | 5015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<2> | 4955 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<2>.Q | slaveinten<2> | 1 | 0 | MC_UIM +NODE | ier | 3981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<6> | 4999 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.Q | int_dout<6> | 0 | 0 | MC_Q +NODE | int_dout<6> | 4002 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.Q | int_dout<6> | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<6>$OE | 5000 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.BUFOE.OUT | int_dout<6> | 2 | 0 | MC_OE +NODE | int_dout<6>$OE | 4003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.BUFOE.OUT | int_dout<6> | 2 | 0 | MC_OE -SIGNAL_INSTANCE | int_dout<6>.SI | int_dout<6> | 0 | 10 | 3 +SIGNAL_INSTANCE | int_dout<6>.SI | int_dout<6> | 0 | 8 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<6> | 4967 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM +NODE | spidatain<6> | 3994 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<6>.Q | spidatain<6> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_2_IBUF | 5015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<2> | 4955 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<2>.Q | slaveinten<2> | 1 | 0 | MC_UIM +NODE | ier | 3981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<6>.D1 | 5380 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<6>.D1 | 4234 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<6>.D2 | 5381 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | ier | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slaveinten<2> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<6> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | spi_int_2_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SIGNAL | NODE | int_dout<6>.D2 | 4235 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | ier | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<6> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<6>.TRST | 5383 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<6>.TRST | 4237 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF SRFF_INSTANCE | int_dout<6>.REG | int_dout<6> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<6>.D | 5379 | ? | 0 | 0 | int_dout<6> | NULL | NULL | int_dout<6>.XOR | 0 | 7 | ALU_F +NODE | int_dout<6>.D | 4233 | ? | 0 | 0 | int_dout<6> | NULL | NULL | int_dout<6>.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<6>.Q | 5384 | ? | 0 | 0 | int_dout<6> | NULL | NULL | int_dout<6>.REG | 0 | 8 | SRFF_Q +NODE | int_dout<6>.Q | 4238 | ? | 0 | 0 | int_dout<6> | NULL | NULL | int_dout<6>.REG | 0 | 8 | SRFF_Q BUF_INSTANCE | int_dout<6>.BUFOE | int_dout<6> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<6>.TRST | 5383 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<6>.TRST | 4237 | ? | 0 | 4096 | int_dout<6> | NULL | NULL | int_dout<6>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<6>.BUFOE.OUT | 5382 | ? | 0 | 0 | int_dout<6> | NULL | NULL | int_dout<6>.BUFOE | 0 | 10 | BUF_OUT +NODE | int_dout<6>.BUFOE.OUT | 4236 | ? | 0 | 0 | int_dout<6> | NULL | NULL | int_dout<6>.BUFOE | 0 | 10 | BUF_OUT -INPUT_INSTANCE | 0 | 0 | NULL | spi_int_3_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 -INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | spi_int<3> | 5052 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE -OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | spi_int_3_IBUF | 5014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_3_IBUF | 0 | 5 | II_IMUX - -MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<7> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<7> | spi6502b_COPY_0_COPY_0 | 2155888640 | 8 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<7> | 4968 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<7>.Q | spidatain<7> | 1 | 0 | MC_UIM +NODE | spidatain<7> | 3995 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<7>.Q | spidatain<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_3_IBUF | 5014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_3_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tc | 4976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<3> | 4956 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<3>.Q | slaveinten<3> | 1 | 0 | MC_UIM +NODE | tc | 4012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | int_dout<7> | 5001 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.Q | int_dout<7> | 0 | 0 | MC_Q +NODE | int_dout<7> | 4004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.Q | int_dout<7> | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | int_dout<7>$OE | 5002 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.BUFOE.OUT | int_dout<7> | 2 | 0 | MC_OE +NODE | int_dout<7>$OE | 4005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.BUFOE.OUT | int_dout<7> | 2 | 0 | MC_OE -SIGNAL_INSTANCE | int_dout<7>.SI | int_dout<7> | 0 | 10 | 3 +SIGNAL_INSTANCE | int_dout<7>.SI | int_dout<7> | 0 | 8 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidatain<7> | 4968 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<7>.Q | spidatain<7> | 1 | 0 | MC_UIM +NODE | spidatain<7> | 3995 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<7>.Q | spidatain<7> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_3_IBUF | 5014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_3_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tc | 4976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<3> | 4956 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<3>.Q | slaveinten<3> | 1 | 0 | MC_UIM +NODE | tc | 4012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | int_dout<7>.D1 | 5386 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<7>.D1 | 4240 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | int_dout<7>.D2 | 5387 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slaveinten<3> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<7> | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | tc | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | spi_int_3_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SIGNAL | NODE | int_dout<7>.D2 | 4241 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<7> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | tc | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | int_dout<7>.TRST | 5389 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<7>.TRST | 4243 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF SRFF_INSTANCE | int_dout<7>.REG | int_dout<7> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | int_dout<7>.D | 5385 | ? | 0 | 0 | int_dout<7> | NULL | NULL | int_dout<7>.XOR | 0 | 7 | ALU_F +NODE | int_dout<7>.D | 4239 | ? | 0 | 0 | int_dout<7> | NULL | NULL | int_dout<7>.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | int_dout<7>.Q | 5390 | ? | 0 | 0 | int_dout<7> | NULL | NULL | int_dout<7>.REG | 0 | 8 | SRFF_Q +NODE | int_dout<7>.Q | 4244 | ? | 0 | 0 | int_dout<7> | NULL | NULL | int_dout<7>.REG | 0 | 8 | SRFF_Q BUF_INSTANCE | int_dout<7>.BUFOE | int_dout<7> | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | int_dout<7>.TRST | 5389 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<7>.TRST | 4243 | ? | 0 | 4096 | int_dout<7> | NULL | NULL | int_dout<7>.SI | 4 | 9 | MC_SI_TRST SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | int_dout<7>.BUFOE.OUT | 5388 | ? | 0 | 0 | int_dout<7> | NULL | NULL | int_dout<7>.BUFOE | 0 | 10 | BUF_OUT +NODE | int_dout<7>.BUFOE.OUT | 4242 | ? | 0 | 0 | int_dout<7> | NULL | NULL | int_dout<7>.BUFOE | 0 | 10 | BUF_OUT -MACROCELL_INSTANCE | PrldLow+OptxMapped | shifting2 | spi6502b_COPY_0_COPY_0 | 2155873280 | 10 | 2 +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | shiftcnt<3> | spi6502b_COPY_0_COPY_0 | 2155877376 | 7 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_1_IBUF | 5016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | shifting2.EXP | 5423 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.EXP | shifting2 | 4 | 0 | MC_EXPORT +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | shifting2.SI | shifting2 | 0 | 10 | 4 +SIGNAL_INSTANCE | shiftcnt<3>.SI | shiftcnt<3> | 0 | 7 | 4 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_rnw_IBUF | 4939 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cs1_IBUF | 5003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | Ncs2_IBUF | 5004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_1_IBUF | 5016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | shifting2.D1 | 5392 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | shiftcnt<3>.D1 | 4246 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | shifting2.D2 | 5393 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | shiftcnt<3>.D2 | 4247 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | shiftcnt<3> | IV_FALSE | shifting2 +SPPTERM | 4 | IV_TRUE | shiftcnt<2> | IV_TRUE | shiftcnt<0> | IV_TRUE | shiftcnt<1> | IV_TRUE | shifting2 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | shiftcnt<3>.CLKF | 4248 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | shiftcnt<3>.RSTF | 4249 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF + +SRFF_INSTANCE | shiftcnt<3>.REG | shiftcnt<3> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | shiftcnt<3>.D | 4245 | ? | 0 | 0 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | shiftcnt<3>.CLKF | 4248 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +INPUT_NODE_TYPE | 3 | 8 | SRFF_R +SIGNAL | NODE | shiftcnt<3>.RSTF | 4249 | ? | 0 | 4096 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | shiftcnt<3>.Q | 4250 | ? | 0 | 0 | shiftcnt<3> | NULL | NULL | shiftcnt<3>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped | shiftcnt<2> | spi6502b_COPY_0_COPY_0 | 2155877376 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | shiftcnt<2>.SI | shiftcnt<2> | 0 | 6 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | shiftcnt<2>.D1 | 4252 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | shiftcnt<2>.D2 | 4253 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_TRUE | shiftcnt<2> | IV_FALSE | shifting2 +SPPTERM | 3 | IV_TRUE | shiftcnt<0> | IV_TRUE | shiftcnt<1> | IV_TRUE | shifting2 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | shiftcnt<2>.CLKF | 4254 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | shiftcnt<2>.RSTF | 4255 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF + +SRFF_INSTANCE | shiftcnt<2>.REG | shiftcnt<2> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | shiftcnt<2>.D | 4251 | ? | 0 | 0 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | shiftcnt<2>.CLKF | 4254 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +INPUT_NODE_TYPE | 3 | 8 | SRFF_R +SIGNAL | NODE | shiftcnt<2>.RSTF | 4255 | ? | 0 | 4096 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | shiftcnt<2>.Q | 4256 | ? | 0 | 0 | shiftcnt<2> | NULL | NULL | shiftcnt<2>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | shiftcnt<0> | spi6502b_COPY_0_COPY_0 | 2155873280 | 4 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | shiftcnt<0>.SI | shiftcnt<0> | 0 | 4 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | shiftcnt<0>.D1 | 4258 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | shiftcnt<0>.D2 | 4259 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 2 | IV_FALSE | shiftcnt<0> | IV_TRUE | shifting2 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | shiftcnt<0>.CLKF | 4260 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | shiftcnt<0>.RSTF | 4261 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF + +SRFF_INSTANCE | shiftcnt<0>.REG | shiftcnt<0> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | shiftcnt<0>.D | 4257 | ? | 0 | 0 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | shiftcnt<0>.CLKF | 4260 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +INPUT_NODE_TYPE | 3 | 8 | SRFF_R +SIGNAL | NODE | shiftcnt<0>.RSTF | 4261 | ? | 0 | 4096 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | shiftcnt<0>.Q | 4262 | ? | 0 | 0 | shiftcnt<0> | NULL | NULL | shiftcnt<0>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | shiftcnt<1> | spi6502b_COPY_0_COPY_0 | 2155873280 | 5 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | shiftcnt<1>.SI | shiftcnt<1> | 0 | 5 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | shiftcnt<1>.D1 | 4264 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | shiftcnt<1>.D2 | 4265 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | shiftcnt<0> | IV_FALSE | shiftcnt<1> | IV_TRUE | shifting2 +SPPTERM | 3 | IV_FALSE | shiftcnt<0> | IV_TRUE | shiftcnt<1> | IV_TRUE | shifting2 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | shiftcnt<1>.CLKF | 4266 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | shiftcnt<1>.RSTF | 4267 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF + +SRFF_INSTANCE | shiftcnt<1>.REG | shiftcnt<1> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | shiftcnt<1>.D | 4263 | ? | 0 | 0 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | shiftcnt<1>.CLKF | 4266 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +INPUT_NODE_TYPE | 3 | 8 | SRFF_R +SIGNAL | NODE | shiftcnt<1>.RSTF | 4267 | ? | 0 | 4096 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | shiftcnt<1>.Q | 4268 | ? | 0 | 0 | shiftcnt<1> | NULL | NULL | shiftcnt<1>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped | shiftdone | spi6502b_COPY_0_COPY_0 | 2155873280 | 6 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | shiftdone.SI | shiftdone | 0 | 6 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | shiftdone.D1 | 4270 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | shiftdone.D2 | 4271 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_TRUE | shiftcnt<3> | IV_TRUE | shiftcnt<2> | IV_TRUE | shiftcnt<0> | IV_TRUE | shiftcnt<1> +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | shiftdone.CLKF | 4272 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | shiftdone.RSTF | 4273 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF + +SRFF_INSTANCE | shiftdone.REG | shiftdone | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | shiftdone.D | 4269 | ? | 0 | 0 | shiftdone | NULL | NULL | shiftdone.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | shiftdone.CLKF | 4272 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM +INPUT_NODE_TYPE | 3 | 8 | SRFF_R +SIGNAL | NODE | shiftdone.RSTF | 4273 | ? | 0 | 4096 | shiftdone | NULL | NULL | shiftdone.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | cpu_Nres_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | shiftdone.Q | 4274 | ? | 0 | 0 | shiftdone | NULL | NULL | shiftdone.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | start_shifting | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | frx | 3980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | start_shifting/start_shifting_RSTF__$INT.UIM | 4061 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.Q | start_shifting/start_shifting_RSTF__$INT | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | start_shifting.SI | start_shifting | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | frx | 3980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | start_shifting/start_shifting_RSTF__$INT.UIM | 4061 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.Q | start_shifting/start_shifting_RSTF__$INT | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | start_shifting.D1 | 4276 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | start_shifting.D2 | 4277 | ? | 0 | 6144 | start_shifting | NULL | NULL | start_shifting.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_rnw_IBUF | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | start_shifting | IV_FALSE | cpu_a_0_IBUF +SPPTERM | 4 | IV_TRUE | frx | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | start_shifting | IV_FALSE | cpu_a_0_IBUF +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | start_shifting.CLKF | 4278 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 6 | 9 | MC_SI_RSTF +SIGNAL | NODE | start_shifting.RSTF | 4279 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | start_shifting/start_shifting_RSTF__$INT.UIM + +SRFF_INSTANCE | start_shifting.REG | start_shifting | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | start_shifting.D | 4275 | ? | 0 | 0 | start_shifting | NULL | NULL | start_shifting.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | start_shifting.CLKF | 4278 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 3 | 8 | SRFF_R +SIGNAL | NODE | start_shifting.RSTF | 4279 | ? | 0 | 4096 | start_shifting | NULL | NULL | start_shifting.SI | 6 | 9 | MC_SI_RSTF +SPPTERM | 1 | IV_FALSE | start_shifting/start_shifting_RSTF__$INT.UIM +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | start_shifting.Q | 4280 | ? | 0 | 0 | start_shifting | NULL | NULL | start_shifting.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+OptxMapped+Ce | tc | spi6502b_COPY_0_COPY_0 | 2424308736 | 5 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | tc | 4012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | tc.SI | tc | 0 | 5 | 5 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | tc.D1 | 4282 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | tc.D2 | 4283 | ? | 0 | 6144 | tc | NULL | NULL | tc.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | tc.CLKF | 4284 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 5 | 9 | MC_SI_SETF +SIGNAL | NODE | tc.SETF | 4285 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 5 | 9 | MC_SI_SETF +SPPTERM | 1 | IV_TRUE | shiftdone +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | tc.CE | 4286 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF + +SRFF_INSTANCE | tc.REG | tc | 0 | 4 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | tc.D | 4281 | ? | 0 | 0 | tc | NULL | NULL | tc.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | tc.CLKF | 4284 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 2 | 8 | SRFF_S +SIGNAL | NODE | tc.SETF | 4285 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 5 | 9 | MC_SI_SETF +SPPTERM | 1 | IV_TRUE | shiftdone +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | tc.CE | 4286 | ? | 0 | 4096 | tc | NULL | NULL | tc.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | tc.Q | 4287 | ? | 0 | 0 | tc | NULL | NULL | tc.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<0> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<0> | 4013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<0> | 4013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<0>.SI | spidataout<0> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<0> | 4013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2889 | 4033 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2889 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<0>.D1 | 4289 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<0>.D2 | 4290 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<0> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2889 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<0> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2889 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<0>.CLKF | 4291 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<0>.CE | 4292 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<0>.REG | spidataout<0> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<0>.D | 4288 | ? | 0 | 0 | spidataout<0> | NULL | NULL | spidataout<0>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<0>.CLKF | 4291 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<0>.CE | 4292 | ? | 0 | 4096 | spidataout<0> | NULL | NULL | spidataout<0>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<0>.Q | 4293 | ? | 0 | 0 | spidataout<0> | NULL | NULL | spidataout<0>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<1> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<1> | 4014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2891 | 4034 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2891 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<1> | 4014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<1>.SI | spidataout<1> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<1> | 4014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<1>.Q | spidataout<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2891 | 4034 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2891 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<1>.D1 | 4295 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<1>.D2 | 4296 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<1> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2891 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<1> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2891 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<1>.CLKF | 4297 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<1>.CE | 4298 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<1>.REG | spidataout<1> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<1>.D | 4294 | ? | 0 | 0 | spidataout<1> | NULL | NULL | spidataout<1>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<1>.CLKF | 4297 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<1>.CE | 4298 | ? | 0 | 4096 | spidataout<1> | NULL | NULL | spidataout<1>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<1>.Q | 4299 | ? | 0 | 0 | spidataout<1> | NULL | NULL | spidataout<1>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<2> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<2> | 4015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2893 | 4035 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2893 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<2> | 4015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<2>.SI | spidataout<2> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<2> | 4015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2893 | 4035 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2893 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<2>.D1 | 4301 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<2>.D2 | 4302 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<2> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2893 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<2> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2893 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<2>.CLKF | 4303 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<2>.CE | 4304 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<2>.REG | spidataout<2> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<2>.D | 4300 | ? | 0 | 0 | spidataout<2> | NULL | NULL | spidataout<2>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<2>.CLKF | 4303 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<2>.CE | 4304 | ? | 0 | 4096 | spidataout<2> | NULL | NULL | spidataout<2>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<2>.Q | 4305 | ? | 0 | 0 | spidataout<2> | NULL | NULL | spidataout<2>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<3> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<3> | 4016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2895 | 4036 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2895 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<3> | 4016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<3>.SI | spidataout<3> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<3> | 4016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2895 | 4036 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2895 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<3>.D1 | 4307 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<3>.D2 | 4308 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<3> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2895 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<3> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2895 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<3>.CLKF | 4309 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<3>.CE | 4310 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<3>.REG | spidataout<3> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<3>.D | 4306 | ? | 0 | 0 | spidataout<3> | NULL | NULL | spidataout<3>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<3>.CLKF | 4309 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<3>.CE | 4310 | ? | 0 | 4096 | spidataout<3> | NULL | NULL | spidataout<3>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<3>.Q | 4311 | ? | 0 | 0 | spidataout<3> | NULL | NULL | spidataout<3>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<4> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<4> | 4017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2897 | 4037 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2897 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<4> | 4017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<4>.SI | spidataout<4> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<4> | 4017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2897 | 4037 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2897 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<4>.D1 | 4313 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<4>.D2 | 4314 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<4> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2897 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<4> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2897 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<4>.CLKF | 4315 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<4>.CE | 4316 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<4>.REG | spidataout<4> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<4>.D | 4312 | ? | 0 | 0 | spidataout<4> | NULL | NULL | spidataout<4>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<4>.CLKF | 4315 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<4>.CE | 4316 | ? | 0 | 4096 | spidataout<4> | NULL | NULL | spidataout<4>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<4>.Q | 4317 | ? | 0 | 0 | spidataout<4> | NULL | NULL | spidataout<4>.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | N2899 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | cpu_d<5> | 4051 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<5> | 0 | 6 | OI_OUT +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | N2899 | 4040 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2899 | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<5> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<5> | 4018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2899 | 4040 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2899 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<5> | 4018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<5>.SI | spidataout<5> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<5> | 4018 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<5>.Q | spidataout<5> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2899 | 4040 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2899 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<5>.D1 | 4319 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<5>.D2 | 4320 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<5> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2899 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<5> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2899 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<5>.CLKF | 4321 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<5>.CE | 4322 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<5>.REG | spidataout<5> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<5>.D | 4318 | ? | 0 | 0 | spidataout<5> | NULL | NULL | spidataout<5>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<5>.CLKF | 4321 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<5>.CE | 4322 | ? | 0 | 4096 | spidataout<5> | NULL | NULL | spidataout<5>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<5>.Q | 4323 | ? | 0 | 0 | spidataout<5> | NULL | NULL | spidataout<5>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<6> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<6> | 4019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2901 | 4038 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2901 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<6> | 4019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<6>.SI | spidataout<6> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<6> | 4019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2901 | 4038 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2901 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<6>.D1 | 4325 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<6>.D2 | 4326 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<6> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2901 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<6> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2901 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<6>.CLKF | 4327 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<6>.CE | 4328 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<6>.REG | spidataout<6> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<6>.D | 4324 | ? | 0 | 0 | spidataout<6> | NULL | NULL | spidataout<6>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<6>.CLKF | 4327 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<6>.CE | 4328 | ? | 0 | 4096 | spidataout<6> | NULL | NULL | spidataout<6>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<6>.Q | 4329 | ? | 0 | 0 | spidataout<6> | NULL | NULL | spidataout<6>.REG | 0 | 8 | SRFF_Q + +INPUT_INSTANCE | 0 | 0 | NULL | N2903 | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | cpu_d<7> | 4053 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<7> | 0 | 6 | OI_OUT +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | N2903 | 4039 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2903 | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PrldLow+Tff+OptxMapped+Ce | spidataout<7> | spi6502b_COPY_0_COPY_0 | 2424312832 | 8 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<7> | 4020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2903 | 4039 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2903 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | spidataout<7> | 4020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM + +SIGNAL_INSTANCE | spidataout<7>.SI | spidataout<7> | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<7> | 4020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | N2903 | 4039 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N2903 | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | spidataout<7>.D1 | 4331 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | spidataout<7>.D2 | 4332 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | spidataout<7> | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | N2903 +SPPTERM | 4 | IV_FALSE | cpu_a_1_IBUF | IV_FALSE | spidataout<7> | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | N2903 +OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | spidataout<7>.CLKF | 4333 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +OUTPUT_NODE_TYPE | 10 | 9 | MC_SI_CE +SIGNAL | NODE | spidataout<7>.CE | 4334 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF + +SRFF_INSTANCE | spidataout<7>.REG | spidataout<7> | 0 | 3 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | spidataout<7>.D | 4330 | ? | 0 | 0 | spidataout<7> | NULL | NULL | spidataout<7>.XOR | 0 | 7 | ALU_F +INPUT_NODE_TYPE | 1 | 8 | SRFF_C +SIGNAL | NODE | spidataout<7>.CLKF | 4333 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 3 | 9 | MC_SI_CLKF +SPPTERM | 2 | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF +INPUT_NODE_TYPE | 4 | 8 | SRFF_CE +SIGNAL | NODE | spidataout<7>.CE | 4334 | ? | 0 | 4096 | spidataout<7> | NULL | NULL | spidataout<7>.SI | 10 | 9 | MC_SI_CE +SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | cpu_rnw_IBUF +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | spidataout<7>.Q | 4335 | ? | 0 | 0 | spidataout<7> | NULL | NULL | spidataout<7>.REG | 0 | 8 | SRFF_Q + +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<0> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<0> | 3988 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | divisor<0> | 3984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | int_dout<0> | 4021 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.Q | int_dout<0> | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | int_dout<0>$OE | 4022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.BUFOE.OUT | int_dout<0> | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | int_dout<0>.SI | int_dout<0> | 0 | 10 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<0> | 3988 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<0>.Q | spidatain<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | divisor<0> | 3984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<0>.Q | divisor<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<0>.D1 | 4337 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | int_dout<0>.D2 | 4338 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slavesel | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpha | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | divisor<0> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<0> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<0>.TRST | 4340 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF + +SRFF_INSTANCE | int_dout<0>.REG | int_dout<0> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | int_dout<0>.D | 4336 | ? | 0 | 0 | int_dout<0> | NULL | NULL | int_dout<0>.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | int_dout<0>.Q | 4341 | ? | 0 | 0 | int_dout<0> | NULL | NULL | int_dout<0>.REG | 0 | 8 | SRFF_Q + +BUF_INSTANCE | int_dout<0>.BUFOE | int_dout<0> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | int_dout<0>.TRST | 4340 | ? | 0 | 4096 | int_dout<0> | NULL | NULL | int_dout<0>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | int_dout<0>.BUFOE.OUT | 4339 | ? | 0 | 0 | int_dout<0> | NULL | NULL | int_dout<0>.BUFOE | 0 | 10 | BUF_OUT + +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<1> | spi6502b_COPY_0_COPY_0 | 2155888640 | 9 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<1> | 3989 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpol | 3977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | divisor<1> | 3985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | int_dout<1> | 4023 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.Q | int_dout<1> | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | int_dout<1>$OE | 4024 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.BUFOE.OUT | int_dout<1> | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | int_dout<1>.SI | int_dout<1> | 0 | 9 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<1> | 3989 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<1>.Q | spidatain<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpol | 3977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpol.Q | cpol | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | divisor<1> | 3985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<1>.Q | divisor<1> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<1>.D1 | 4343 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | int_dout<1>.D2 | 4344 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpol | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | divisor<1> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<1> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<1>.TRST | 4346 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF + +SRFF_INSTANCE | int_dout<1>.REG | int_dout<1> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | int_dout<1>.D | 4342 | ? | 0 | 0 | int_dout<1> | NULL | NULL | int_dout<1>.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | int_dout<1>.Q | 4347 | ? | 0 | 0 | int_dout<1> | NULL | NULL | int_dout<1>.REG | 0 | 8 | SRFF_Q + +BUF_INSTANCE | int_dout<1>.BUFOE | int_dout<1> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | int_dout<1>.TRST | 4346 | ? | 0 | 4096 | int_dout<1> | NULL | NULL | int_dout<1>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | int_dout<1>.BUFOE.OUT | 4345 | ? | 0 | 0 | int_dout<1> | NULL | NULL | int_dout<1>.BUFOE | 0 | 10 | BUF_OUT + +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<2> | spi6502b_COPY_0_COPY_0 | 2155888640 | 9 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<2> | 3990 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ece | 3978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | divisor<2> | 3986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | int_dout<2> | 4025 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.Q | int_dout<2> | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | int_dout<2>$OE | 4026 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.BUFOE.OUT | int_dout<2> | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | int_dout<2>.SI | int_dout<2> | 0 | 9 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<2> | 3990 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<2>.Q | spidatain<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | ece | 3978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | divisor<2> | 3986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | divisor<2>.Q | divisor<2> | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<2>.D1 | 4349 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | int_dout<2>.D2 | 4350 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | ece | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | divisor<2> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<2> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<2>.TRST | 4352 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF + +SRFF_INSTANCE | int_dout<2>.REG | int_dout<2> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | int_dout<2>.D | 4348 | ? | 0 | 0 | int_dout<2> | NULL | NULL | int_dout<2>.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | int_dout<2>.Q | 4353 | ? | 0 | 0 | int_dout<2> | NULL | NULL | int_dout<2>.REG | 0 | 8 | SRFF_Q + +BUF_INSTANCE | int_dout<2>.BUFOE | int_dout<2> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | int_dout<2>.TRST | 4352 | ? | 0 | 4096 | int_dout<2> | NULL | NULL | int_dout<2>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | int_dout<2>.BUFOE.OUT | 4351 | ? | 0 | 0 | int_dout<2> | NULL | NULL | int_dout<2>.BUFOE | 0 | 10 | BUF_OUT + +INPUT_INSTANCE | 0 | 0 | NULL | spi_int_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 +INPUT_NODE_TYPE | 0 | 5 | II_IN +NODE | spi_int | 4070 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX +NODE | spi_int_IBUF | 4041 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_IBUF | 0 | 5 | II_IMUX + +MACROCELL_INSTANCE | PinTrst+OptxMapped | int_dout<4> | spi6502b_COPY_0_COPY_0 | 2155888640 | 10 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<4> | 3992 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spi_int_IBUF | 4041 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | frx | 3980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | slaveinten | 3982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten.Q | slaveinten | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 0 | 0 | MC_Q +NODE | int_dout<4> | 4027 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.Q | int_dout<4> | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 2 | 0 | MC_OE +NODE | int_dout<4>$OE | 4028 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.BUFOE.OUT | int_dout<4> | 2 | 0 | MC_OE + +SIGNAL_INSTANCE | int_dout<4>.SI | int_dout<4> | 0 | 10 | 3 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_rnw_IBUF | 3974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_rnw_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidatain<4> | 3992 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidatain<4>.Q | spidatain<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_1_IBUF | 3997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cs1_IBUF | 4029 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cs1_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | Ncs2_IBUF | 4030 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | Ncs2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_a_0_IBUF | 4031 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spi_int_IBUF | 4041 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | frx | 3980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | frx.Q | frx | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | slaveinten | 3982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten.Q | slaveinten | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | int_dout<4>.D1 | 4355 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | int_dout<4>.D2 | 4356 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | frx | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | slaveinten | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | spidatain<4> | IV_FALSE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_FALSE | spi_int_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | int_dout<4>.TRST | 4358 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF + +SRFF_INSTANCE | int_dout<4>.REG | int_dout<4> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 8 | SRFF_D +NODE | int_dout<4>.D | 4354 | ? | 0 | 0 | int_dout<4> | NULL | NULL | int_dout<4>.XOR | 0 | 7 | ALU_F +OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q +NODE | int_dout<4>.Q | 4359 | ? | 0 | 0 | int_dout<4> | NULL | NULL | int_dout<4>.REG | 0 | 8 | SRFF_Q + +BUF_INSTANCE | int_dout<4>.BUFOE | int_dout<4> | 0 | 1 | 1 +INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN +SIGNAL | NODE | int_dout<4>.TRST | 4358 | ? | 0 | 4096 | int_dout<4> | NULL | NULL | int_dout<4>.SI | 4 | 9 | MC_SI_TRST +SPPTERM | 4 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_TRUE | cpu_Nphi2_IBUF +OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT +NODE | int_dout<4>.BUFOE.OUT | 4357 | ? | 0 | 0 | int_dout<4> | NULL | NULL | int_dout<4>.BUFOE | 0 | 10 | BUF_OUT + +MACROCELL_INSTANCE | PrldLow+OptxMapped | shifting2 | spi6502b_COPY_0_COPY_0 | 2155873280 | 8 | 2 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<6> | 4019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | shifting2.EXP | 4390 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.EXP | shifting2 | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | shifting2.SI | shifting2 | 0 | 8 | 4 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<6> | 4019 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | shifting2.D1 | 4361 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 1 | 9 | MC_SI_D1 +SPPTERM | 0 | IV_ZERO +OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | shifting2.D2 | 4362 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_FALSE | shiftdone | IV_TRUE | start_shifting OUTPUT_NODE_TYPE | 3 | 9 | MC_SI_CLKF -SIGNAL | NODE | shifting2.CLKF | 5394 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | shifting2.CLKF | 4363 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | shifting2.EXP | 5422 | ? | 0 | 0 | shifting2 | NULL | NULL | shifting2.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 7 | IV_TRUE | cpu_rnw_IBUF | IV_TRUE | cpu_a_1_IBUF | IV_FALSE | cpu_a_0_IBUF | IV_TRUE | cs1_IBUF | IV_FALSE | Ncs2_IBUF | IV_FALSE | spi_int_1_IBUF | IV_TRUE | cpu_Nphi2_IBUF +SIGNAL | NODE | shifting2.EXP | 4388 | ? | 0 | 0 | shifting2 | NULL | NULL | shifting2.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 6 | IV_FALSE | shiftcnt<3> | IV_FALSE | shiftcnt<2> | IV_TRUE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<6> | IV_TRUE | shifting2 SRFF_INSTANCE | shifting2.REG | shifting2 | 0 | 2 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | shifting2.D | 5391 | ? | 0 | 0 | shifting2 | NULL | NULL | shifting2.XOR | 0 | 7 | ALU_F +NODE | shifting2.D | 4360 | ? | 0 | 0 | shifting2 | NULL | NULL | shifting2.XOR | 0 | 7 | ALU_F INPUT_NODE_TYPE | 1 | 8 | SRFF_C -SIGNAL | NODE | shifting2.CLKF | 5394 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 3 | 9 | MC_SI_CLKF +SIGNAL | NODE | shifting2.CLKF | 4363 | ? | 0 | 4096 | shifting2 | NULL | NULL | shifting2.SI | 3 | 9 | MC_SI_CLKF SPPTERM | 1 | IV_FALSE | $OpTx$INV$22__$INT.UIM OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | shifting2.Q | 5395 | ? | 0 | 0 | shifting2 | NULL | NULL | shifting2.REG | 0 | 8 | SRFF_Q +NODE | shifting2.Q | 4364 | ? | 0 | 0 | shifting2 | NULL | NULL | shifting2.REG | 0 | 8 | SRFF_Q INPUT_INSTANCE | 0 | 0 | NULL | extclk_IBUF | spi6502b_COPY_0_COPY_0 | 16 | 1 | 1 INPUT_NODE_TYPE | 0 | 5 | II_IN -NODE | extclk | 5061 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE +NODE | extclk | 4072 | PI | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | NULL | 0 | 100 | NOTYPE OUTPUT_NODE_TYPE | 0 | 5 | II_IMUX -NODE | extclk_IBUF | 5023 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | extclk_IBUF | 0 | 5 | II_IMUX +NODE | extclk_IBUF | 4043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | extclk_IBUF | 0 | 5 | II_IMUX -MACROCELL_INSTANCE | OptxMapped | diag_OBUF | spi6502b_COPY_0_COPY_0 | 2155872256 | 7 | 2 +MACROCELL_INSTANCE | OptxMapped | led_OBUF | spi6502b_COPY_0_COPY_0 | 2155872256 | 3 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3465 | 5013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3465 | 0 | 5 | II_IMUX +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | diag_OBUF | 5024 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | diag_OBUF.Q | diag_OBUF | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | diag_OBUF.EXP | 5429 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | diag_OBUF.EXP | diag_OBUF | 4 | 0 | MC_EXPORT +NODE | led_OBUF | 4044 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | led_OBUF.Q | led_OBUF | 0 | 0 | MC_Q -SIGNAL_INSTANCE | diag_OBUF.SI | diag_OBUF | 0 | 7 | 3 +SIGNAL_INSTANCE | led_OBUF.SI | led_OBUF | 0 | 3 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slavesel<0> | 4941 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 1 | 0 | MC_UIM +NODE | slavesel | 3976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_1_IBUF | 4985 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_1_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_a_0_IBUF | 4986 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_a_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | N3465 | 5013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | N3465 | 0 | 5 | II_IMUX +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | diag_OBUF.D1 | 5397 | ? | 0 | 4096 | diag_OBUF | NULL | NULL | diag_OBUF.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | led_OBUF.D1 | 4366 | ? | 0 | 4096 | led_OBUF | NULL | NULL | led_OBUF.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | diag_OBUF.D2 | 5398 | ? | 0 | 4096 | diag_OBUF | NULL | NULL | diag_OBUF.SI | 2 | 9 | MC_SI_D2 -SPPTERM | 3 | IV_TRUE | slavesel<0> | IV_FALSE | start_shifting | IV_FALSE | shifting2 -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | diag_OBUF.EXP | 5425 | ? | 0 | 0 | diag_OBUF | NULL | NULL | diag_OBUF.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 4 | IV_TRUE | slaveinten<1> | IV_TRUE | cpu_a_1_IBUF | IV_TRUE | cpu_a_0_IBUF | IV_FALSE | N3465 +SIGNAL | NODE | led_OBUF.D2 | 4367 | ? | 0 | 4096 | led_OBUF | NULL | NULL | led_OBUF.SI | 2 | 9 | MC_SI_D2 +SPPTERM | 3 | IV_TRUE | slavesel | IV_FALSE | start_shifting | IV_FALSE | shifting2 -SRFF_INSTANCE | diag_OBUF.REG | diag_OBUF | 0 | 1 | 1 +SRFF_INSTANCE | led_OBUF.REG | led_OBUF | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | diag_OBUF.D | 5396 | ? | 0 | 0 | diag_OBUF | NULL | NULL | diag_OBUF.XOR | 0 | 7 | ALU_F +NODE | led_OBUF.D | 4365 | ? | 0 | 0 | led_OBUF | NULL | NULL | led_OBUF.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | diag_OBUF.Q | 5399 | ? | 0 | 0 | diag_OBUF | NULL | NULL | diag_OBUF.REG | 0 | 8 | SRFF_Q +NODE | led_OBUF.Q | 4368 | ? | 0 | 0 | led_OBUF | NULL | NULL | led_OBUF.REG | 0 | 8 | SRFF_Q MACROCELL_INSTANCE | FbkInv+PinTrst+Merge+OptxMapped | cpu_Nirq_OBUFE | spi6502b_COPY_0_COPY_0 | 2155923456 | 1 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | 5045 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | 0 | MC_UIM +NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | 4062 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 0 | 0 | MC_Q -NODE | cpu_Nirq_OBUFE$Q | 5025 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.Q | cpu_Nirq_OBUFE | 0 | 0 | MC_Q +NODE | cpu_Nirq_OBUFE$Q | 4045 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.Q | cpu_Nirq_OBUFE | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 2 | 0 | MC_OE -NODE | cpu_Nirq_OBUFE$OE | 5026 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.BUFOE.OUT | cpu_Nirq_OBUFE | 2 | 0 | MC_OE +NODE | cpu_Nirq_OBUFE$OE | 4046 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.BUFOE.OUT | cpu_Nirq_OBUFE | 2 | 0 | MC_OE SIGNAL_INSTANCE | cpu_Nirq_OBUFE.SI | cpu_Nirq_OBUFE | 0 | 1 | 3 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | 5045 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | 0 | MC_UIM +NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | 4062 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cpu_Nirq_OBUFE.D1 | 5401 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cpu_Nirq_OBUFE.D1 | 4370 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cpu_Nirq_OBUFE.D2 | 5402 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cpu_Nirq_OBUFE.D2 | 4371 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 2 | 9 | MC_SI_D2 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 4 | 9 | MC_SI_TRST -SIGNAL | NODE | cpu_Nirq_OBUFE.TRST | 5404 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | cpu_Nirq_OBUFE.TRST | 4373 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 4 | 9 | MC_SI_TRST SPPTERM | 1 | IV_TRUE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM SRFF_INSTANCE | cpu_Nirq_OBUFE.REG | cpu_Nirq_OBUFE | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cpu_Nirq_OBUFE.D | 5400 | ? | 0 | 0 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.XOR | 0 | 7 | ALU_F +NODE | cpu_Nirq_OBUFE.D | 4369 | ? | 0 | 0 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cpu_Nirq_OBUFE.Q | 5405 | ? | 0 | 0 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.REG | 0 | 8 | SRFF_Q +NODE | cpu_Nirq_OBUFE.Q | 4374 | ? | 0 | 0 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.REG | 0 | 8 | SRFF_Q BUF_INSTANCE | cpu_Nirq_OBUFE.BUFOE | cpu_Nirq_OBUFE | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 10 | CTOR_UNKNOWN -SIGNAL | NODE | cpu_Nirq_OBUFE.TRST | 5404 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 4 | 9 | MC_SI_TRST +SIGNAL | NODE | cpu_Nirq_OBUFE.TRST | 4373 | ? | 0 | 4096 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.SI | 4 | 9 | MC_SI_TRST SPPTERM | 1 | IV_TRUE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM OUTPUT_NODE_TYPE | 0 | 10 | BUF_OUT -NODE | cpu_Nirq_OBUFE.BUFOE.OUT | 5403 | ? | 0 | 0 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.BUFOE | 0 | 10 | BUF_OUT +NODE | cpu_Nirq_OBUFE.BUFOE.OUT | 4372 | ? | 0 | 0 | cpu_Nirq_OBUFE | NULL | NULL | cpu_Nirq_OBUFE.BUFOE | 0 | 10 | BUF_OUT OUTPUT_INSTANCE | 0 | spi_mosi | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_mosi | 4937 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.Q | int_mosi | 0 | 0 | MC_Q +NODE | int_mosi | 3972 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.Q | int_mosi | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_mosi$OE | 4938 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.BUFOE.OUT | int_mosi | 2 | 0 | MC_OE +NODE | int_mosi$OE | 3973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_mosi.BUFOE.OUT | int_mosi | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | spi_mosi | 5027 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_mosi | 0 | 6 | OI_OUT +NODE | spi_mosi | 4047 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_mosi | 0 | 6 | OI_OUT -OUTPUT_INSTANCE | 0 | spi_Nsel<0> | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 +OUTPUT_INSTANCE | 0 | spi_Nsel | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | slavesel<0>$Q | 4940 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<0>.Q | slavesel<0> | 0 | 0 | MC_Q +NODE | slavesel$Q | 3975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel.Q | slavesel | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | spi_Nsel<0> | 5028 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_Nsel<0> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | spi_Nsel<1> | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | slavesel<1>$Q | 4942 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<1>.Q | slavesel<1> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | spi_Nsel<1> | 5029 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_Nsel<1> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | spi_Nsel<2> | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | slavesel<2>$Q | 4944 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<2>.Q | slavesel<2> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | spi_Nsel<2> | 5030 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_Nsel<2> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | spi_Nsel<3> | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | slavesel<3>$Q | 4946 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slavesel<3>.Q | slavesel<3> | 0 | 0 | MC_Q -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | spi_Nsel<3> | 5031 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_Nsel<3> | 0 | 6 | OI_OUT +NODE | spi_Nsel | 4048 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_Nsel | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | spi_sclk | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_sclk | 4969 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_sclk.Q | int_sclk | 0 | 0 | MC_Q +NODE | int_sclk | 3996 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_sclk.Q | int_sclk | 0 | 0 | MC_Q OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | spi_sclk | 5032 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_sclk | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | cpu_d<0> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<0> | 4987 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.Q | int_dout<0> | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<0>$OE | 4988 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.BUFOE.OUT | int_dout<0> | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<0> | 5033 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<0> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | cpu_d<1> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<1> | 4989 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.Q | int_dout<1> | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<1>$OE | 4990 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.BUFOE.OUT | int_dout<1> | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<1> | 5034 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<1> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | cpu_d<2> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<2> | 4991 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.Q | int_dout<2> | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<2>$OE | 4992 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.BUFOE.OUT | int_dout<2> | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<2> | 5035 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<2> | 0 | 6 | OI_OUT +NODE | spi_sclk | 4049 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_sclk | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | cpu_d<3> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<3> | 4993 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.Q | int_dout<3> | 0 | 0 | MC_Q +NODE | int_dout<3> | 3998 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.Q | int_dout<3> | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<3>$OE | 4994 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.BUFOE.OUT | int_dout<3> | 2 | 0 | MC_OE +NODE | int_dout<3>$OE | 3999 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<3>.BUFOE.OUT | int_dout<3> | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<3> | 5036 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<3> | 0 | 6 | OI_OUT - -OUTPUT_INSTANCE | 0 | cpu_d<4> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 -INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<4> | 4995 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.Q | int_dout<4> | 0 | 0 | MC_Q -INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<4>$OE | 4996 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.BUFOE.OUT | int_dout<4> | 2 | 0 | MC_OE -OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<4> | 5037 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<4> | 0 | 6 | OI_OUT +NODE | cpu_d<3> | 4050 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<3> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | cpu_d<5> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<5> | 4997 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.Q | int_dout<5> | 0 | 0 | MC_Q +NODE | int_dout<5> | 4000 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.Q | int_dout<5> | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<5>$OE | 4998 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.BUFOE.OUT | int_dout<5> | 2 | 0 | MC_OE +NODE | int_dout<5>$OE | 4001 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<5>.BUFOE.OUT | int_dout<5> | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<5> | 5038 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<5> | 0 | 6 | OI_OUT +NODE | cpu_d<5> | 4051 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<5> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | cpu_d<6> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<6> | 4999 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.Q | int_dout<6> | 0 | 0 | MC_Q +NODE | int_dout<6> | 4002 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.Q | int_dout<6> | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<6>$OE | 5000 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.BUFOE.OUT | int_dout<6> | 2 | 0 | MC_OE +NODE | int_dout<6>$OE | 4003 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<6>.BUFOE.OUT | int_dout<6> | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<6> | 5039 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<6> | 0 | 6 | OI_OUT +NODE | cpu_d<6> | 4052 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<6> | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | cpu_d<7> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | int_dout<7> | 5001 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.Q | int_dout<7> | 0 | 0 | MC_Q +NODE | int_dout<7> | 4004 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.Q | int_dout<7> | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | int_dout<7>$OE | 5002 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.BUFOE.OUT | int_dout<7> | 2 | 0 | MC_OE +NODE | int_dout<7>$OE | 4005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<7>.BUFOE.OUT | int_dout<7> | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_d<7> | 5040 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<7> | 0 | 6 | OI_OUT +NODE | cpu_d<7> | 4053 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<7> | 0 | 6 | OI_OUT -OUTPUT_INSTANCE | 0 | diag | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 +OUTPUT_INSTANCE | 0 | cpu_d<0> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | diag_OBUF | 5024 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | diag_OBUF.Q | diag_OBUF | 0 | 0 | MC_Q +NODE | int_dout<0> | 4021 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.Q | int_dout<0> | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | int_dout<0>$OE | 4022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<0>.BUFOE.OUT | int_dout<0> | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | diag | 5041 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | diag | 0 | 6 | OI_OUT +NODE | cpu_d<0> | 4054 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<0> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | cpu_d<1> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | int_dout<1> | 4023 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.Q | int_dout<1> | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | int_dout<1>$OE | 4024 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<1>.BUFOE.OUT | int_dout<1> | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | cpu_d<1> | 4055 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<1> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | cpu_d<2> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | int_dout<2> | 4025 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.Q | int_dout<2> | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | int_dout<2>$OE | 4026 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<2>.BUFOE.OUT | int_dout<2> | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | cpu_d<2> | 4056 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<2> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | cpu_d<4> | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | int_dout<4> | 4027 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.Q | int_dout<4> | 0 | 0 | MC_Q +INPUT_NODE_TYPE | 2 | 6 | OI_OE +NODE | int_dout<4>$OE | 4028 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | int_dout<4>.BUFOE.OUT | int_dout<4> | 2 | 0 | MC_OE +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | cpu_d<4> | 4057 | PIPO | 0 | 64 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_d<4> | 0 | 6 | OI_OUT + +OUTPUT_INSTANCE | 0 | led | spi6502b_COPY_0_COPY_0 | 7 | 1 | 1 +INPUT_NODE_TYPE | 0 | 6 | OI_IN +NODE | led_OBUF | 4044 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | led_OBUF.Q | led_OBUF | 0 | 0 | MC_Q +OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT +NODE | led | 4058 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | led | 0 | 6 | OI_OUT OUTPUT_INSTANCE | 0 | cpu_Nirq | spi6502b_COPY_0_COPY_0 | 7 | 2 | 1 INPUT_NODE_TYPE | 0 | 6 | OI_IN -NODE | cpu_Nirq_OBUFE$Q | 5025 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.Q | cpu_Nirq_OBUFE | 0 | 0 | MC_Q +NODE | cpu_Nirq_OBUFE$Q | 4045 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.Q | cpu_Nirq_OBUFE | 0 | 0 | MC_Q INPUT_NODE_TYPE | 2 | 6 | OI_OE -NODE | cpu_Nirq_OBUFE$OE | 5026 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.BUFOE.OUT | cpu_Nirq_OBUFE | 2 | 0 | MC_OE +NODE | cpu_Nirq_OBUFE$OE | 4046 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE.BUFOE.OUT | cpu_Nirq_OBUFE | 2 | 0 | MC_OE OUTPUT_NODE_TYPE | 0 | 6 | OI_OUT -NODE | cpu_Nirq | 5042 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nirq | 0 | 6 | OI_OUT +NODE | cpu_Nirq | 4059 | PO | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nirq | 0 | 6 | OI_OUT MACROCELL_INSTANCE | SoftPfbk | $OpTx$INV$22__$INT | spi6502b_COPY_0_COPY_0 | 2181038080 | 5 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ece | 4949 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM +NODE | ece | 3978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | extclk_IBUF | 5023 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | extclk_IBUF | 0 | 5 | II_IMUX +NODE | extclk_IBUF | 4043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | extclk_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | $OpTx$INV$22__$INT.UIM | 5043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM +NODE | $OpTx$INV$22__$INT.UIM | 4060 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | $OpTx$INV$22__$INT.Q | $OpTx$INV$22__$INT | 1 | 0 | MC_UIM SIGNAL_INSTANCE | $OpTx$INV$22__$INT.SI | $OpTx$INV$22__$INT | 0 | 5 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ece | 4949 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM +NODE | ece | 3978 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ece.Q | ece | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nphi2_IBUF | 5022 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nphi2_IBUF | 4042 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nphi2_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | extclk_IBUF | 5023 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | extclk_IBUF | 0 | 5 | II_IMUX +NODE | extclk_IBUF | 4043 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | extclk_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | start_shifting | 4975 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM +NODE | start_shifting | 4011 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting.Q | start_shifting | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | $OpTx$INV$22__$INT.D1 | 5407 | ? | 0 | 4096 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | $OpTx$INV$22__$INT.D1 | 4376 | ? | 0 | 4096 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | $OpTx$INV$22__$INT.D2 | 5408 | ? | 0 | 4096 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | $OpTx$INV$22__$INT.D2 | 4377 | ? | 0 | 4096 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | ece | IV_FALSE | extclk_IBUF SPPTERM | 2 | IV_FALSE | ece | IV_FALSE | cpu_Nphi2_IBUF SPPTERM | 2 | IV_FALSE | start_shifting | IV_FALSE | shifting2 SRFF_INSTANCE | $OpTx$INV$22__$INT.REG | $OpTx$INV$22__$INT | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | $OpTx$INV$22__$INT.D | 5406 | ? | 0 | 0 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.XOR | 0 | 7 | ALU_F +NODE | $OpTx$INV$22__$INT.D | 4375 | ? | 0 | 0 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | $OpTx$INV$22__$INT.Q | 5409 | ? | 0 | 0 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.REG | 0 | 8 | SRFF_Q +NODE | $OpTx$INV$22__$INT.Q | 4378 | ? | 0 | 0 | $OpTx$INV$22__$INT | NULL | NULL | $OpTx$INV$22__$INT.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | SoftPfbk | start_shifting/start_shifting_RSTF__$INT | spi6502b_COPY_0_COPY_0 | 2181038080 | 8 | 2 +MACROCELL_INSTANCE | SoftPfbk | start_shifting/start_shifting_RSTF__$INT | spi6502b_COPY_0_COPY_0 | 2181038080 | 2 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<3> | 4980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<7> | 4984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | start_shifting/start_shifting_RSTF__$INT.UIM | 5044 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.Q | start_shifting/start_shifting_RSTF__$INT | 1 | 0 | MC_UIM -OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | start_shifting/start_shifting_RSTF__$INT.EXP | 5420 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.EXP | start_shifting/start_shifting_RSTF__$INT | 4 | 0 | MC_EXPORT +NODE | start_shifting/start_shifting_RSTF__$INT.UIM | 4061 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | start_shifting/start_shifting_RSTF__$INT.Q | start_shifting/start_shifting_RSTF__$INT | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | start_shifting/start_shifting_RSTF__$INT.SI | start_shifting/start_shifting_RSTF__$INT | 0 | 8 | 3 +SIGNAL_INSTANCE | start_shifting/start_shifting_RSTF__$INT.SI | start_shifting/start_shifting_RSTF__$INT | 0 | 2 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | cpu_Nres_IBUF | 4936 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<3> | 4980 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<7> | 4984 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | start_shifting/start_shifting_RSTF__$INT.D1 | 5411 | ? | 0 | 4096 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | start_shifting/start_shifting_RSTF__$INT.D1 | 4380 | ? | 0 | 4096 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | start_shifting/start_shifting_RSTF__$INT.D2 | 5412 | ? | 0 | 4096 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | start_shifting/start_shifting_RSTF__$INT.D2 | 4381 | ? | 0 | 4096 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | cpu_Nres_IBUF | IV_FALSE | shiftdone -OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | start_shifting/start_shifting_RSTF__$INT.EXP | 5418 | ? | 0 | 0 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.SI | 7 | 9 | MC_SI_EXPORT -SPPTERM | 6 | IV_TRUE | shiftcnt<3> | IV_FALSE | shiftcnt<2> | IV_FALSE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<3> | IV_TRUE | shifting2 -SPPTERM | 6 | IV_FALSE | shiftcnt<3> | IV_FALSE | shiftcnt<2> | IV_FALSE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<7> | IV_TRUE | shifting2 SRFF_INSTANCE | start_shifting/start_shifting_RSTF__$INT.REG | start_shifting/start_shifting_RSTF__$INT | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | start_shifting/start_shifting_RSTF__$INT.D | 5410 | ? | 0 | 0 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.XOR | 0 | 7 | ALU_F +NODE | start_shifting/start_shifting_RSTF__$INT.D | 4379 | ? | 0 | 0 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | start_shifting/start_shifting_RSTF__$INT.Q | 5413 | ? | 0 | 0 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.REG | 0 | 8 | SRFF_Q +NODE | start_shifting/start_shifting_RSTF__$INT.Q | 4382 | ? | 0 | 0 | start_shifting/start_shifting_RSTF__$INT | NULL | NULL | start_shifting/start_shifting_RSTF__$INT.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | SoftPfbk | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | spi6502b_COPY_0_COPY_0 | 2181038080 | 10 | 1 +MACROCELL_INSTANCE | SoftPfbk | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | spi6502b_COPY_0_COPY_0 | 2181038080 | 4 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM +NODE | ier | 3981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tc | 4976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM +NODE | tc | 4012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<3> | 4956 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<3>.Q | slaveinten<3> | 1 | 0 | MC_UIM +NODE | slaveinten | 3982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten.Q | slaveinten | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_3_IBUF | 5014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_3_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<2> | 4955 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<2>.Q | slaveinten<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_2_IBUF | 5015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<0> | 4953 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<0>.Q | slaveinten<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_0_IBUF | 5017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_1_IBUF | 5016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_1_IBUF | 0 | 5 | II_IMUX +NODE | spi_int_IBUF | 4041 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 0 | MC_UIM -NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | 5045 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | 0 | MC_UIM +NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | 4062 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | 0 | MC_UIM -SIGNAL_INSTANCE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.SI | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 0 | 10 | 2 +SIGNAL_INSTANCE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.SI | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 0 | 4 | 2 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | ier | 4952 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM +NODE | ier | 3981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | ier.Q | ier | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | tc | 4976 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM +NODE | tc | 4012 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | tc.Q | tc | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<3> | 4956 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<3>.Q | slaveinten<3> | 1 | 0 | MC_UIM +NODE | slaveinten | 3982 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten.Q | slaveinten | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_3_IBUF | 5014 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_3_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<2> | 4955 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<2>.Q | slaveinten<2> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_2_IBUF | 5015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_2_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<0> | 4953 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<0>.Q | slaveinten<0> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_0_IBUF | 5017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_0_IBUF | 0 | 5 | II_IMUX -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | slaveinten<1> | 4954 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | slaveinten<1>.Q | slaveinten<1> | 1 | 0 | MC_UIM -INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spi_int_1_IBUF | 5016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_1_IBUF | 0 | 5 | II_IMUX +NODE | spi_int_IBUF | 4041 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | spi_int_IBUF | 0 | 5 | II_IMUX OUTPUT_NODE_TYPE | 1 | 9 | MC_SI_D1 -SIGNAL | NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.D1 | 5415 | ? | 0 | 4096 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.SI | 1 | 9 | MC_SI_D1 +SIGNAL | NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.D1 | 4384 | ? | 0 | 4096 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.SI | 1 | 9 | MC_SI_D1 SPPTERM | 0 | IV_ZERO OUTPUT_NODE_TYPE | 2 | 9 | MC_SI_D2 -SIGNAL | NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.D2 | 5416 | ? | 0 | 4096 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.SI | 2 | 9 | MC_SI_D2 +SIGNAL | NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.D2 | 4385 | ? | 0 | 4096 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.SI | 2 | 9 | MC_SI_D2 SPPTERM | 2 | IV_TRUE | ier | IV_TRUE | tc -SPPTERM | 2 | IV_TRUE | slaveinten<0> | IV_FALSE | spi_int_0_IBUF -SPPTERM | 2 | IV_TRUE | slaveinten<1> | IV_FALSE | spi_int_1_IBUF -SPPTERM | 2 | IV_TRUE | slaveinten<2> | IV_FALSE | spi_int_2_IBUF -SPPTERM | 2 | IV_TRUE | slaveinten<3> | IV_FALSE | spi_int_3_IBUF +SPPTERM | 2 | IV_TRUE | slaveinten | IV_FALSE | spi_int_IBUF SRFF_INSTANCE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.REG | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 0 | 1 | 1 INPUT_NODE_TYPE | 0 | 8 | SRFF_D -NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.D | 5414 | ? | 0 | 0 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.XOR | 0 | 7 | ALU_F +NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.D | 4383 | ? | 0 | 0 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.XOR | 0 | 7 | ALU_F OUTPUT_NODE_TYPE | 0 | 8 | SRFF_Q -NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | 5417 | ? | 0 | 0 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.REG | 0 | 8 | SRFF_Q +NODE | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.Q | 4386 | ? | 0 | 0 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | NULL | NULL | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.REG | 0 | 8 | SRFF_Q -MACROCELL_INSTANCE | NULL | EXP6_ | spi6502b_COPY_0_COPY_0 | 2147483648 | 9 | 1 +MACROCELL_INSTANCE | NULL | EXP6_ | spi6502b_COPY_0_COPY_0 | 2147483648 | 10 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<0> | 4977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM +NODE | spidataout<0> | 4013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<2> | 4979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM +NODE | spidataout<2> | 4015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<4> | 4981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM +NODE | spidataout<3> | 4016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<6> | 4983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM +NODE | spidataout<4> | 4017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<7> | 4020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT -NODE | EXP6_.EXP | 5421 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP6_.EXP | EXP6_ | 4 | 0 | MC_EXPORT +NODE | EXP6_.EXP | 4389 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP6_.EXP | EXP6_ | 4 | 0 | MC_EXPORT -SIGNAL_INSTANCE | EXP6_.SI | EXP6_ | 0 | 9 | 1 +SIGNAL_INSTANCE | EXP6_.SI | EXP6_ | 0 | 10 | 1 INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<3> | 4970 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM +NODE | shiftcnt<3> | 4006 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<3>.Q | shiftcnt<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<2> | 4971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM +NODE | shiftcnt<2> | 4007 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<2>.Q | shiftcnt<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftcnt<1> | 4973 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM +NODE | shiftcnt<1> | 4009 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<1>.Q | shiftcnt<1> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shiftdone | 4974 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<0> | 4977 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM +NODE | spidataout<0> | 4013 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<0>.Q | spidataout<0> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | shifting2 | 5005 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<2> | 4979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM +NODE | spidataout<2> | 4015 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<2>.Q | spidataout<2> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<4> | 4981 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM +NODE | spidataout<3> | 4016 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<3>.Q | spidataout<3> | 1 | 0 | MC_UIM INPUT_NODE_TYPE | 1 | 100 | NOTYPE -NODE | spidataout<6> | 4983 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<6>.Q | spidataout<6> | 1 | 0 | MC_UIM +NODE | spidataout<4> | 4017 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<4>.Q | spidataout<4> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | spidataout<7> | 4020 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | spidataout<7>.Q | spidataout<7> | 1 | 0 | MC_UIM OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT -SIGNAL | NODE | EXP6_.EXP | 5419 | ? | 0 | 0 | EXP6_ | NULL | NULL | EXP6_.SI | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP6_.EXP | 4387 | ? | 0 | 0 | EXP6_ | NULL | NULL | EXP6_.SI | 7 | 9 | MC_SI_EXPORT SPPTERM | 6 | IV_TRUE | shiftcnt<3> | IV_TRUE | shiftcnt<2> | IV_TRUE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<0> | IV_TRUE | shifting2 SPPTERM | 6 | IV_TRUE | shiftcnt<3> | IV_FALSE | shiftcnt<2> | IV_TRUE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<2> | IV_TRUE | shifting2 +SPPTERM | 6 | IV_TRUE | shiftcnt<3> | IV_FALSE | shiftcnt<2> | IV_FALSE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<3> | IV_TRUE | shifting2 SPPTERM | 6 | IV_FALSE | shiftcnt<3> | IV_TRUE | shiftcnt<2> | IV_TRUE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<4> | IV_TRUE | shifting2 -SPPTERM | 6 | IV_FALSE | shiftcnt<3> | IV_FALSE | shiftcnt<2> | IV_TRUE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<6> | IV_TRUE | shifting2 +SPPTERM | 6 | IV_FALSE | shiftcnt<3> | IV_FALSE | shiftcnt<2> | IV_FALSE | shiftcnt<1> | IV_FALSE | shiftdone | IV_FALSE | spidataout<7> | IV_TRUE | shifting2 + +MACROCELL_INSTANCE | NULL | EXP7_ | spi6502b_COPY_0_COPY_0 | 2147483648 | 5 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 4 | 0 | MC_EXPORT +NODE | EXP7_.EXP | 4392 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | EXP7_.EXP | EXP7_ | 4 | 0 | MC_EXPORT + +SIGNAL_INSTANCE | EXP7_.SI | EXP7_ | 0 | 5 | 1 +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpu_Nres_IBUF | 3971 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | NULL | cpu_Nres_IBUF | 0 | 5 | II_IMUX +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | cpha | 3979 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | cpha.Q | cpha | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftcnt<0> | 4008 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftcnt<0>.Q | shiftcnt<0> | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shiftdone | 4010 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shiftdone.Q | shiftdone | 1 | 0 | MC_UIM +INPUT_NODE_TYPE | 1 | 100 | NOTYPE +NODE | shifting2 | 4032 | ? | 0 | 0 | spi6502b_COPY_0_COPY_0 | NULL | shifting2.Q | shifting2 | 1 | 0 | MC_UIM +OUTPUT_NODE_TYPE | 7 | 9 | MC_SI_EXPORT +SIGNAL | NODE | EXP7_.EXP | 4391 | ? | 0 | 0 | EXP7_ | NULL | NULL | EXP7_.SI | 7 | 9 | MC_SI_EXPORT +SPPTERM | 5 | IV_TRUE | cpu_Nres_IBUF | IV_TRUE | cpha | IV_FALSE | shiftcnt<0> | IV_FALSE | shiftdone | IV_TRUE | shifting2 FB_INSTANCE | FOOBAR1_ | spi6502b_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | spidataout<3> | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | spidataout<2> | 1 | spi_int_3_IBUF | 0 | NULL | 0 | 1 | 49152 +FBPIN | 2 | spidataout<2> | 1 | NULL | 0 | NULL | 0 | 1 | 49152 FBPIN | 3 | spidataout<1> | 1 | NULL | 0 | NULL | 0 FBPIN | 4 | spidataout<0> | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | int_dout<0> | 1 | N3455 | 1 | cpu_d<0> | 1 | 2 | 49152 -FBPIN | 6 | int_dout<1> | 1 | N3457 | 1 | cpu_d<1> | 1 | 3 | 49152 +FBPIN | 5 | int_dout<0> | 1 | N2889 | 1 | cpu_d<0> | 1 | 2 | 49152 +FBPIN | 6 | int_dout<1> | 1 | N2891 | 1 | cpu_d<1> | 1 | 3 | 49152 FBPIN | 7 | tmo | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | int_dout<2> | 1 | N3459 | 1 | cpu_d<2> | 1 | 4 | 49152 -FBPIN | 9 | slaveinten<0> | 1 | cpu_Nphi2_IBUF | 0 | NULL | 0 | 5 | 57344 +FBPIN | 8 | int_dout<2> | 1 | N2893 | 1 | cpu_d<2> | 1 | 4 | 49152 +FBPIN | 9 | slaveinten | 1 | cpu_Nphi2_IBUF | 0 | NULL | 0 | 5 | 57344 FBPIN | 10 | frx | 1 | NULL | 0 | NULL | 0 FBPIN | 11 | ece | 1 | extclk_IBUF | 0 | NULL | 0 | 6 | 57344 FBPIN | 12 | divisor<2> | 1 | NULL | 0 | NULL | 0 FBPIN | 13 | divisor<1> | 1 | NULL | 0 | NULL | 0 FBPIN | 14 | divisor<0> | 1 | cpu_rnw_IBUF | 0 | NULL | 0 | 7 | 57344 -FBPIN | 15 | int_dout<3> | 1 | N3461 | 1 | cpu_d<3> | 1 | 8 | 49152 +FBPIN | 15 | int_dout<3> | 1 | N2895 | 1 | cpu_d<3> | 1 | 8 | 49152 FBPIN | 16 | cpol | 1 | NULL | 0 | NULL | 0 -FBPIN | 17 | int_dout<4> | 1 | N3463 | 1 | cpu_d<4> | 1 | 9 | 49152 +FBPIN | 17 | int_dout<4> | 1 | N2897 | 1 | cpu_d<4> | 1 | 9 | 49152 FBPIN | 18 | cpha | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR2_ | spi6502b_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | start_shifting/start_shifting_RSTF__$INT | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | EXP6_ | 1 | NULL | 0 | NULL | 0 FBPIN | 2 | int_mosi | 1 | NULL | 0 | spi_mosi | 1 | 35 | 49152 -FBPIN | 3 | EXP6_ | 1 | NULL | 0 | NULL | 0 -FBPIN | 6 | NULL | 0 | spi_miso_3_IBUF | 0 | NULL | 0 | 37 | 49152 -FBPIN | 8 | NULL | 0 | spi_miso_2_IBUF | 0 | NULL | 0 | 38 | 49152 -FBPIN | 9 | NULL | 0 | spi_int_2_IBUF | 0 | NULL | 0 | 39 | 51200 -FBPIN | 11 | NULL | 0 | spi_int_1_IBUF | 0 | NULL | 0 | 40 | 53248 -FBPIN | 14 | NULL | 0 | spi_int_0_IBUF | 0 | NULL | 0 | 42 | 53248 -FBPIN | 15 | NULL | 0 | spi_miso_1_IBUF | 0 | NULL | 0 | 43 | 49152 -FBPIN | 17 | NULL | 0 | spi_miso_0_IBUF | 0 | NULL | 0 | 44 | 49152 +FBPIN | 3 | shifting2 | 1 | NULL | 0 | NULL | 0 +FBPIN | 4 | shiftdone | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | shiftcnt<0> | 1 | NULL | 0 | NULL | 0 | 36 | 49152 +FBPIN | 6 | $OpTx$INV$22__$INT | 1 | NULL | 0 | NULL | 0 | 37 | 49152 +FBPIN | 7 | spidatain<7> | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | spidatain<6> | 1 | NULL | 0 | NULL | 0 | 38 | 49152 +FBPIN | 9 | spidatain<5> | 1 | NULL | 0 | NULL | 0 | 39 | 51200 +FBPIN | 10 | spidatain<4> | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | spidatain<3> | 1 | NULL | 0 | NULL | 0 | 40 | 53248 +FBPIN | 12 | spidatain<2> | 1 | NULL | 0 | NULL | 0 +FBPIN | 13 | spidatain<1> | 1 | NULL | 0 | NULL | 0 +FBPIN | 14 | spidatain<0> | 1 | spi_int_IBUF | 0 | NULL | 0 | 42 | 53248 +FBPIN | 15 | shiftcnt<3> | 1 | NULL | 0 | NULL | 0 | 43 | 49152 +FBPIN | 16 | shiftcnt<2> | 1 | NULL | 0 | NULL | 0 +FBPIN | 17 | shiftcnt<1> | 1 | spi_miso_IBUF | 0 | NULL | 0 | 44 | 49152 +FBPIN | 18 | start_shifting/start_shifting_RSTF__$INT | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | FOOBAR3_ | spi6502b_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | shifting2 | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | int_dout<5> | 1 | N3465 | 1 | cpu_d<5> | 1 | 11 | 49152 -FBPIN | 3 | shiftdone | 1 | NULL | 0 | NULL | 0 -FBPIN | 4 | $OpTx$INV$22__$INT | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | int_dout<6> | 1 | N3467 | 1 | cpu_d<6> | 1 | 12 | 49152 -FBPIN | 6 | start_shifting | 1 | NULL | 0 | NULL | 0 -FBPIN | 7 | spidatain<7> | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | int_dout<7> | 1 | N3469 | 1 | cpu_d<7> | 1 | 13 | 49152 +FBPIN | 2 | int_dout<5> | 1 | N2899 | 1 | cpu_d<5> | 1 | 11 | 49152 +FBPIN | 5 | int_dout<6> | 1 | N2901 | 1 | cpu_d<6> | 1 | 12 | 49152 +FBPIN | 8 | int_dout<7> | 1 | N2903 | 1 | cpu_d<7> | 1 | 13 | 49152 FBPIN | 9 | cpu_Nirq_OBUFE | 1 | NULL | 0 | cpu_Nirq | 1 | 14 | 49152 -FBPIN | 10 | spidatain<6> | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | spidatain<5> | 1 | Ncs2_IBUF | 0 | NULL | 0 | 18 | 49152 -FBPIN | 12 | spidatain<4> | 1 | NULL | 0 | NULL | 0 -FBPIN | 13 | spidatain<3> | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | spidatain<2> | 1 | cpu_Nres_IBUF | 0 | NULL | 0 | 19 | 49152 -FBPIN | 15 | spidatain<1> | 1 | cs1_IBUF | 0 | NULL | 0 | 20 | 49152 -FBPIN | 16 | shiftcnt<3> | 1 | cpu_a_1_IBUF | 0 | NULL | 0 | 24 | 49152 -FBPIN | 17 | shiftcnt<2> | 1 | cpu_a_0_IBUF | 0 | NULL | 0 | 22 | 49152 -FBPIN | 18 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | NULL | 0 | Ncs2_IBUF | 0 | NULL | 0 | 18 | 49152 +FBPIN | 14 | NULL | 0 | cpu_Nres_IBUF | 0 | NULL | 0 | 19 | 49152 +FBPIN | 15 | NULL | 0 | cs1_IBUF | 0 | NULL | 0 | 20 | 49152 +FBPIN | 16 | NULL | 0 | cpu_a_1_IBUF | 0 | NULL | 0 | 24 | 49152 +FBPIN | 17 | NULL | 0 | cpu_a_0_IBUF | 0 | NULL | 0 | 22 | 49152 FB_INSTANCE | FOOBAR4_ | spi6502b_COPY_0_COPY_0 | 0 | 0 | 0 -FBPIN | 1 | tc | 1 | NULL | 0 | NULL | 0 -FBPIN | 2 | slavesel<3> | 1 | NULL | 0 | spi_Nsel<3> | 1 | 25 | 49152 -FBPIN | 3 | shiftcnt<0> | 1 | NULL | 0 | NULL | 0 +FBPIN | 1 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST | 1 | NULL | 0 | NULL | 0 +FBPIN | 2 | tc | 1 | NULL | 0 | NULL | 0 | 25 | 49152 +FBPIN | 3 | start_shifting | 1 | NULL | 0 | NULL | 0 FBPIN | 4 | spidataout<7> | 1 | NULL | 0 | NULL | 0 -FBPIN | 5 | slavesel<2> | 1 | NULL | 0 | spi_Nsel<2> | 1 | 26 | 49152 -FBPIN | 6 | spidataout<6> | 1 | NULL | 0 | NULL | 0 -FBPIN | 7 | spidataout<5> | 1 | NULL | 0 | NULL | 0 -FBPIN | 8 | slavesel<1> | 1 | NULL | 0 | spi_Nsel<1> | 1 | 27 | 49152 -FBPIN | 9 | spidataout<4> | 1 | NULL | 0 | NULL | 0 -FBPIN | 10 | shiftcnt<1> | 1 | NULL | 0 | NULL | 0 -FBPIN | 11 | slavesel<0> | 1 | NULL | 0 | spi_Nsel<0> | 1 | 28 | 49152 -FBPIN | 12 | slaveinten<3> | 1 | NULL | 0 | NULL | 0 -FBPIN | 13 | slaveinten<2> | 1 | NULL | 0 | NULL | 0 -FBPIN | 14 | diag_OBUF | 1 | NULL | 0 | diag | 1 | 29 | 49152 -FBPIN | 15 | slaveinten<1> | 1 | NULL | 0 | NULL | 0 | 33 | 49152 -FBPIN | 16 | ier | 1 | NULL | 0 | NULL | 0 +FBPIN | 5 | spidataout<6> | 1 | NULL | 0 | NULL | 0 | 26 | 49152 +FBPIN | 6 | spidataout<5> | 1 | NULL | 0 | NULL | 0 +FBPIN | 7 | spidataout<4> | 1 | NULL | 0 | NULL | 0 +FBPIN | 8 | spidataout<3> | 1 | NULL | 0 | NULL | 0 | 27 | 49152 +FBPIN | 9 | ier | 1 | NULL | 0 | NULL | 0 +FBPIN | 11 | slavesel | 1 | NULL | 0 | spi_Nsel | 1 | 28 | 49152 +FBPIN | 14 | led_OBUF | 1 | NULL | 0 | led | 1 | 29 | 49152 +FBPIN | 16 | EXP7_ | 1 | NULL | 0 | NULL | 0 FBPIN | 17 | int_sclk | 1 | NULL | 0 | spi_sclk | 1 | 34 | 49152 -FBPIN | 18 | spidatain<0> | 1 | NULL | 0 | NULL | 0 FB_INSTANCE | INPUTPINS_FOOBAR5_ | spi6502b_COPY_0_COPY_0 | 0 | 0 | 0 BUSINFO | CPU_A<1:0> | 2 | 0 | 0 | cpu_a<0> | 1 | cpu_a<1> | 0 BUSINFO | CPU_D<7:0> | 8 | 0 | 2 | cpu_d<0> | 7 | cpu_d<1> | 6 | cpu_d<2> | 5 | cpu_d<3> | 4 | cpu_d<4> | 3 | cpu_d<5> | 2 | cpu_d<6> | 1 | cpu_d<7> | 0 -BUSINFO | SPI_INT<3:0> | 4 | 0 | 0 | spi_int<0> | 3 | spi_int<1> | 2 | spi_int<2> | 1 | spi_int<3> | 0 -BUSINFO | SPI_MISO<3:0> | 4 | 0 | 0 | spi_miso<0> | 3 | spi_miso<1> | 2 | spi_miso<2> | 1 | spi_miso<3> | 0 -BUSINFO | SPI_NSEL<3:0> | 4 | 0 | 1 | spi_Nsel<0> | 3 | spi_Nsel<1> | 2 | spi_Nsel<2> | 1 | spi_Nsel<3> | 0 -FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | spidataout<3> | NULL | 1 | spidataout<2> | NULL | 2 | spidataout<1> | NULL | 3 | spidataout<0> | NULL | 4 | cpu_d<3> | 8 -FB_ORDER_OF_INPUTS | FOOBAR1_ | 5 | Ncs2 | 18 | 6 | tmo | NULL | 8 | spi_int<0> | 42 | 10 | slavesel<0> | NULL | 11 | divisor<2> | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 12 | divisor<1> | NULL | 13 | divisor<0> | NULL | 15 | cs1 | 20 | 17 | spidatain<0> | NULL | 18 | slavesel<3> | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 22 | slavesel<2> | NULL | 26 | spidatain<4> | NULL | 29 | cpu_d<0> | 2 | 31 | cpu_rnw | 7 | 32 | slavesel<1> | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 33 | cpu_d<1> | 3 | 36 | cpu_a<0> | 22 | 39 | cpu_a<1> | 24 | 40 | cpu_d<2> | 4 | 41 | slaveinten<0> | NULL -FB_ORDER_OF_INPUTS | FOOBAR1_ | 42 | spidatain<3> | NULL | 43 | cpha | NULL | 44 | cpu_d<4> | 9 | 45 | frx | NULL | 46 | cpu_Nres | 19 -FB_ORDER_OF_INPUTS | FOOBAR1_ | 48 | spidatain<2> | NULL | 50 | ece | NULL | 51 | spidatain<1> | NULL | 52 | cpol | NULL | 53 | cpu_Nphi2 | 5 +FB_ORDER_OF_INPUTS | FOOBAR1_ | 0 | cpu_rnw | 7 | 1 | spidataout<2> | NULL | 3 | spidataout<0> | NULL | 5 | Ncs2 | 18 | 6 | tmo | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 8 | spi_int | 42 | 9 | spidatain<4> | NULL | 10 | slavesel | NULL | 11 | spidatain<2> | NULL | 13 | cpu_a<0> | 22 +FB_ORDER_OF_INPUTS | FOOBAR1_ | 15 | cpol | NULL | 17 | cpu_Nres | 19 | 19 | cpu_d<2> | 4 | 20 | cpu_d<0> | 2 | 21 | spidatain<3> | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 24 | cs1 | 20 | 26 | divisor<1> | NULL | 28 | slaveinten | NULL | 29 | spidatain<0> | NULL | 30 | divisor<0> | NULL +FB_ORDER_OF_INPUTS | FOOBAR1_ | 33 | cpu_d<1> | 3 | 36 | spidatain<1> | NULL | 37 | spidataout<1> | NULL | 38 | divisor<2> | NULL | 39 | cpu_a<1> | 24 +FB_ORDER_OF_INPUTS | FOOBAR1_ | 43 | cpha | NULL | 44 | cpu_d<4> | 9 | 45 | frx | NULL | 50 | ece | NULL | 51 | cpu_Nphi2 | 5 +FB_ORDER_OF_INPUTS | FOOBAR1_ | 53 | cpu_d<3> | 8 -FB_IMUX_INDEX | FOOBAR1_ | 0 | 1 | 2 | 3 | 130 | 131 | 6 | -1 | 98 | -1 | 64 | 11 | 12 | 13 | -1 | 123 | -1 | 71 | 55 | -1 | -1 | -1 | 58 | -1 | -1 | -1 | 47 | -1 | -1 | 108 | -1 | 126 | 61 | 110 | -1 | -1 | 121 | -1 | -1 | 111 | 114 | 8 | 48 | 17 | 132 | 9 | 125 | -1 | 49 | -1 | 10 | 50 | 15 | 120 +FB_IMUX_INDEX | FOOBAR1_ | 126 | 1 | -1 | 3 | -1 | 131 | 6 | -1 | 98 | 27 | 64 | 29 | -1 | 121 | -1 | 15 | -1 | 125 | -1 | 114 | 108 | 28 | -1 | -1 | 123 | -1 | 12 | -1 | 8 | 31 | 13 | -1 | -1 | 110 | -1 | -1 | 30 | 2 | 11 | 111 | -1 | -1 | -1 | 17 | 132 | 9 | -1 | -1 | -1 | -1 | 10 | 120 | -1 | 130 -FB_ORDER_OF_INPUTS | FOOBAR2_ | 3 | $OpTx$INV$22__$INT.UIM | NULL | 8 | spidataout<4> | NULL | 16 | shiftcnt<2> | NULL | 17 | cpu_Nres | 19 | 30 | spidataout<6> | NULL -FB_ORDER_OF_INPUTS | FOOBAR2_ | 33 | spidataout<3> | NULL | 35 | shifting2 | NULL | 36 | shiftcnt<3> | NULL | 37 | spidataout<1> | NULL | 39 | tmo | NULL -FB_ORDER_OF_INPUTS | FOOBAR2_ | 44 | spidataout<2> | NULL | 45 | shiftdone | NULL | 46 | spidataout<0> | NULL | 48 | spidataout<7> | NULL | 49 | spidataout<5> | NULL -FB_ORDER_OF_INPUTS | FOOBAR2_ | 50 | shiftcnt<1> | NULL +FB_ORDER_OF_INPUTS | FOOBAR2_ | 1 | spidataout<2> | NULL | 2 | start_shifting | NULL | 3 | spidataout<7> | NULL | 4 | spidataout<6> | NULL | 5 | spidataout<5> | NULL +FB_ORDER_OF_INPUTS | FOOBAR2_ | 6 | tmo | NULL | 7 | spidataout<3> | NULL | 9 | spidatain<4> | NULL | 10 | slavesel | NULL | 11 | spidatain<2> | NULL +FB_ORDER_OF_INPUTS | FOOBAR2_ | 13 | spidatain<0> | NULL | 14 | shiftcnt<3> | NULL | 16 | shiftcnt<1> | NULL | 17 | cpu_Nres | 19 | 18 | shiftdone | NULL +FB_ORDER_OF_INPUTS | FOOBAR2_ | 19 | spi_miso | 44 | 20 | shiftcnt<0> | NULL | 21 | spidatain<3> | NULL | 24 | spidatain<6> | NULL | 25 | shifting2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR2_ | 26 | $OpTx$INV$22__$INT.UIM | NULL | 29 | spidataout<1> | NULL | 32 | spidatain<5> | NULL | 36 | spidatain<1> | NULL | 39 | spidataout<4> | NULL +FB_ORDER_OF_INPUTS | FOOBAR2_ | 44 | shiftcnt<2> | NULL | 46 | spidataout<0> | NULL | 48 | extclk | 6 | 50 | ece | NULL | 51 | cpu_Nphi2 | 5 -FB_IMUX_INDEX | FOOBAR2_ | -1 | -1 | -1 | 39 | -1 | -1 | -1 | -1 | 62 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 52 | 125 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 59 | -1 | -1 | 0 | -1 | 36 | 51 | 2 | -1 | 6 | -1 | -1 | -1 | -1 | 1 | 38 | 3 | -1 | 57 | 60 | 63 | -1 | -1 | -1 +FB_IMUX_INDEX | FOOBAR2_ | -1 | 1 | 56 | 57 | 58 | 59 | 6 | 61 | -1 | 27 | 64 | 29 | -1 | 31 | 32 | -1 | 34 | 125 | 21 | 104 | 22 | 28 | -1 | -1 | 25 | 20 | 23 | -1 | -1 | 2 | -1 | -1 | 26 | -1 | -1 | -1 | 30 | -1 | -1 | 60 | -1 | -1 | -1 | -1 | 33 | -1 | 3 | -1 | 122 | -1 | 10 | 120 | -1 | -1 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | start_shifting/start_shifting_RSTF__$INT.UIM | NULL | 2 | spi_int<1> | 40 | 3 | $OpTx$INV$22__$INT.UIM | NULL | 5 | start_shifting | NULL | 6 | spidatain<7> | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 8 | slaveinten<0> | NULL | 9 | frx | NULL | 10 | ece | NULL | 11 | spidatain<4> | NULL | 12 | cpu_Nphi2 | 5 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 13 | spidatain<2> | NULL | 14 | spidatain<1> | NULL | 15 | shiftcnt<3> | NULL | 16 | shiftcnt<2> | NULL | 17 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 20 | shiftcnt<0> | NULL | 24 | cs1 | 20 | 26 | ier | NULL | 27 | slaveinten<1> | NULL | 30 | spi_int<3> | 1 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 31 | cpu_rnw | 7 | 34 | spidatain<3> | NULL | 35 | shifting2 | NULL | 36 | cpu_a<0> | 22 | 39 | cpu_a<1> | 24 -FB_ORDER_OF_INPUTS | FOOBAR3_ | 40 | tc | NULL | 42 | spi_int<0> | 42 | 43 | spidatain<6> | NULL | 44 | slaveinten<3> | NULL | 45 | shiftdone | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 46 | cpu_Nres | 19 | 47 | Ncs2 | 18 | 48 | extclk | 6 | 49 | spidatain<5> | NULL | 50 | shiftcnt<1> | NULL -FB_ORDER_OF_INPUTS | FOOBAR3_ | 51 | slaveinten<2> | NULL | 52 | spi_int<2> | 39 | 53 | spidatain<0> | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 0 | cpu_rnw | 7 | 1 | tc | NULL | 2 | start_shifting | NULL | 5 | Ncs2 | 18 | 6 | spidatain<7> | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 7 | spidatain<6> | NULL | 13 | cpu_a<0> | 22 | 24 | cs1 | 20 | 25 | shifting2 | NULL | 32 | spidatain<5> | NULL +FB_ORDER_OF_INPUTS | FOOBAR3_ | 33 | ier | NULL | 37 | cpu_Nirq_OBUFE/cpu_Nirq_OBUFE_TRST.UIM | NULL | 39 | cpu_a<1> | 24 | 51 | cpu_Nphi2 | 5 -FB_IMUX_INDEX | FOOBAR3_ | 18 | -1 | 92 | 39 | -1 | 41 | 42 | -1 | 8 | 9 | 10 | 47 | 120 | 49 | 50 | 51 | 52 | 53 | -1 | -1 | 56 | -1 | -1 | -1 | 123 | -1 | 69 | 68 | -1 | -1 | 106 | 126 | -1 | -1 | 48 | 36 | 121 | -1 | -1 | 111 | 54 | -1 | 98 | 45 | 65 | 38 | 125 | 131 | 122 | 46 | 63 | 66 | 86 | 71 +FB_IMUX_INDEX | FOOBAR3_ | 126 | 55 | 56 | -1 | -1 | 131 | 24 | 25 | -1 | -1 | -1 | -1 | -1 | 121 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 123 | 20 | -1 | -1 | -1 | -1 | -1 | -1 | 26 | 62 | -1 | -1 | -1 | 54 | -1 | 111 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 120 | -1 | -1 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | shifting2 | NULL | 1 | slavesel<3> | NULL | 2 | shiftdone | NULL | 3 | spidataout<7> | NULL | 4 | slavesel<2> | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 5 | spidataout<6> | NULL | 6 | spidataout<5> | NULL | 7 | slavesel<1> | NULL | 8 | spidataout<4> | NULL | 9 | shiftcnt<1> | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 10 | slavesel<0> | NULL | 11 | slaveinten<3> | NULL | 12 | slaveinten<2> | NULL | 13 | cpu_a<0> | 22 | 14 | slaveinten<1> | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 15 | cpol | NULL | 16 | cpu_d<7> | 13 | 17 | cpu_Nres | 19 | 18 | cpu_a<1> | 24 | 20 | shiftcnt<0> | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 21 | cpu_d<6> | 12 | 23 | cpha | NULL | 24 | cs1 | 20 | 26 | ier | NULL | 28 | spi_miso<3> | 37 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 29 | cpu_d<0> | 2 | 31 | cpu_rnw | 7 | 33 | cpu_d<1> | 3 | 35 | Ncs2 | 18 | 39 | $OpTx$INV$22__$INT.UIM | NULL -FB_ORDER_OF_INPUTS | FOOBAR4_ | 40 | cpu_d<2> | 4 | 42 | cpu_d<5> | 11 | 43 | spi_miso<2> | 38 | 44 | cpu_d<4> | 9 | 45 | spi_miso<1> | 43 -FB_ORDER_OF_INPUTS | FOOBAR4_ | 46 | start_shifting | NULL | 47 | spi_miso<0> | 44 | 53 | cpu_d<3> | 8 +FB_ORDER_OF_INPUTS | FOOBAR4_ | 0 | cpu_rnw | 7 | 1 | tc | NULL | 2 | start_shifting | NULL | 3 | spidataout<7> | NULL | 4 | spidataout<6> | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 5 | Ncs2 | 18 | 6 | spidataout<4> | NULL | 7 | spidataout<3> | NULL | 8 | spi_int | 42 | 9 | frx | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 10 | slavesel | NULL | 13 | cpu_a<0> | 22 | 15 | cpol | NULL | 16 | cpu_d<7> | 13 | 17 | cpu_Nres | 19 +FB_ORDER_OF_INPUTS | FOOBAR4_ | 18 | shiftdone | NULL | 20 | cpu_d<0> | 2 | 21 | cpu_d<6> | 12 | 24 | cs1 | 20 | 25 | shifting2 | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 26 | $OpTx$INV$22__$INT.UIM | NULL | 28 | slaveinten | NULL | 30 | spidataout<5> | NULL | 33 | ier | NULL | 39 | cpu_a<1> | 24 +FB_ORDER_OF_INPUTS | FOOBAR4_ | 40 | shiftcnt<0> | NULL | 42 | cpu_d<5> | 11 | 43 | cpha | NULL | 44 | cpu_d<4> | 9 | 49 | start_shifting/start_shifting_RSTF__$INT.UIM | NULL +FB_ORDER_OF_INPUTS | FOOBAR4_ | 53 | cpu_d<3> | 8 -FB_IMUX_INDEX | FOOBAR4_ | 36 | 55 | 38 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 121 | 68 | 15 | 142 | 125 | 111 | -1 | 56 | 138 | -1 | 17 | 123 | -1 | 69 | -1 | 82 | 108 | -1 | 126 | -1 | 110 | -1 | 131 | -1 | -1 | -1 | 39 | 114 | -1 | 134 | 84 | 132 | 102 | 41 | 104 | -1 | -1 | -1 | -1 | -1 | 130 +FB_IMUX_INDEX | FOOBAR4_ | 126 | 55 | 56 | 57 | 58 | 131 | 60 | 61 | 98 | 9 | 64 | -1 | -1 | 121 | -1 | 15 | 142 | 125 | 21 | -1 | 108 | 138 | -1 | -1 | 123 | 20 | 23 | -1 | 8 | -1 | 59 | -1 | -1 | 62 | -1 | -1 | -1 | -1 | -1 | 111 | 22 | -1 | 134 | 17 | 132 | -1 | -1 | -1 | -1 | 35 | -1 | -1 | -1 | 130 diff --git a/spi6502b.xml b/spi6502b.xml index 3b47ab2..b769fc7 100644 --- a/spi6502b.xml +++ b/spi6502b.xml @@ -1,3 +1,3 @@ -spi6502b.rptC:/Xilinx/xc9500xl/data/xc9572xl.chpspi6502b.mfd
+spi6502b.rptC:/Xilinx/xc9500xl/data/xc9572xl.chpspi6502b.mfd
diff --git a/spi6502b_pad.csv b/spi6502b_pad.csv index 99598ac..84e7d04 100644 --- a/spi6502b_pad.csv +++ b/spi6502b_pad.csv @@ -1,7 +1,7 @@ Release 6.1i - Fit G.38 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved - 5- 6-2017 5:27PM + 5- 6-2017 5:47PM NOTE: This file is designed to be imported into a spreadsheet program such as Microsoft Excel for viewing, printing and sorting. The comma ',' @@ -18,7 +18,7 @@ Pinout by Pin Number: -----,-----,-----,-----,-----,-----,-----,-----,-----,-----, Pin Number,Signal Name,Pin Usage,Pin Name,Direction,IO Standard,IO Bank Number,{blank},Slew Rate,Termination,{blank},Voltage,Constraint, -P1,spi_int<3>,I,I/O,INPUT,,,,,,,,, +P1,TIE,,I/O,,,,,,,,,, P2,cpu_d<0>,I/O,I/O,BIDIR,,,,,,,,, P3,cpu_d<1>,I/O,I/O,BIDIR,,,,,,,,, P4,cpu_d<2>,I/O,I/O,BIDIR,,,,,,,,, @@ -42,11 +42,11 @@ P21,VCC,,VCCINT,,,,,,,,,, P22,cpu_a<0>,I,I/O,INPUT,,,,,,,,, P23,GND,,GND,,,,,,,,,, P24,cpu_a<1>,I,I/O,INPUT,,,,,,,,, -P25,spi_Nsel<3>,O,I/O,OUTPUT,,,,,,,,, -P26,spi_Nsel<2>,O,I/O,OUTPUT,,,,,,,,, -P27,spi_Nsel<1>,O,I/O,OUTPUT,,,,,,,,, -P28,spi_Nsel<0>,O,I/O,OUTPUT,,,,,,,,, -P29,diag,O,I/O,OUTPUT,,,,,,,,, +P25,TIE,,I/O,,,,,,,,,, +P26,TIE,,I/O,,,,,,,,,, +P27,TIE,,I/O,,,,,,,,,, +P28,spi_Nsel,O,I/O,OUTPUT,,,,,,,,, +P29,led,O,I/O,OUTPUT,,,,,,,,, P30,TDO,,TDO,,,,,,,,,, P31,GND,,GND,,,,,,,,,, P32,VCC,,VCCIO,,,,,,,,,, @@ -54,14 +54,14 @@ P33,TIE,,I/O,,,,,,,,,, P34,spi_sclk,O,I/O,OUTPUT,,,,,,,,, P35,spi_mosi,O,I/O,OUTPUT,,,,,,,,, P36,TIE,,I/O,,,,,,,,,, -P37,spi_miso<3>,I,I/O,INPUT,,,,,,,,, -P38,spi_miso<2>,I,I/O,INPUT,,,,,,,,, -P39,spi_int<2>,I,I/O/GSR,INPUT,,,,,,,,, -P40,spi_int<1>,I,I/O/GTS2,INPUT,,,,,,,,, +P37,TIE,,I/O,,,,,,,,,, +P38,TIE,,I/O,,,,,,,,,, +P39,TIE,,I/O/GSR,,,,,,,,,, +P40,TIE,,I/O/GTS2,,,,,,,,,, P41,VCC,,VCCINT,,,,,,,,,, -P42,spi_int<0>,I,I/O/GTS1,INPUT,,,,,,,,, -P43,spi_miso<1>,I,I/O,INPUT,,,,,,,,, -P44,spi_miso<0>,I,I/O,INPUT,,,,,,,,, +P42,spi_int,I,I/O/GTS1,INPUT,,,,,,,,, +P43,TIE,,I/O,,,,,,,,,, +P44,spi_miso,I,I/O,INPUT,,,,,,,,, To preserve the pinout above for future design iterations in Project Navigator simply execute the (Lock Pins) process