Several fixes, binary and srec files added

This commit is contained in:
Unknown 2017-08-11 22:59:02 +02:00
parent de4edffe30
commit 7d67a7b4d5
4 changed files with 601 additions and 516 deletions

BIN
AppleIISd.bin Normal file

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@ -13,7 +13,7 @@
DAT DAT
XC ; enable 65C02 code XC ; enable 65C02 code
DEBUG = 1 DEBUG = 0
DO DEBUG DO DEBUG
ORG $8000 ORG $8000
ELSE ELSE
@ -83,8 +83,8 @@ DUMMY = $FF
FIN FIN
TAX ; X holds now SLOT16 TAX ; X holds now SLOT16
JSR INIT
BIT $CFFF BIT $CFFF
JSR INIT
* *
* TODO: check for init error * TODO: check for init error
@ -404,27 +404,26 @@ GETR3 JSR GETR1 ; get R1 first
* *
******************************** ********************************
BLOCK PHY ; save Y BLOCK PHX ; save X
LDY SLOT PHY ; save Y
LDX SLOT
LDA $46 ; store block num LDA $46 ; store block num
STA R33,Y ; in R30-R33 STA R33,X ; in R30-R33
LDA $47 LDA $47
STA R32,Y STA R32,X
LDA #0 LDA #0
STA R31,Y STA R31,X
STA R30,Y STA R30,X
PHX LDY #9 ; ASL can't be used with Y
LDY #9
LDX SLOT ; ASL can't be done with Y
:LOOP ASL R33,X ; mul block num :LOOP ASL R33,X ; mul block num
ROL R32,X ; by 512 to get ROL R32,X ; by 512 to get
ROL R31,X ; real address ROL R31,X ; real address
ROL R30,X ROL R30,X
DEY DEY
BNE :LOOP BNE :LOOP
PLX
PLY ; restore Y PLY ; restore Y
PLX ; restore X
RTS RTS
@ -460,16 +459,7 @@ COMMAND PHY ; save Y
STA DATA,X ; dummy crc STA DATA,X ; dummy crc
:WAIT2 BIT CTRL,X :WAIT2 BIT CTRL,X
BPL :WAIT2 BPL :WAIT2
:GETR1 LDA #DUMMY JSR GETR1
STA DATA,X ; get R1
:WAIT3 BIT CTRL,X
BPL :WAIT3
LDA DATA,X ; get response
*
* TODO: check for error!
*
CMP #$FE
BNE :GETR1 ; wait for $FE
PLY ; restore Y PLY ; restore Y
RTS RTS
@ -525,13 +515,23 @@ READ JSR BLOCK ; calc block address
LDA #$51 ; send CMD17 LDA #$51 ; send CMD17
JSR COMMAND ; send command JSR COMMAND ; send command
PHY :GETTOK LDA #DUMMY ; get data token
STA DATA,X
:WAIT BIT CTRL,X
BPL :WAIT
LDA DATA,X ; get response
*
* TODO: check for error!
*
CMP #$FE
BNE :GETTOK ; wait for $FE
LDY #2 ; read data from card LDY #2 ; read data from card
:LOOPY STZ WORK :LOOPY STZ WORK
:LOOPW LDA #DUMMY :LOOPW LDA #DUMMY
STA DATA,X STA DATA,X
:WAIT4 BIT CTRL,X :WAIT1 BIT CTRL,X
BPL :WAIT4 BPL :WAIT1
LDA DATA,X LDA DATA,X
STA ($44) STA ($44)
INC $44 INC $44
@ -541,21 +541,12 @@ READ JSR BLOCK ; calc block address
BNE :LOOPW BNE :LOOPW
DEY DEY
BNE :LOOPY BNE :LOOPY
PLY
JSR GETR3 ; read 2 bytes crc JSR GETR3 ; read 2 bytes crc
LDA #SSNONE LDA #SSNONE
STA SS,X ; disable /CS STA SS,X ; disable /CS
CLC ; no error CLC ; no error
LDA #$00 LDA #$00
PLY ; restore Y
RTS
:ERROR LDA #SSNONE
STA SS,X ; disable /CS
SEC ; an error occured
LDA #$27
PLY ; restore Y
RTS RTS
@ -569,27 +560,35 @@ READ JSR BLOCK ; calc block address
* C Clear - No error * C Clear - No error
* Set - Error * Set - Error
* A $00 - No error * A $00 - No error
* $27 - Bad block number * $27 - I/O error or bad block number
* $28 - No card inserted * $28 - No card inserted
* $2B - Card write protected
* *
******************************** ********************************
* TODO: check for card detect and write protect! * TODO: check for card detect and write protect!
WRITE JSR BLOCK ; calc block address WRITE JSR BLOCK ; calc block address
LDA #SS0 ; enable /CS LDA #SS0 ; enable /CS
STA SS,X STA SS,X
LDA #$58 ; send CMD24 LDA #$58 ; send CMD24
JSR COMMAND ; send command JSR COMMAND ; send command
PHY LDA #DUMMY
STA DATA,X ; send dummy
:WAIT1 BIT CTRL,X
BPL :WAIT1
LDA #$FE
STA DATA,X ; send data token
:WAIT2 BIT CTRL,X
BPL :WAIT2
LDY #2 ; send data to card LDY #2 ; send data to card
:LOOPY STZ WORK :LOOPY STZ WORK
:LOOPW LDA ($44) :LOOPW LDA ($44)
STA DATA,X STA DATA,X
:WAIT4 BIT CTRL,X :WAIT3 BIT CTRL,X
BPL :WAIT4 BPL :WAIT3
INC $44 INC $44
BNE :INW BNE :INW
INC $45 ; inc msb on page boundary INC $45 ; inc msb on page boundary
@ -600,17 +599,46 @@ WRITE JSR BLOCK ; calc block address
LDY #2 ; send 2 dummy crc bytes LDY #2 ; send 2 dummy crc bytes
:CRC STA DATA,X :CRC STA DATA,X
:WAIT5 BIT CTRL,X :WAIT4 BIT CTRL,X
BPL :WAIT5 BPL :WAIT4
DEY DEY
BNE :CRC BNE :CRC
PLY
LDA #DUMMY ; get data response
STA DATA,X
:WAIT5 BIT CTRL,X
BPL :WAIT5
LDA DATA,X
AND #$1F
CMP #$05
BNE :ERROR ; check for write error
:WAIT6 LDA #DUMMY ; wait for write cycle
STA DATA,X ; to complete
:WAIT61 BIT CTRL,X
BPL :WAIT61
LDA DATA,X
CMP #$00
BEQ :WAIT6
LDA #SSNONE ; disable /CS LDA #SSNONE ; disable /CS
STA SS,X STA SS,X
CLC ; no error CLC ; no error
LDA #0 LDA #0
PLY RTS
:ERROR
:WAIT7 LDA #DUMMY ; wait for write cycle
STA DATA,X ; to complete
:WAIT71 BIT CTRL,X
BPL :WAIT71
LDA DATA,X
CMP #$00
BEQ :WAIT7
LDA #SSNONE
STA SS,X ; disable /CS
SEC ; an error occured
LDA #$27
RTS RTS

62
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