diff --git a/.gitignore b/.gitignore
index 3096d2b..0d6d309 100644
--- a/.gitignore
+++ b/.gitignore
@@ -219,3 +219,5 @@ VHDL/_pace\.ucf
 VHDL/AppleIISd\.tim
 
 VHDL/AppleIISd\.jed
+
+Firmware/AppleIISd.bin
diff --git a/Binary/AppleIISd.bin b/Binary/AppleIISd.bin
index d0ea522..5f95df8 100644
Binary files a/Binary/AppleIISd.bin and b/Binary/AppleIISd.bin differ
diff --git a/Binary/AppleIISd.hex b/Binary/AppleIISd.hex
index acf1b38..dfa2055 100644
--- a/Binary/AppleIISd.hex
+++ b/Binary/AppleIISd.hex
@@ -1,102 +1,102 @@
 :10000000A220A200A203A20078A960853F203F00A1
 :10001000BABD0001588DF807290F853FA80A0A0AC2
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diff --git a/Binary/Flasher.dsk b/Binary/Flasher.dsk
index 17081ad..9a20d26 100644
Binary files a/Binary/Flasher.dsk and b/Binary/Flasher.dsk differ
diff --git a/Firmware/src/AppleIISd.inc b/Firmware/src/AppleIISd.inc
index 5659e3e..e1838b9 100644
--- a/Firmware/src/AppleIISd.inc
+++ b/Firmware/src/AppleIISd.inc
@@ -48,7 +48,6 @@ KNOWNRTS    :=    $FF58
 OAPPLE      :=    $C061       ; open apple key
 DATA        :=    $C080
 CTRL        :=    DATA+1
-DIV         :=    DATA+2
 SS          :=    DATA+3
 
 ; Constants
diff --git a/Firmware/src/AppleIISd.s b/Firmware/src/AppleIISd.s
index 7e17e4a..c895db1 100644
--- a/Firmware/src/AppleIISd.s
+++ b/Firmware/src/AppleIISd.s
@@ -1,10 +1,10 @@
 ;*******************************
 ;
 ; Apple][Sd Firmware
-; Version 1.2.1
+; Version 1.2.2
 ; Main source
 ;
-; (c) Florian Reitz, 2017 - 2018
+; (c) Florian Reitz, 2017 - 2020
 ;
 ; X register usually contains SLOT16
 ; Y register is used for counting or SLOT
@@ -228,13 +228,9 @@ DRIVER:     CLC               ; ProDOS entry
 ;*******************************
 
             .segment "EXTROM"
-INIT:       LDA   #$03        ; set SPI mode 3
-            STA   CTRL,X
-            LDA   SS,X
-            ORA   #SS0        ; set CS high
+INIT:       STZ   CTRL,X      ; reset SPI controller
+            LDA   #SS0        ; set CS high
             STA   SS,X
-            LDA   #7          ; set 400 kHz
-            STA   DIV,X
             LDY   #10
             LDA   #DUMMY
 
@@ -362,13 +358,13 @@ INIT:       LDA   #$03        ; set SPI mode 3
 @END1:      LDA   SS,X        ; set CS high
             ORA   #SS0
             STA   SS,X
-            LDA   #0          ; set div to 2
-            STA   DIV,X
             TYA               ; retval in A
             RTS
 
 
-TEXT:       .asciiz " Apple][Sd v1.2.1 (c)2018 Florian Reitz "
+TEXT:       .asciiz " Apple][Sd v1.2.2 (c)2020 Florian Reitz"
+            .assert(*-TEXT)=40, error, "TEXT must be 40 bytes long"
+
 
 CMD0:       .byt $40, $00, $00
             .byt $00, $00, $95
diff --git a/README.md b/README.md
index f946d9b..f5cdc73 100644
--- a/README.md
+++ b/README.md
@@ -112,6 +112,8 @@ The control registers of the *AppleIISd* are mapped to the usual I/O space at **
 
 **DATA** SPI data register - Is used for both input and output. When the register is written to, the controller will output the byte on the SPI bus. When it is read from, it reflects the data that was received over the SPI bus.
 
+**PGMEN** Program Enable - Enable programing of the internal firmware eeprom. Should be reset immediately after writing to the device.
+
 **ECE** External Clock Enable - This bit enables the the external clock input to the SPI controller. In the *AppleIISd*, this effectively switches the SPI clock between 500kHz (ECE = 0) and 3.5MHz (ECE = 1).
 
 **FRX** Fast Receive mode - When set to 1, fast receive mode triggers shifting upon reading or writing the SPI Data register. When set to 0, shifting is only triggered by writing the SPI data register.