From 9aa65960c4ea50b0b8f349c8765744fd62a6abb1 Mon Sep 17 00:00:00 2001 From: freitz85 Date: Wed, 1 Nov 2017 16:50:56 +0100 Subject: [PATCH] SPI Mode 3 --- VHDL/AppleIISd.jed | 72 +++++++++++++++++++++--------------------- VHDL/SpiController.vhd | 35 +++----------------- 2 files changed, 41 insertions(+), 66 deletions(-) diff --git a/VHDL/AppleIISd.jed b/VHDL/AppleIISd.jed index b96ae4e..118b25c 100644 --- a/VHDL/AppleIISd.jed +++ b/VHDL/AppleIISd.jed @@ -1,5 +1,5 @@ Programmer Jedec Bit Map -Date Extracted: Mon Oct 23 22:04:22 2017 +Date Extracted: Wed Nov 01 14:24:37 2017 QF46656* QP44* @@ -105,7 +105,7 @@ L0001680 000000 000000 000000 000000* L0001704 000000 000000 000000 000000* L0001728 00000000 00000000 00000000 00000000* L0001760 00000000 00000000 00000000 00000000* -L0001792 00000000 10000000 00000000 00000000* +L0001792 00000000 00000000 00000000 00000000* L0001824 00000000 00000000 00000000 00000000* L0001856 00000000 00000000 00000000 00000000* L0001888 00000000 00000000 00000000 00000000* @@ -114,7 +114,7 @@ L0001952 00000000 00000000 00000000 00000000* L0001984 00000000 00000000 00000000 00000000* L0002016 000000 000000 000000 000000* L0002040 000000 000000 000000 000000* -L0002064 000000 000000 000000 000000* +L0002064 000000 100000 000000 000000* L0002088 000000 000000 000000 000000* L0002112 000000 000000 000000 000000* L0002136 000000 000000 000000 000000* @@ -164,7 +164,7 @@ L0003384 000000 000000 000000 000000* L0003408 000000 000000 000000 000000* L0003432 000000 000000 000000 000000* L0003456 00000000 00000000 00000000 00000000* -L0003488 00000000 00000000 00000000 00000000* +L0003488 00000000 10000000 00000000 00000000* L0003520 10000000 00000000 00000000 00000000* L0003552 00000000 00000000 00000000 00000000* L0003584 00000000 00000000 00000000 00000000* @@ -173,7 +173,7 @@ L0003648 00000000 00000000 00001000 00000000* L0003680 00000000 00000000 00000000 00000000* L0003712 00000000 00000000 00000000 00000000* L0003744 000000 000000 000000 000000* -L0003768 000000 100000 000000 000000* +L0003768 000000 000000 000000 000000* L0003792 000000 000000 000000 000000* L0003816 000000 000000 000000 000000* L0003840 000000 000000 000000 000000* @@ -223,8 +223,8 @@ L0005088 000000 000000 000000 000000* L0005112 000000 000000 000000 000000* L0005136 000000 000000 000011 000000* L0005160 000000 000000 000000 000000* -L0005184 00000011 00000001 00000011 00000011* -L0005216 10000011 10000011 00000011 00000011* +L0005184 00000011 10000001 00000011 00000011* +L0005216 10000011 00000011 00000011 00000011* L0005248 01110011 00000001 01000011 00000011* L0005280 10001011 00000001 00000011 00000011* L0005312 00000011 00000011 00000011 00000011* @@ -290,7 +290,7 @@ L0007008 00000011 00000000 00000011 00000011* L0007040 00000011 00000000 00000011 00000000* L0007072 00000011 00000000 00000011 00000011* L0007104 00000011 00000000 00000001 00000011* -L0007136 00000011 00000000 00000010 00000011* +L0007136 00000011 00000000 00000010 00000010* L0007168 00000011 00000000 00000001 00000011* L0007200 000000 000000 000000 000000* L0007224 000000 000000 000000 000000* @@ -305,7 +305,7 @@ L0007440 00000011 00000000 00000011 00000011* L0007472 00000010 00000000 00000000 00000000* L0007504 00000001 00000000 00000011 00000011* L0007536 00000011 00000000 00000001 00000011* -L0007568 00000000 00000000 01000000 00000001* +L0007568 00000000 00000000 01000000 00000000* L0007600 00000001 00000000 00000001 00000011* L0007632 000000 000000 000000 000000* L0007656 000000 000000 000000 000000* @@ -313,17 +313,17 @@ L0007680 000000 000001 000000 000000* L0007704 000000 000000 000000 000000* L0007728 000000 000000 000000 000000* L0007752 000000 000000 000000 000000* -L0007776 00000011 10000001 00000000 00000001* +L0007776 00000011 00000001 00000000 00000001* L0007808 00000010 00000011 00000000 00000001* L0007840 00000011 00000001 00000000 00000011* L0007872 00000011 00000001 00000010 00000011* L0007904 00000010 00000001 00000000 00000000* L0007936 00000011 00000001 00000001 00000011* L0007968 00000011 00000001 00000011 00000011* -L0008000 00000001 00000001 00000010 00000000* +L0008000 00000001 00000001 00000010 00000001* L0008032 00000011 00000011 00000011 00000011* L0008064 000000 000000 000000 000000* -L0008088 000000 000000 000000 000000* +L0008088 000000 100000 000000 000000* L0008112 000000 000000 000000 000000* L0008136 000000 000000 000000 000000* L0008160 000000 000000 000000 000000* @@ -335,7 +335,7 @@ L0008304 00000011 00000001 00000010 00000010* L0008336 00000010 00000001 00000000 00000000* L0008368 00000001 00000001 00000101 00000010* L0008400 00000011 00000001 00000111 00000010* -L0008432 00100000 00000001 00000000 00000000* +L0008432 00100000 00000001 00000000 00000001* L0008464 00000001 00000011 00000011 00000011* L0008496 000000 000000 000000 000000* L0008520 000000 000000 000000 000000* @@ -380,7 +380,7 @@ L0009600 00000000 00000000 00000000 00000000* L0009632 00000000 00000000 00000000 00000000* L0009664 00000000 00000000 00000000 00000000* L0009696 00000000 00000000 00000000 00000000* -L0009728 00000000 00000000 00000000 00000000* +L0009728 00000000 00000000 00000000 00000001* L0009760 00000000 00000000 00000000 00000000* L0009792 000000 000000 000000 000000* L0009816 000000 000000 000000 000000* @@ -464,8 +464,8 @@ L0012024 000000 000000 000000 000000* L0012048 000000 000000 000000 000000* L0012072 000000 000000 000000 000000* L0012096 00000000 00000000 00000000 00000000* -L0012128 00000000 00000000 00000000 00000000* -L0012160 00000000 00000000 00000000 00000000* +L0012128 00000000 10000000 00000000 00000000* +L0012160 00000000 10000000 00000000 00000000* L0012192 00000000 00000000 00000000 00000000* L0012224 00000000 00000000 00000000 00000000* L0012256 00000000 00000000 00000000 00000000* @@ -473,14 +473,14 @@ L0012288 00000000 10000000 00000000 00000000* L0012320 00000000 00000000 00000000 00000000* L0012352 00000000 00000000 00000000 00000000* L0012384 000000 100000 000000 000000* -L0012408 000000 100000 000000 000000* -L0012432 000000 100000 000000 000000* +L0012408 000000 000000 000000 000000* +L0012432 000000 000000 000000 000000* L0012456 000000 000000 000000 000000* L0012480 000000 000000 000000 000000* L0012504 000000 000000 000000 000000* L0012528 00000000 10000000 00000000 00000000* -L0012560 00000000 10000000 00000000 00000000* -L0012592 00000000 10000000 00000000 00000000* +L0012560 00000000 00000000 00000000 00000000* +L0012592 00000000 00000000 00000000 00000000* L0012624 00000000 00000000 00000000 00000000* L0012656 00000000 00000000 00000000 00000000* L0012688 00000000 00000000 00000000 00000000* @@ -488,28 +488,28 @@ L0012720 00000000 00000000 00000000 00000000* L0012752 00000000 10000000 00000000 00000000* L0012784 00000000 00000000 00100000 00000000* L0012816 000000 000000 000000 000000* -L0012840 001000 000000 000000 000000* -L0012864 000000 000000 000000 000000* +L0012840 001000 100000 000000 000000* +L0012864 000000 100000 000000 000000* L0012888 000000 000000 000000 000000* L0012912 000000 000000 000000 000000* L0012936 000000 000000 000000 000000* -L0012960 00000000 00000000 00000000 00000000* -L0012992 00000000 10000010 00000000 00000011* +L0012960 00000000 10000000 00000000 00000000* +L0012992 00000000 00000010 00000000 00000011* L0013024 00000000 00000000 00000000 10111100* L0013056 00000000 00000000 00000000 01000000* L0013088 00000000 00000000 00000010 00000011* L0013120 00000000 00000000 00000000 00000000* L0013152 00000000 10000000 00000000 00000000* -L0013184 00000000 10000000 00000001 00000111* -L0013216 00000000 00000000 00000000 00010000* +L0013184 00000000 10000000 00000001 00000011* +L0013216 00000000 00000000 00000000 00010100* L0013248 000000 100000 000000 000000* L0013272 000000 000000 000000 000000* L0013296 000000 000000 000000 000000* L0013320 000000 000000 000000 011110* L0013344 000000 000000 000000 100000* L0013368 000000 000000 000000 000000* -L0013392 00000000 10000000 00000000 00000000* -L0013424 00000000 00000000 00000000 00000000* +L0013392 00000000 00000000 00000000 00000000* +L0013424 00000000 10000000 00000000 00000000* L0013456 00000000 10000000 00000000 00000000* L0013488 00000000 00000000 00000000 00000000* L0013520 00000000 00000000 00000000 00000000* @@ -755,7 +755,7 @@ L0020400 00000011 00000000 00000011 00000011* L0020432 00000011 00000000 00000011 00000000* L0020464 00000011 00000000 00000011 00000011* L0020496 00000011 00000000 00000001 00000011* -L0020528 00000011 00000000 00000010 00000011* +L0020528 00000011 00000000 00000010 00000010* L0020560 00000011 00000000 00000001 00000011* L0020592 000000 000000 000000 000000* L0020616 000000 000000 000000 000000* @@ -770,7 +770,7 @@ L0020832 01110011 00000001 00100010 00000011* L0020864 00000010 00000001 00000000 00000000* L0020896 00000011 00000001 00000001 00000011* L0020928 00000011 00000001 00000011 00000011* -L0020960 00000001 00000001 00010010 00000000* +L0020960 00000001 00000001 00010010 00000001* L0020992 11000011 10000011 00000011 00000011* L0021024 000000 000000 000000 000000* L0021048 000000 000000 100000 000000* @@ -975,7 +975,7 @@ L0026736 000000 000000 000000 000000* L0026760 000000 000000 000000 000000* L0026784 00000000 00000011 00000001 00000010* L0026816 00000010 00000011 00000001 00000001* -L0026848 00000000 00000000 00000000 00000000* +L0026848 00000000 10000000 00000000 00000000* L0026880 00000000 00000000 00000000 00000000* L0026912 00000010 00000010 00000010 00000011* L0026944 00000000 00000000 00000000 00000000* @@ -984,7 +984,7 @@ L0027008 00000000 00000000 00000000 00000000* L0027040 00000000 00000000 00000000 00000000* L0027072 000000 000000 000000 000000* L0027096 000000 000000 000000 000000* -L0027120 000000 100000 000000 000000* +L0027120 000000 000000 000000 000000* L0027144 000000 000000 000000 000000* L0027168 000000 000000 000000 000000* L0027192 000000 000000 000000 000000* @@ -1429,7 +1429,7 @@ L0039808 00000000 00000000 00000000 00000000* L0039840 00000000 00000000 00000000 00000100* L0039872 00000000 00000000 00000000 00000000* L0039904 00000000 00000000 00000000 00000000* -L0039936 00000000 00000000 00000000 00000000* +L0039936 00000000 00000000 00000000 00000100* L0039968 00000000 00000000 00000000 00000000* L0040000 00000000 00000000 00000000 00000000* L0040032 000000 000000 000000 000000* @@ -1444,7 +1444,7 @@ L0040240 00000000 00000000 00000000 00000000* L0040272 00000000 00000000 00000000 00111000* L0040304 00000000 00000000 00000000 00000000* L0040336 00000000 00000000 00000000 00000000* -L0040368 00000000 00000000 00000000 00000100* +L0040368 00000000 00000000 00000000 00000000* L0040400 00000000 00000000 00000000 00000000* L0040432 00000000 00000000 00000000 00000000* L0040464 000000 000000 000000 000000* @@ -1663,5 +1663,5 @@ L0046560 000000 000000 000000 000000* L0046584 000000 000000 000000 000000* L0046608 000000 000000 000000 000000* L0046632 000000 000000 000000 000000* -CBE32* -1DE8 +CBEB2* +1DF8 diff --git a/VHDL/SpiController.vhd b/VHDL/SpiController.vhd index b4f3e14..3766545 100644 --- a/VHDL/SpiController.vhd +++ b/VHDL/SpiController.vhd @@ -1,32 +1,7 @@ ---------------------------------------------------------------------------------- --- Company: n/a --- Engineer: A. Fachat --- --- Create Date: 12:37:11 05/07/2011 --- Design Name: SPI65B --- Module Name: SPI6502B - Behavioral --- Project Name: CS/A NETUSB 2.0 --- Target Devices: CS/A NETUSB 2.0 --- Tool versions: --- Description: An SPI interface for 6502-based computers (or compatible). --- modelled after the SPI65 interface by Daryl Rictor --- (see http://sbc.rictor.org/io/65spi.html ) --- This implementation here, however, is a complete reimplementation --- as the ABEL language of the original implementation is not supported --- by ISE anymore. --- Also I added the interrupt input handling, replacing four of the --- original SPI select outputs with four interrupt inputs --- Also folded out the single MISO input into one input for each of the --- four supported devices, reducing external parts count again by one. -- --- Dependencies: --- --- Revision: --- Revision 0.01 - File Created --- Revision 0.02 - removed spiclk and replaced with clksrc and clkcnt_is_zero combination, --- to drive up SPI clock to half of input clock (and not one fourth only as before) --- unfortunately that costed one divisor bit to fit into the CPLD --- Additional Comments: +-- Spi controller for 6502 systems +-- based on a design by A. Fachat -- ---------------------------------------------------------------------------------- library IEEE; @@ -149,13 +124,13 @@ begin begin if (nreset = '0') then mosi <= '1'; - sclk <= '0'; + sclk <= '1'; else -- clock is sync'd if (rising_edge(shiftclk)) then if (shifting2='0' or shiftdone = '1') then mosi <= '1'; - sclk <= '0'; + sclk <= '1'; else -- output data directly from output register case shiftcnt(3 downto 1) is @@ -169,7 +144,7 @@ begin when "111" => mosi <= spidataout(0); when others => mosi <= '1'; end case; - sclk <= '0' xor '0' xor shiftcnt(0); + sclk <= shiftcnt(0); end if; end if; end if;