From 95e3c94914333012b448a1952ac39938e375997f Mon Sep 17 00:00:00 2001
From: Florian Reitz <freitz85@gmail.com>
Date: Wed, 12 Aug 2020 11:49:53 +0200
Subject: [PATCH] Fix for unintended PGMEN usage

---
 .gitignore                 |   2 +
 Binary/AppleIISd.bin       | Bin 2048 -> 2048 bytes
 Binary/AppleIISd.hex       | 178 ++++++++++++++++++-------------------
 Binary/Flasher.dsk         | Bin 143360 -> 143360 bytes
 Firmware/src/AppleIISd.inc |   1 -
 Firmware/src/AppleIISd.s   |  18 ++--
 README.md                  |   2 +
 7 files changed, 100 insertions(+), 101 deletions(-)

diff --git a/.gitignore b/.gitignore
index 3096d2b..0d6d309 100644
--- a/.gitignore
+++ b/.gitignore
@@ -219,3 +219,5 @@ VHDL/_pace\.ucf
 VHDL/AppleIISd\.tim
 
 VHDL/AppleIISd\.jed
+
+Firmware/AppleIISd.bin
diff --git a/Binary/AppleIISd.bin b/Binary/AppleIISd.bin
index d0ea52268a246cf00d6d09f2cd69f255f6616b60..5f95df8574b07bbac501c1c4c51bce7a6b549f4f 100644
GIT binary patch
delta 587
zcmZn=Xb_m7#mGKU+ej$y)Q0;jxmsOQTvFUuGPb%Y<W0;sm(f2pfn}wBgXqczo8|)-
zSQQvfY~WmK>!Gp1M8SRHArnE5(+wvXfM9y*yv7478Rs@n7G#vH*Kc)Ld9u|}A^xO7
z@yU~n7gASRBSgADB4JDHcm7~Kx$1(~N_T`*@yV6J$h?z`A0C`!xS+Pu7a<DN&Tv5l
zsJ((k)8T{1-sS_G0&|-W_&hz~^Xmk}Fh{V}D<ct_K(6@k7^soi=kke_rf3r1fD-B}
z9g##QzhYF?oROg5SWu9Y8XFy)qEKe2XQXGOppmR;WME{V;FgnLl$n^P5R{r(QZ?C*
zDVC%7q({^O7N41u7c<RZES_w`tfQK6$|vuX&-GI)85FEfO<-E7z3Bgf{|O5FPXZmS
z`48ymm4OQElY5z?g{@C*NJkcr0E+)+p5c4%%mwuYj2k_c*w3tB>*89au<7&$rj-n<
z7BFPY^k6t~fOW$6t_4hs7)~-KtYm3;QS;)Ag7X<r*sxuYSnBhEWu>A8P-2qT0`{H1
z&rE*6qQ;?rY6BCefP(d8K2{mt|7Rw8oj4#l;hRK)g7ai^Ry~QlGZPpSmf0<_2fADV
o!MQ%UmbF@V>*<g)iD&koQ9X0!%rzjqb>`M)Znm$ClO5Ou02n#~nE(I)

delta 601
zcmZn=Xb_m7#V9sW+eoPH)Q0;jxmsOQTvFUuGPb%Y)J@Dcm$5%Jfn}wBgXqczo8|)-
zSQQvfY~WmK>!Gp1L?L|QA(Q%u(+wvXfM9y*O6IwZ2lh4};AEWJd|)N}+@=EyxK{q3
z+i<|9@qobZjtgIba+?1@a`vqbD^IpMD&(J3Xg+z8@j~iKZ-mG!kVx1P`<*{nPp-P)
zwK5zb)qHYgGBWQZ;|HM!CmAlNt&Bwo&zfAzDDLzAgb&L}B)uy$5h_4-es~Pj$Lw?W
z#7b8*iEls&^_780qLUvms_L&~0D5Rff`Vf~K~8FHba0A7nW3JMo}q$9vZj%Np@o85
zPJU5lVxB@!YGz55!el+BSdQkC9#IQed{$1L%rt|sd9n_(j%vXvpSn{%&rhvnQ1CuA
zfoY}oqW=s2Cn%gh2@jk=1@XzX%+bQ$r#7S`i$?&(Uo+3}eRt-9`U1v{9!u<JR<Lz(
ztx`C2dIQr+hE)p~GG=-(oH)Qb;d|EtrbP@V8535rG`y(!aYiBd3@|t=*e*yc_4&ZE
zQqck^G0AHI`%dn&lP|ESaoC^Qz{Dw_;63>tiwrOS*@<2!4oFV;CXt{JJXxJpPonP3
v1jdAAc1!GmE>}Qso=?tYtrk9dI^|5^ne%5%&)hll3<zJHdA0dB>sLkq86goE

diff --git a/Binary/AppleIISd.hex b/Binary/AppleIISd.hex
index acf1b38..dfa2055 100644
--- a/Binary/AppleIISd.hex
+++ b/Binary/AppleIISd.hex
@@ -1,102 +1,102 @@
 :10000000A220A200A203A20078A960853F203F00A1
 :10001000BABD0001588DF807290F853FA80A0A0AC2
-:100020000A853EAA2CFFCFA000B916C9F00D0980A1
+:100020000A853EAA2CFFCFA000B907C9F00D0980B0
 :10003000995007C810F3A9C520A8FC2C61C0100B6B
 :10004000ADF8073A854164406C40002000C8C90003
-:10005000D0EEA9088545644464476446207ECAB052
-:10006000DFA90A854564446447A9018546207ECA04
+:10005000D0EEA9088545644464476446206ECAB062
+:10006000DFA90A854564446447A9018546206ECA14
 :10007000B0CE4C01081890013808FAA004B93D0030
 :10008000488810F9863D78A960853F203F00BABDB9
 :100090000001588DF807290F853FA80A0A0A0A852A
-:1000A0003EAA2CFFCF203FCA9004A92F8015A9801B
+:1000A0003EAA2CFFCF202FCA9004A92F8015A9802B
 :1000B0003C83C0D0052000C8B009A53D4828B03415
-:1000C0002057CADAA63F9D7804689DF804989D7869
+:1000C0002047CADAA63F9D7804689DF804989D7879
 :1000D0000508689DF805A00068993D00C8C0059016
 :1000E000F7BDF80548BD780548BDF80448BD78045B
-:1000F000FA7A2860182058CB80C900000000977554
-:10010000A9039D81C0BD83C009019D83C0A9079D2E
-:1001100082C0A00AA9FF9D80C03C81C010FB88D08E
-:10012000F5BD83C029FE9D83C0A93F8540A9C9852F
-:1001300041206FC92083C9C901D065A94B8540A959
-:10014000C98541206FC9209AC9C901D056A43FB9B9
-:10015000F805C9AAD04AA9578540A9C98541206F89
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-:1001700083C9C901F0E0C900D026A95D8540A9C99D
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-:1001B0008540A9C98541206FC92083C9C901F0E3E1
-:1001C000C900D0034CDDC8A9458540A9C985412097
-:1001D0006FC92083C9C901F0F6C900D027A951858C
-:1001E00040A9C98541206FC92083C9C900D015BD68
-:1001F00083C009809D83C0BD81C009049D81C01852
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-:10028000F17A60A9FF9D80C03C81C010FBBD80C099
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-:1002E000F8049E78049845432970F005A9029DF80A
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-:10033000F8059D80C0A9FF9D80C02083C97A6048D0
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-:10035000C018F001386860A542F00CC901F00BC963
-:1003600002F00AA90138604C70CA4C7ECA4CE7CA38
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-:1003B0009144C8D0F8E645BD80C09144C8D0F8C685
-:1003C00045BD80C0BD80C0BD80C0BD81C029EF9D3E
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-:1003E000286038A92780EE204BCAB06720CFC9BD4E
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-:100530001990F618602053CCA64CF00FCAF00CCAE4
-:10054000F006CAF00ACAF003A92138A9001860A968
-:100550001F3860A002B148854AC8B148854BC8B170
-:1005600048854C60207ECC900160A63EA43F4C7E26
-:10057000CA207ECC900160A63EA43F4CE7CAB97861
-:1005800006F044C901F00EC902F00EC903F010C90B
-:1005900004F0118032A53E8010A53E0980800AA596
-:1005A0003E3A8005A53E3A09808543A002B14885C0
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-:10061000120000104150504C455D5B534420202097
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+:1000F000FA7A2860182048CB80C900000000977564
+:100100009E81C0A9019D83C0A00AA9FF9D80C03C1B
+:1001100081C010FB88D0F5BD83C029FE9D83C0A996
+:100120002F8540A9C98541205FC92073C9C901D065
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+:1001400001D056A43FB9F805C9AAD04AA9478540AD
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+:100160008541205FC92073C9C901F0E0C900D026CC
+:10017000A94D8540A9C98541205FC9208AC9C90008
+:10018000D014A43FB978042940F048BD83C00910B9
+:100190009D83C04CE5C84CFAC8A9478540A9C985CC
+:1001A00041205FC9A9598540A9C98541205FC9205F
+:1001B00073C9C901F0E3C900D0034CD3C8A9358580
+:1001C00040A9C98541205FC92073C9C901F0F6C99A
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+:1001E000C9C900D015BD83C009809D83C0BD81C031
+:1001F00009049D81C018A000900338A027BD83C0CA
+:1002000009019D83C09860204170706C655D5B53EF
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+:1002F000C0D011A0091EF8053E78053EF8043E78EE
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+:1005B000C8B148D0061860A9113860A92D3860B9B3
+:1005C0007806F004A9001860A9113860B9780618F7
+:1005D000F003A9113860A9013860A9273860030326
+:1005E0000301030101010404B5CB54CC61CCBFCCA1
+:1005F00025CCCCCCD6CCD6CCDACCDACC4000000B97
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+:1006200000000000000000000000000000000000CA
 :1006300000000000000000000000000000000000BA
 :1006400000000000000000000000000000000000AA
 :10065000000000000000000000000000000000009A
diff --git a/Binary/Flasher.dsk b/Binary/Flasher.dsk
index 17081ad391ac7f251d178c319d9cb7ef854475e5..9a20d26ed06eb439bc4604fd8d8ca788b6715265 100644
GIT binary patch
delta 792
zcmZ8fOGs2v7(V|zoQFi$P#PoRM3~yxj17i@Hfp}^On1c6>><)fiU~4GQz1R@%HYNb
zCM8cUjGHewv$`e`F2qZ#x!1e6Q6#h|K>`;oW@S>LovFoG{BStm_wjxIe}0a*VHY>-
zveOKRyqg5q(g|~~4bakKXB8Bju5D=%8UlgVde8YlGeW2pSrM|MgT-zqLYs(PN}WsJ
zvU8sit_e~ToQWeG4@VB{=}&`6B|pCH3gbFb&V$Dl(c=(a@Xu8X5e;X+I(fvy1J~=d
zHoZ$<)eCf8|H$eSs~Uu|2^WA^=(BDVO0dY!RZk6NjX4we)tYRgC?TO+Q#?v4*7)}^
z$uxsh2vdu=^>9nab^2WO@=%uHnio<Qdc1-O<3Y)`{8J|z0l-|CZY}t+SCdT+4p(Y%
z!Ue$%QBoCzl7g_th7{H{iqevax@Y#Jy)a%?S7J)>?sQC{7qN{z2|`DEr6%|87p`KP
zrXr)6?oEpd-DQV_7VD=)2Qb_7Fs>aO?C<I9Xzj-L&UkztA1=CC>?`$^;>P}g+kIUT
ze5t4J&VAy)0G;-z%3qf(!W5Zh=&)ksNRDGWR{xOIzhm(ay%<p_3ne)M<PUpCYp6O}
zi*Kkns;Xf0(8>%mmS)=7K6b2X!U)o)j1*OA>wcs{YJ-h`l7=!Yvm+xny-rJUO^Rnb
zaB%D~!q=qmBl$P1>rZQXEn`Ygk=kTNv+zDi&;BQDGog^y{=*_8FC8ti=#>%0VVNFL
zToQ_#E2KikPln(W*oZp>zC#gB{z9Fj4c+zKO%z5OafA$np!}#;i(9By%%fseOfjq&
zC1uC_Ilf3P!%gIE2+ExNny9jGjL6+tFoC7*a{HADF#VcISZ6sajK3_2mB?>OWcV=r
E8}QRfHvj+t

delta 828
zcma)(&ubG=5XW~-v}2MrqV=Lk;;bzO6QPn#ixq1(5RrOVFprIgG??IBrOD<JUd5va
zp@V;fCttck{n5sMphquWq@qWU9=z$i-K?M}ILq#PJ8$01cRsUu0GkJ(GO29gM`APK
zsZ@W)tb|W8SIs%&mS{AZ3$;tDmm77%FpjJm=M3YzaSwC+_t_}wP53oC`)o^<vjQC9
zO4;dI8??ALZ+f)8cZH6t*<(#Wed41fhO$F%UOy~UJ+wAB7{O;3j-)TA)*DF~(AuPD
z+Vo-~D6LAFw(SKvxZS6x@6HxQTL_=S*q|$IPgp1f*Wj1G2=q;@P^j!w6$E`y7jOI$
z0KAJIzKcUC?G~?z53T{`G0H3XOiS)^3HAVToS;XlLPM2XS_kymn@4b`cR5zF=Z}1D
z%k~CwK2I;S`|^G^@Pc-ey9um5bGjQ5>U!9!YC@tO6S|Ohz!eS%Zl@`1Kza}^pVazd
zY8qrjjaJ^CraKdHlw%^EUE0~!@IOxG6Lu`2gH{l+Luo^-NWwraj%2=@v<R*g3A?$R
zBO+r3!lN&$Sea_fqg79U@eDMWzd)q%_%@~YPn`J&7(nk3E$nklSjs@Z&Dwq6(%MU=
zOP{vaGJ23sgoJA2f^8vGnS{foHJ9Jm#Dj<M`*S$FrPApdV<Ol+pP$Z2_sjF_)AFmE
ZO9Mb%joV0O#{m9wc8|+yr>xBP@+VP)2)h6P

diff --git a/Firmware/src/AppleIISd.inc b/Firmware/src/AppleIISd.inc
index 5659e3e..e1838b9 100644
--- a/Firmware/src/AppleIISd.inc
+++ b/Firmware/src/AppleIISd.inc
@@ -48,7 +48,6 @@ KNOWNRTS    :=    $FF58
 OAPPLE      :=    $C061       ; open apple key
 DATA        :=    $C080
 CTRL        :=    DATA+1
-DIV         :=    DATA+2
 SS          :=    DATA+3
 
 ; Constants
diff --git a/Firmware/src/AppleIISd.s b/Firmware/src/AppleIISd.s
index 7e17e4a..c895db1 100644
--- a/Firmware/src/AppleIISd.s
+++ b/Firmware/src/AppleIISd.s
@@ -1,10 +1,10 @@
 ;*******************************
 ;
 ; Apple][Sd Firmware
-; Version 1.2.1
+; Version 1.2.2
 ; Main source
 ;
-; (c) Florian Reitz, 2017 - 2018
+; (c) Florian Reitz, 2017 - 2020
 ;
 ; X register usually contains SLOT16
 ; Y register is used for counting or SLOT
@@ -228,13 +228,9 @@ DRIVER:     CLC               ; ProDOS entry
 ;*******************************
 
             .segment "EXTROM"
-INIT:       LDA   #$03        ; set SPI mode 3
-            STA   CTRL,X
-            LDA   SS,X
-            ORA   #SS0        ; set CS high
+INIT:       STZ   CTRL,X      ; reset SPI controller
+            LDA   #SS0        ; set CS high
             STA   SS,X
-            LDA   #7          ; set 400 kHz
-            STA   DIV,X
             LDY   #10
             LDA   #DUMMY
 
@@ -362,13 +358,13 @@ INIT:       LDA   #$03        ; set SPI mode 3
 @END1:      LDA   SS,X        ; set CS high
             ORA   #SS0
             STA   SS,X
-            LDA   #0          ; set div to 2
-            STA   DIV,X
             TYA               ; retval in A
             RTS
 
 
-TEXT:       .asciiz " Apple][Sd v1.2.1 (c)2018 Florian Reitz "
+TEXT:       .asciiz " Apple][Sd v1.2.2 (c)2020 Florian Reitz"
+            .assert(*-TEXT)=40, error, "TEXT must be 40 bytes long"
+
 
 CMD0:       .byt $40, $00, $00
             .byt $00, $00, $95
diff --git a/README.md b/README.md
index f946d9b..f5cdc73 100644
--- a/README.md
+++ b/README.md
@@ -112,6 +112,8 @@ The control registers of the *AppleIISd* are mapped to the usual I/O space at **
 
 **DATA** SPI data register - Is used for both input and output. When the register is written to, the controller will output the byte on the SPI bus. When it is read from, it reflects the data that was received over the SPI bus.
 
+**PGMEN** Program Enable - Enable programing of the internal firmware eeprom. Should be reset immediately after writing to the device.
+
 **ECE** External Clock Enable - This bit enables the the external clock input to the SPI controller. In the *AppleIISd*, this effectively switches the SPI clock between 500kHz (ECE = 0) and 3.5MHz (ECE = 1).
 
 **FRX** Fast Receive mode - When set to 1, fast receive mode triggers shifting upon reading or writing the SPI Data register. When set to 0, shifting is only triggered by writing the SPI data register.