diff --git a/AppleIISd.pdf b/AppleIISd.pdf
deleted file mode 100644
index 240e50a..0000000
Binary files a/AppleIISd.pdf and /dev/null differ
diff --git a/AppleIISd.bin b/Binary/AppleIISd.bin
similarity index 100%
rename from AppleIISd.bin
rename to Binary/AppleIISd.bin
diff --git a/AppleIISd.bom.txt b/Binary/AppleIISd.bom.txt
similarity index 74%
rename from AppleIISd.bom.txt
rename to Binary/AppleIISd.bom.txt
index 2077c82..1998b4c 100644
--- a/AppleIISd.bom.txt
+++ b/Binary/AppleIISd.bom.txt
@@ -1,12 +1,14 @@
-Qty Value Device Package Parts Description
-1 LEDSQR2X5 LED2X5 LED1 LED
-1 100k GE08R SIL9 RN1 SIL RESISTOR
-8 100n C-EUC0603K C0603K C1, C2, C4, C5, C6, C7, C8, C9 CAPACITOR, European symbol
+Qty Value Device Package Parts Description
+1 LEDSQR2X5 LED2X5 LED1 LED
+1 MA03-1 MA03-1 SV1 PIN HEADER
+1 MA06-1 MA06-1 SV2 PIN HEADER
+1 100k GE08R SIL9 RN1 SIL RESISTOR
+8 100n C-EUC0603K C0603K C1, C2, C4, C5, C6, C7, C8, C9 CAPACITOR, European symbol
1 104H-TDA0-R 104H-TDA0-R 104H-TDA0-R U$2 SD Card Socket
-3 10n C-EUC0603K C0603K C10, C11, C12 CAPACITOR, European symbol
-2 10u/16V CPOL-EUA/3216-18R A/3216-18R C3, C13 POLARIZED CAPACITOR, European symbol
-1 28C64ASO 28C64ASO SO28W IC3 CMOS EEPROM
-1 470 R-EU_R0603 R0603 R4 RESISTOR, European symbol
-1 74LS245N 74LS245N DIL20 IC1 Octal BUS TRANSCEIVER, 3-state
-1 LM1117DTX-3.3 LM1117DTX-3.3 TO252 IC2
-1 XC9572XL XC9572_S44VQFP SQFP-S-10X10-44 IC4
+3 10n C-EUC0603K C0603K C10, C11, C12 CAPACITOR, European symbol
+2 10u/16V CPOL-EUA/3216-18R A/3216-18R C3, C13 POLARIZED CAPACITOR, European symbol
+1 28C64ASO 28C64ASO SO28W IC3 CMOS EEPROM
+1 470 R-EU_R0603 R0603 R4 RESISTOR, European symbol
+1 74LS245N 74LS245N DIL20 IC1 Octal BUS TRANSCEIVER, 3-state
+1 LM1117DTX-3.3 LM1117DTX-3.3 TO252 IC2
+1 XC9572XL XC9572_S44VQFP SQFP-S-10X10-44 IC4
diff --git a/AppleIISd.hex b/Binary/AppleIISd.hex
similarity index 100%
rename from AppleIISd.hex
rename to Binary/AppleIISd.hex
diff --git a/Binary/AppleIISd.pdf b/Binary/AppleIISd.pdf
new file mode 100644
index 0000000..22fe701
Binary files /dev/null and b/Binary/AppleIISd.pdf differ
diff --git a/AppleIISd_PC44.jed b/Binary/AppleIISd_PC44.jed
similarity index 100%
rename from AppleIISd_PC44.jed
rename to Binary/AppleIISd_PC44.jed
diff --git a/AppleIISd_VQ44.jed b/Binary/AppleIISd_VQ44.jed
similarity index 100%
rename from AppleIISd_VQ44.jed
rename to Binary/AppleIISd_VQ44.jed
diff --git a/Flasher.bin b/Binary/Flasher.bin
similarity index 100%
rename from Flasher.bin
rename to Binary/Flasher.bin
diff --git a/Flasher.dsk b/Binary/Flasher.dsk
similarity index 100%
rename from Flasher.dsk
rename to Binary/Flasher.dsk
diff --git a/Hardware/Gerber_V1.1.zip b/Binary/Gerber_V1.1.zip
similarity index 100%
rename from Hardware/Gerber_V1.1.zip
rename to Binary/Gerber_V1.1.zip
diff --git a/Binary/Gerber_V1.2.1.zip b/Binary/Gerber_V1.2.1.zip
new file mode 100644
index 0000000..181cc62
Binary files /dev/null and b/Binary/Gerber_V1.2.1.zip differ
diff --git a/Hardware/Gerber_V1.2.zip b/Binary/Gerber_V1.2.zip
similarity index 100%
rename from Hardware/Gerber_V1.2.zip
rename to Binary/Gerber_V1.2.zip
diff --git a/Datasheets/AT28C64B.pdf b/Datasheets/AT28C64B.pdf
new file mode 100644
index 0000000..4129dcf
Binary files /dev/null and b/Datasheets/AT28C64B.pdf differ
diff --git a/Datasheets/Part1_Physical_Layer_Simplified_Specification_Ver6.00.pdf b/Datasheets/SD Specification - Part 1 Physical Layer Simplified.pdf
similarity index 100%
rename from Datasheets/Part1_Physical_Layer_Simplified_Specification_Ver6.00.pdf
rename to Datasheets/SD Specification - Part 1 Physical Layer Simplified.pdf
diff --git a/Hardware/SD_A2.brd b/Hardware/SD_A2.brd
index c36bd38..03e992d 100644
--- a/Hardware/SD_A2.brd
+++ b/Hardware/SD_A2.brd
@@ -107,6 +107,8 @@
+1-2: R
+2-3: R/W
@@ -2858,72 +2860,6 @@ for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trim
-
-<b>Pin Header Connectors</b><p>
-<author>Created by librarian@cadsoft.de</author>
-
-
-<b>PIN HEADER</b>
-
-
-
-
-
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@@ -2954,6 +2890,105 @@ for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trim
+
+<b>Pin Headers</b><p>
+Naming:<p>
+MA = male<p>
+# contacts - # rows<p>
+W = angled<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>PIN HEADER</b>
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
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+
+>NAME
+1
+>VALUE
+
+
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+
+
+<b>PIN HEADER</b>
+
+
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+
+
+
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+
+
+>NAME
+1
+6
+>VALUE
+
+
+
+
+
+
+
+
+
@@ -3231,8 +3266,19 @@ Covered vias can be set in Masks (Limit).
-
+
+
+
+
+
+
+
+
+
+
+
+
@@ -3329,7 +3375,6 @@ Covered vias can be set in Masks (Limit).
-
@@ -3341,6 +3386,7 @@ Covered vias can be set in Masks (Limit).
+
@@ -3371,6 +3417,9 @@ Covered vias can be set in Masks (Limit).
+
+
+
@@ -3434,7 +3483,6 @@ Covered vias can be set in Masks (Limit).
-
@@ -3445,7 +3493,8 @@ Covered vias can be set in Masks (Limit).
-
+
+
@@ -4052,11 +4101,9 @@ Covered vias can be set in Masks (Limit).
-
-
@@ -4065,6 +4112,8 @@ Covered vias can be set in Masks (Limit).
+
+
@@ -4073,7 +4122,6 @@ Covered vias can be set in Masks (Limit).
-
@@ -4086,15 +4134,15 @@ Covered vias can be set in Masks (Limit).
-
+
+
-
@@ -4105,31 +4153,31 @@ Covered vias can be set in Masks (Limit).
-
+
+
-
-
+
-
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-
-
+
-
+
+
+
+
+
@@ -4238,9 +4286,6 @@ Covered vias can be set in Masks (Limit).
-
-
-
@@ -4258,13 +4303,14 @@ Covered vias can be set in Masks (Limit).
-
-
+
+
+
@@ -4303,6 +4349,17 @@ Covered vias can be set in Masks (Limit).
+
+
+
+
+
+
+
+
+
+
+
diff --git a/Hardware/SD_A2.sch b/Hardware/SD_A2.sch
index 9f233fb..aff529c 100644
--- a/Hardware/SD_A2.sch
+++ b/Hardware/SD_A2.sch
@@ -17913,172 +17913,6 @@ Source: http://products.nichicon.co.jp/en/pdf/XJA043/e-ud.pdf
-
-<b>Pin Header Connectors</b><p>
-<author>Created by librarian@cadsoft.de</author>
-
-
-<b>PIN HEADER</b>
-
-
-
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-
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-
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-<b>PIN HEADER</b>
-
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-
@@ -18202,6 +18036,192 @@ http://www.tag-connect.com
+
+<b>Pin Headers</b><p>
+Naming:<p>
+MA = male<p>
+# contacts - # rows<p>
+W = angled<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>PIN HEADER</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+>NAME
+1
+>VALUE
+
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+
+
+<b>PIN HEADER</b>
+
+
+
+
+
+
+
+
+
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+>NAME
+1
+6
+>VALUE
+
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+
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+
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+>VALUE
+>NAME
+
+
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+
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+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
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+
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+
+
+<b>PIN HEADER</b>
+
+
+
+
+
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+
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+
+
+
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+<b>PIN HEADER</b>
+
+
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+
@@ -18248,16 +18268,24 @@ http://www.tag-connect.com
-
-
-
+
+
+
+
+
Apple II SD
(c) Florian Reitz 2017 - 2019
+SV1
+1-2: Read Only
+2-3: Read / Write
+
+SV2 / TC1
+Program CPLD
@@ -18303,7 +18331,7 @@ http://www.tag-connect.com
-
+
@@ -18359,13 +18387,15 @@ http://www.tag-connect.com
-
-
+
+
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@@ -18463,13 +18493,14 @@ http://www.tag-connect.com
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-
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+
+
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+
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@@ -18612,17 +18648,17 @@ http://www.tag-connect.com
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-
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@@ -19302,6 +19339,14 @@ http://www.tag-connect.com
+
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+
+
diff --git a/Images/Card Front SMD.jpg b/Images/Card Front SMD.jpg
new file mode 100644
index 0000000..55c9d4e
Binary files /dev/null and b/Images/Card Front SMD.jpg differ
diff --git a/README.md b/README.md
index 498be55..f946d9b 100644
--- a/README.md
+++ b/README.md
@@ -5,12 +5,13 @@ The **AppleIISd** is a SD card based replaced for the ProFile harddrive. In cont
A Xilinx CPLD is used as a SPI controller and translates, together with the ROM driver, SD card data to/from the Apple IIe. The VHDL source is based on [SPI65/B](http://www.6502.org/users/andre/spi65b) by André Fachat.
-The assembler sources are written for CC65. The [schematics](AppleIISd.pdf) are available as PDF.
+The assembler sources are written for CC65. The [schematics](Binary/AppleIISd.pdf) are available as PDF.
## Features
* works with ProDOS and GS/OS
* up to 128MB storage space (4x 65535 blocks)
* ProDOS and Smartport driver in ROM
+* Firmware update from ProDOS
* Auto boot
* Access LED
* Card detect and write protect sensing
@@ -27,6 +28,20 @@ The AppleIISd requires an enhanced IIe or IIgs computer. The ROM code uses some
When a 2732 type ROM is used, the binary image has to be programmed at offset 0x800, because A11 is always high for compatibility with 2716 type ROMs.
+## Binary distribution
+The following files in [Binary/](Binary) have been provided to eliminate the need to compile assembler or VHDL sources.
+
+| File | Purpose |
+| ---- | ------- |
+| AppleIISd_xx44.jed | CPLD bitfiles for PC44 and VQ44 formfactors |
+| AppleIIDs.bin | 2k Firmware binary for EPROM |
+| AppleIISd.hex | Same as above in INTEL-HEX format |
+| AppleIISd.bom.txt | BOM for the board |
+| AppleIISd.pdf | Schematic and layout |
+| Flasher.bin | Flasher program ProDOS binary |
+| Flasher.dsk | Complete ProDOS disk image with Flasher.bin and AppleIISd.bin |
+| Gerber_Vx.x.zip | Gerber files for different hw revisions |
+
## Smartport drive remapping
The AppleIISd features Smartport drivers in ROM to provide more than two drives in both GS/OS and ProDOS.
@@ -85,14 +100,45 @@ LDA $C0C0
```
+## Registers
+The control registers of the *AppleIISd* are mapped to the usual I/O space at **$C0n0 - $C0n3**, where n is slot+8. All registers and bits are read/write, except where noted.
+
+| Address | Function | Default value |
+| ------- | --------------- | ------------- |
+| $C0n0 | DATA | - |
+| $C0n1 | **0:** PGMEN
**1:** -
**2:** ECE
**3:** -
**4:** FRX
**5:** BSY (R)
**6:** -
**7:** TC (R) | 0
0
0
0
0
0
0
0
|
+| $C0n2 | unused | $00 |
+| $C0n3 | **0:** /SS
**1:** -
**2:** -
**3:** -
**4:** SDHC
**5:** WP (R)
**6:** CD (R)
**7:** INIT | 1
0
0
0
0
-
-
0 |
+
+**DATA** SPI data register - Is used for both input and output. When the register is written to, the controller will output the byte on the SPI bus. When it is read from, it reflects the data that was received over the SPI bus.
+
+**ECE** External Clock Enable - This bit enables the the external clock input to the SPI controller. In the *AppleIISd*, this effectively switches the SPI clock between 500kHz (ECE = 0) and 3.5MHz (ECE = 1).
+
+**FRX** Fast Receive mode - When set to 1, fast receive mode triggers shifting upon reading or writing the SPI Data register. When set to 0, shifting is only triggered by writing the SPI data register.
+
+**BSY** Busy - This bit is 1 as long as data is shifted out on the SPI bus. *BSY* is read-only.
+
+**TC** Transfer Complete - This flag is set when the last bit has been shifted out onto the SPI bus and is cleared when *SPI data* is read.
+
+**/SS** Slave select - Write 0 to this bit to select the SD card.
+
+**SDHC** This bit is used by the initialization routine in firmware to signalize when a SDHC card was found. Do not write to manually.
+
+**WP** Write Protect - This read-only bit is 0 when writing to the card is enabled by the switch on the card.
+
+**CD** Card Detect - This read-only bit is 0 when a card is inserted.
+
+**INIT** Initialized - This bit is set to 1 when the SD card has been initialized by the firmware. Do not write manually.
+
## TODOs
* Much more testing
-* SRAM option (may never work, though)
* Enable more than 4 volumes under GS/OS
-* Use 28 pin socket to support other EPROMS than 2716 and 2732
+* Support for 6502 CPUs
## Known Bugs
* Does not work with some Z80 cards present
+* Programs not startable from partitions 3 and 4 under ProDOS
+
