# UCF file for the Papilio DUO board # Generated by pin_converter, written by Kevin Lindsey # https://github.com/thelonious/papilio_pins/tree/development/pin_converter ## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration. CONFIG PROHIBIT=P144; CONFIG PROHIBIT=P69; CONFIG PROHIBIT=P60; PIN "pll/clkout2_buf.O" CLOCK_DEDICATED_ROUTE = FALSE; NET clk LOC="P94" |IOSTANDARD=LVTTL ; # CLK #NET RX LOC="P46" | IOSTANDARD=LVTTL; # RX #NET TX LOC="P141" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # TX #NET ARDUINO_RESET LOC="P139" | IOSTANDARD=LVTTL; # ARDUINO_RESET #NET RS232_RX LOC="P116" | IOSTANDARD=LVTTL; # A0 #NET RS232_TX LOC="P117" | IOSTANDARD=LVTTL; # A1 NET sd_dat LOC="P118" |IOSTANDARD=LVTTL; # A2 NET sd_cmd LOC="P115" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # B0 NET sd_clk LOC="P114" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # B1 NET sd_dat3 LOC="P112" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # B2 NET ps2_dat LOC="P120" | IOSTANDARD=LVTTL |PULLUP; # A4 NET ps2_clk LOC="P121" | IOSTANDARD=LVTTL |PULLUP; # A5 #NET JOYSTICK1_5 LOC="P123" | IOSTANDARD=LVTTL; # A6 #NET JOYSTICK1_9 LOC="P124" | IOSTANDARD=LVTTL; # A7 #NET JOYSTICK1_4 LOC="P126" | IOSTANDARD=LVTTL; # A8 #NET JOYSTICK1_3 LOC="P127" | IOSTANDARD=LVTTL; # A9 #NET JOYSTICK1_7 LOC="P131" | IOSTANDARD=LVTTL; # A10 #NET JOYSTICK1_2 LOC="P132" | IOSTANDARD=LVTTL; # A11 #NET JOYSTICK1_6 LOC="P133" | IOSTANDARD=LVTTL; # A12 #NET JOYSTICK1_1 LOC="P134" | IOSTANDARD=LVTTL; # A13 #NET SD_nCS LOC="P112" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # B2 #NET SW_LEFT LOC="P111" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # B3 #NET SW_UP LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # B4 NET RESET_I LOC="P102" |IOSTANDARD=LVTTL; # B5 #NET SW_DOWN LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # B6 #NET SW_RIGHT LOC="P100" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # B7 NET vga_hs LOC="P99" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C0 NET vga_vs LOC="P97" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C1 NET vga_b(0) LOC="P93" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C2 NET O_AUDIO_L LOC="P88" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # C3 NET O_AUDIO_R LOC="P85" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # C4 NET vga_b(1) LOC="P83" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C5 NET vga_b(2) LOC="P81" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C6 NET vga_b(3) LOC="P79" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C7 NET vga_g(0) LOC="P75" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C8 NET vga_g(1) LOC="P67" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C9 NET vga_g(2) LOC="P62" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C10 NET vga_g(3) LOC="P59" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C11 NET vga_r(3) LOC="P57" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C12 NET vga_r(2) LOC="P55" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C13 NET vga_r(1) LOC="P50" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C14 NET vga_r(0) LOC="P47" |IOSTANDARD=LVTTL |DRIVE=8 |SLEW=FAST; # C15 #NET JOYSTICK2_5 LOC="P98" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D0 #NET JOYSTICK2_4 LOC="P95" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D1 #NET JOYSTICK2_3 LOC="P92" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D2 #NET JOYSTICK2_2 LOC="P87" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D3 #NET JOYSTICK2_1 LOC="P84" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D4 #NET JOYSTICK2_6 LOC="P82" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D5 #NET JOYSTICK2_7 LOC="P80" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D6 #NET JOYSTICK2_9 LOC="P78" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D7 #NET PS2_CLK2 LOC="P74" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D8 #NET PS2_DAT2 LOC="P66" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D9 #NET AUDIO2_RIGHT LOC="P61" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D10 #NET AUDIO2_LEFT LOC="P58" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # D11 NET LED(0) LOC="P56" | IOSTANDARD=LVTTL | DRIVE=8; # D12 NET LED(1) LOC="P51" | IOSTANDARD=LVTTL | DRIVE=8; # D13 NET LED(2) LOC="P48" | IOSTANDARD=LVTTL | DRIVE=8; # D14 NET LED(3) LOC="P39" | IOSTANDARD=LVTTL | DRIVE=8; # D15 NET sram_addr(0) LOC="P7" |IOSTANDARD=LVTTL | DRIVE=8 | IOB=TRUE |SLEW=FAST ; # SRAM_ADDR0 NET sram_addr(1) LOC="P8" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR1 NET sram_addr(2) LOC="P9" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR2 NET sram_addr(3) LOC="P10" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR3 NET sram_addr(4) LOC="P11" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR4 NET sram_addr(5) LOC="P5" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR5 NET sram_addr(6) LOC="P2" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR6 NET sram_addr(7) LOC="P1" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR7 NET sram_addr(8) LOC="P143" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR8 NET sram_addr(9) LOC="P142" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR9 NET sram_addr(10) LOC="P43" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR10 NET sram_addr(11) LOC="P41" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR11 NET sram_addr(12) LOC="P40" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR12 NET sram_addr(13) LOC="P35" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR13 NET sram_addr(14) LOC="P34" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR14 NET sram_addr(15) LOC="P27" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR15 NET sram_addr(16) LOC="P29" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR16 NET sram_addr(17) LOC="P33" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR17 NET sram_addr(18) LOC="P32" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR18 NET sram_addr(19) LOC="P44" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR19 NET sram_addr(20) LOC="P30" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_ADDR20 NET sram_dq(0) LOC="P14" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_DATA0 NET sram_dq(1) LOC="P15" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_DATA1 NET sram_dq(2) LOC="P16" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_DATA2 NET sram_dq(3) LOC="P17" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_DATA3 NET sram_dq(4) LOC="P21" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_DATA4 NET sram_dq(5) LOC="P22" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_DATA5 NET sram_dq(6) LOC="P23" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST ; # SRAM_DATA6 NET sram_dq(7) LOC="P24" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_DATA7 NET sram_ce_n LOC="P12" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_CE NET sram_we_n LOC="P6" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_WE NET sram_oe_n LOC="P26" |IOSTANDARD=LVTTL | DRIVE=8 |IOB=TRUE |SLEW=FAST; # SRAM_OE #NET JTAG_TMS LOC="P107" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TMS #NET JTAG_TCK LOC="P109" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TCK #NET JTAG_TDI LOC="P110" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TDI #NET JTAG_TDO LOC="P106" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TDO #NET FLASH_CS LOC="P38" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_CS #NET FLASH_CK LOC="P70" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_CK #NET FLASH_SI LOC="P64" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_SI #NET FLASH_SO LOC="P65" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # FLASH_SO NET "CLK" TNM_NET = CLK; TIMESPEC TS_CLK = PERIOD "CLK" 31.25 ns HIGH 50%;