{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1680020873375 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1680020873375 ""}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "1 GR8RAM.v(21) " "Verilog HDL Expression warning at GR8RAM.v(21): truncated literal to match 1 bits" { } { { "GR8RAM.v" "" { Text "Y:/Repos/GR8RAM/cpld/GR8RAM.v" 21 0 0 } } } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "Analysis & Synthesis" 0 -1 1680020890672 ""}
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "GR8RAM.v(98) " "Verilog HDL warning at GR8RAM.v(98): extended using \"x\" or \"z\"" { } { { "GR8RAM.v" "" { Text "Y:/Repos/GR8RAM/cpld/GR8RAM.v" 98 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Analysis & Synthesis" 0 -1 1680020890672 ""}
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "GR8RAM.v(277) " "Verilog HDL warning at GR8RAM.v(277): extended using \"x\" or \"z\"" { } { { "GR8RAM.v" "" { Text "Y:/Repos/GR8RAM/cpld/GR8RAM.v" 277 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Analysis & Synthesis" 0 -1 1680020890672 ""}
{ "Error" "EVRFX_VERI_UNDECLARED_OBJECT" "BankSpecSELAny GR8RAM.v(324) " "Verilog HDL error at GR8RAM.v(324): object \"BankSpecSELAny\" is not declared. Verify the object name is correct. If the name is correct, declare the object." { } { { "GR8RAM.v" "" { Text "Y:/Repos/GR8RAM/cpld/GR8RAM.v" 324 0 0 } } } 0 10161 "Verilog HDL error at %2!s!: object \"%1!s!\" is not declared. Verify the object name is correct. If the name is correct, declare the object." 0 0 "Analysis & Synthesis" 0 -1 1680020890672 ""}