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Moved REGEN and IOROMEN (no functional change)
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@ -69,6 +69,8 @@ module GR8RAM(C7M, C7M_2, Q3, PHI0in, PHI1in, nRES, nMode,
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output nCAS1 = ~(CAS1f | (CASr & RAMSEL & Addr[22])); // DRAM CAS bank 1
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output nCAS1 = ~(CAS1f | (CASr & RAMSEL & Addr[22])); // DRAM CAS bank 1
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/* 6502-accessible Registers */
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/* 6502-accessible Registers */
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reg REGEN = 0; // Register enable
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reg IOROMEN = 0; // IOSTRB ROM enable
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reg [7:0] Bank = 0; // Bank register for ROM access
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reg [7:0] Bank = 0; // Bank register for ROM access
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reg [23:0] Addr = 0; // RAM address register
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reg [23:0] Addr = 0; // RAM address register
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@ -86,10 +88,6 @@ module GR8RAM(C7M, C7M_2, Q3, PHI0in, PHI1in, nRES, nMode,
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reg PHI0seen = 0; // Have we seen PHI0 since reset?
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reg PHI0seen = 0; // Have we seen PHI0 since reset?
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reg [2:0] S = 0; // State counter
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reg [2:0] S = 0; // State counter
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reg [3:0] Ref = 0; // Refresh skip counter
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reg [3:0] Ref = 0; // Refresh skip counter
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/* Misc. */
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reg REGEN = 0; // Register enable
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reg IOROMEN = 0; // IOSTRB ROM enable
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reg DBEN = 0; // Data bus driver gating
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reg DBEN = 0; // Data bus driver gating
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reg CSEN = 0; // ROM CS enable gating
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reg CSEN = 0; // ROM CS enable gating
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