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Moved REGEN and IOROMEN (no functional change)

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This commit is contained in:
Zane Kaminski 2020-02-26 03:14:13 -05:00
parent a4f29ea751
commit 92cde65a9d
1 changed files with 2 additions and 4 deletions
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6
cpld/GR8RAM.v
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@ -69,6 +69,8 @@ module GR8RAM(C7M, C7M_2, Q3, PHI0in, PHI1in, nRES, nMode,
output nCAS1 = ~(CAS1f | (CASr & RAMSEL & Addr[22])); // DRAM CAS bank 1
/* 6502-accessible Registers */
reg REGEN = 0; // Register enable
reg IOROMEN = 0; // IOSTRB ROM enable
reg [7:0] Bank = 0; // Bank register for ROM access
reg [23:0] Addr = 0; // RAM address register
@ -86,10 +88,6 @@ module GR8RAM(C7M, C7M_2, Q3, PHI0in, PHI1in, nRES, nMode,
reg PHI0seen = 0; // Have we seen PHI0 since reset?
reg [2:0] S = 0; // State counter
reg [3:0] Ref = 0; // Refresh skip counter
/* Misc. */
reg REGEN = 0; // Register enable
reg IOROMEN = 0; // IOSTRB ROM enable
reg DBEN = 0; // Data bus driver gating
reg CSEN = 0; // ROM CS enable gating