diff --git a/cpld/GR8RAM.v b/cpld/GR8RAM.v
index 8c71879..278c709 100644
--- a/cpld/GR8RAM.v
+++ b/cpld/GR8RAM.v
@@ -58,7 +58,7 @@ module GR8RAM(C25M, PHI0, nRES, nRESout, SetFW,
 	always @(posedge PHI0) CXXXr <= RA[15:12]==4'hC;
 
 	/* Apple select signals */
-	wire RAMExists = (!SetEN24bit || !Addr[23] || Addr[22] || Addr[21]);
+	wire RAMExists = (!SetEN24bit || !Addr[23]);
 	wire BankSEL =   REGEN && !nDEVSEL && RA[3:0]==4'hF;
 	wire SPITX1SEL = REGEN && !nDEVSEL && RA[3:0]==4'hD;
 	wire SPITX0SEL = REGEN && !nDEVSEL && RA[3:0]==4'hC;