52101271 Warning OSCH OSCH_inst 44.30 44.33 5.5 61061008 Warning PHI0_c Secondary PHI0 17 Secondary 1166052 Warning logical OSCH_inst_SEDSTDBY OSCH_inst_SEDSTDBY 1166052 Warning logical CLKin_c CLKin_c 1166052 Warning logical BA_c[11] BA_c[11] 1166052 Warning logical BA_c[12] BA_c[12] 1166052 Warning logical BA_c[13] BA_c[13] 1166052 Warning logical BA_c[14] BA_c[14] 1166052 Warning logical BA_c[15] BA_c[15] 1163101 Warning 7 2011000 Info 2019991 Warning CL246 :"\\Mac\iCloud\Repos\GR8RAM\cpld\GR8RAM.v":15:14:15:15|Input port bits 15 to 11 of BA[15:0] are unused. Assign logic for all port bits or change the input port size. CL246 \\Mac\iCloud\Repos\GR8RAM\cpld\GR8RAM.v 15 14 15 15 Input port bits 15 to 11 of BA[15:0] are unused. Assign logic for all port bits or change the input port size. 2019993 Warning FX474 |User-specified initial value defined for some sequential elements which can prevent optimum synthesis results from being achieved. FX474 User-specified initial value defined for some sequential elements which can prevent optimum synthesis results from being achieved. 2019991 Warning FA239 :"\\mac\icloud\repos\gr8ram\cpld\initcontroller.v":168:4:168:7|ROM nFCSout_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. FA239 \\mac\icloud\repos\gr8ram\cpld\initcontroller.v 168 4 168 7 ROM nFCSout_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. 2019991 Warning FA239 :"\\mac\icloud\repos\gr8ram\cpld\initcontroller.v":168:4:168:7|ROM MOSIOE_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. FA239 \\mac\icloud\repos\gr8ram\cpld\initcontroller.v 168 4 168 7 ROM MOSIOE_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. 2019991 Warning FA239 :"\\mac\icloud\repos\gr8ram\cpld\initcontroller.v":168:4:168:7|ROM RAMCmd_2[2:0] (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. FA239 \\mac\icloud\repos\gr8ram\cpld\initcontroller.v 168 4 168 7 ROM RAMCmd_2[2:0] (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. 2019991 Warning FA239 :"\\mac\icloud\repos\gr8ram\cpld\initcontroller.v":168:4:168:7|ROM nFCSout_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. FA239 \\mac\icloud\repos\gr8ram\cpld\initcontroller.v 168 4 168 7 ROM nFCSout_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. 2019991 Warning FA239 :"\\mac\icloud\repos\gr8ram\cpld\initcontroller.v":168:4:168:7|ROM MOSIOE_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. FA239 \\mac\icloud\repos\gr8ram\cpld\initcontroller.v 168 4 168 7 ROM MOSIOE_2 (in view: work.InitController(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. 2019991 Warning MT246 :"\\mac\icloud\repos\gr8ram\cpld\sdramcontroller.v":203:8:203:16|Blackbox ODDRXE is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) MT246 \\mac\icloud\repos\gr8ram\cpld\sdramcontroller.v 203 8 203 16 Blackbox ODDRXE is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)