Add GW4208A files

This commit is contained in:
Zane Kaminski 2020-07-25 04:49:31 -04:00
parent 993bda1a35
commit eade2bc831
30 changed files with 67807 additions and 0 deletions

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The GW4208A RAM expansion card provides the
Apple II, II+, and IIe with 128 kB of
Language Card and Saturn-compatible
expansion memory.
Low-Power, SRAM-Based Design
----------------------------------------
Thanks to a modern, low-power design,
RAM2GS II uses a maximum of 0.1 watts when idle
(20 mA @ 5V) and 0.2W in active use (40 mA @ 5V).
Unlike other Apple II expansion RAM cards, which are
built with vintage asynchronous DRAM chips,
RAM2GS II uses modern SRAM. This design allows for
low power consumption and improved reliability
over other memory cards using 15+ year old chips.
Ecologically Friendly, Gold-Plated PCB
----------------------------------------
GW4208A features a lead-free, ENIG gold-plated
PCB and is fully EU RoHS-compliant.
All units are tested extensively before shipment.
Only new parts are used to build GW4208A,
and all GW4208A cards are manufactured in our
semi-automated facility in Columbus, Ohio,
in the United States.
Open-Source Design
----------------------------------------
GW4208A's design is fully open-source.
The schematics, board layouts, and
CPLD firmware, are all freely available
for commercial and noncommercial use.
To download the design files, visit the
_Garrett's Workshop GitHub page_.

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Voyager128-cache.lib Normal file
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74xx_74HC245
#
DEF 74xx_74HC245 U 0 40 Y Y 1 L N
F0 "U" -300 650 50 H V C CNN
F1 "74xx_74HC245" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74HC245
$FPLIST
DIP?20*
$ENDFPLIST
DRAW
S -300 600 300 -600 1 1 10 f
P 3 1 0 0 -25 -50 -25 50 25 50 N
P 4 1 0 0 -50 -50 25 -50 25 50 50 50 N
X A->B 1 -500 -400 200 R 50 50 1 0 I
X GND 10 0 -800 200 U 50 50 1 0 W
X B7 11 500 -200 200 L 50 50 1 0 T
X B6 12 500 -100 200 L 50 50 1 0 T
X B5 13 500 0 200 L 50 50 1 0 T
X B4 14 500 100 200 L 50 50 1 0 T
X B3 15 500 200 200 L 50 50 1 0 T
X B2 16 500 300 200 L 50 50 1 0 T
X B1 17 500 400 200 L 50 50 1 0 T
X B0 18 500 500 200 L 50 50 1 0 T
X CE 19 -500 -500 200 R 50 50 1 0 I I
X A0 2 -500 500 200 R 50 50 1 0 T
X VCC 20 0 800 200 D 50 50 1 0 W
X A1 3 -500 400 200 R 50 50 1 0 T
X A2 4 -500 300 200 R 50 50 1 0 T
X A3 5 -500 200 200 R 50 50 1 0 T
X A4 6 -500 100 200 R 50 50 1 0 T
X A5 7 -500 0 200 R 50 50 1 0 T
X A6 8 -500 -100 200 R 50 50 1 0 T
X A7 9 -500 -200 200 R 50 50 1 0 T
ENDDRAW
ENDDEF
#
# 74xx_74LS125
#
DEF 74xx_74LS125 U 0 40 Y Y 5 L N
F0 "U" 0 50 50 H V C CNN
F1 "74xx_74LS125" 0 -50 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LVC125
$FPLIST
DIP*W7.62mm*
$ENDFPLIST
DRAW
S -200 300 200 -300 5 1 10 f
P 4 1 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 2 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 3 0 10 -150 150 -150 -150 150 0 -150 150 f
P 4 4 0 10 -150 150 -150 -150 150 0 -150 150 f
X ~ 1 0 -250 175 U 50 50 1 0 I I
X ~ 2 -300 0 150 R 50 50 1 0 I
X ~ 3 300 0 150 L 50 50 1 0 T
X ~ 4 0 -250 175 U 50 50 2 0 I I
X ~ 5 -300 0 150 R 50 50 2 0 I
X ~ 6 300 0 150 L 50 50 2 0 T
X ~ 10 0 -250 175 U 50 50 3 0 I I
X ~ 8 300 0 150 L 50 50 3 0 T
X ~ 9 -300 0 150 R 50 50 3 0 I
X ~ 11 300 0 150 L 50 50 4 0 T
X ~ 12 -300 0 150 R 50 50 4 0 I
X ~ 13 0 -250 175 U 50 50 4 0 I I
X VCC 14 0 500 200 D 50 50 5 0 W
X GND 7 0 -500 200 U 50 50 5 0 W
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x25_Counter_Clockwise
#
DEF Connector_Generic_Conn_02x25_Counter_Clockwise J 0 40 Y N 1 F N
F0 "J" 50 1300 50 H V C CNN
F1 "Connector_Generic_Conn_02x25_Counter_Clockwise" 50 -1300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 1005 0 995 1 1 6 N
S -50 1105 0 1095 1 1 6 N
S -50 1205 0 1195 1 1 6 N
S -50 1250 150 -1250 1 1 10 f
S 150 -1195 100 -1205 1 1 6 N
S 150 -1095 100 -1105 1 1 6 N
S 150 -995 100 -1005 1 1 6 N
S 150 -895 100 -905 1 1 6 N
S 150 -795 100 -805 1 1 6 N
S 150 -695 100 -705 1 1 6 N
S 150 -595 100 -605 1 1 6 N
S 150 -495 100 -505 1 1 6 N
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
S 150 405 100 395 1 1 6 N
S 150 505 100 495 1 1 6 N
S 150 605 100 595 1 1 6 N
S 150 705 100 695 1 1 6 N
S 150 805 100 795 1 1 6 N
S 150 905 100 895 1 1 6 N
S 150 1005 100 995 1 1 6 N
S 150 1105 100 1095 1 1 6 N
S 150 1205 100 1195 1 1 6 N
X Pin_1 1 -200 1200 150 R 50 50 1 1 P
X Pin_10 10 -200 300 150 R 50 50 1 1 P
X Pin_11 11 -200 200 150 R 50 50 1 1 P
X Pin_12 12 -200 100 150 R 50 50 1 1 P
X Pin_13 13 -200 0 150 R 50 50 1 1 P
X Pin_14 14 -200 -100 150 R 50 50 1 1 P
X Pin_15 15 -200 -200 150 R 50 50 1 1 P
X Pin_16 16 -200 -300 150 R 50 50 1 1 P
X Pin_17 17 -200 -400 150 R 50 50 1 1 P
X Pin_18 18 -200 -500 150 R 50 50 1 1 P
X Pin_19 19 -200 -600 150 R 50 50 1 1 P
X Pin_2 2 -200 1100 150 R 50 50 1 1 P
X Pin_20 20 -200 -700 150 R 50 50 1 1 P
X Pin_21 21 -200 -800 150 R 50 50 1 1 P
X Pin_22 22 -200 -900 150 R 50 50 1 1 P
X Pin_23 23 -200 -1000 150 R 50 50 1 1 P
X Pin_24 24 -200 -1100 150 R 50 50 1 1 P
X Pin_25 25 -200 -1200 150 R 50 50 1 1 P
X Pin_26 26 300 -1200 150 L 50 50 1 1 P
X Pin_27 27 300 -1100 150 L 50 50 1 1 P
X Pin_28 28 300 -1000 150 L 50 50 1 1 P
X Pin_29 29 300 -900 150 L 50 50 1 1 P
X Pin_3 3 -200 1000 150 R 50 50 1 1 P
X Pin_30 30 300 -800 150 L 50 50 1 1 P
X Pin_31 31 300 -700 150 L 50 50 1 1 P
X Pin_32 32 300 -600 150 L 50 50 1 1 P
X Pin_33 33 300 -500 150 L 50 50 1 1 P
X Pin_34 34 300 -400 150 L 50 50 1 1 P
X Pin_35 35 300 -300 150 L 50 50 1 1 P
X Pin_36 36 300 -200 150 L 50 50 1 1 P
X Pin_37 37 300 -100 150 L 50 50 1 1 P
X Pin_38 38 300 0 150 L 50 50 1 1 P
X Pin_39 39 300 100 150 L 50 50 1 1 P
X Pin_4 4 -200 900 150 R 50 50 1 1 P
X Pin_40 40 300 200 150 L 50 50 1 1 P
X Pin_41 41 300 300 150 L 50 50 1 1 P
X Pin_42 42 300 400 150 L 50 50 1 1 P
X Pin_43 43 300 500 150 L 50 50 1 1 P
X Pin_44 44 300 600 150 L 50 50 1 1 P
X Pin_45 45 300 700 150 L 50 50 1 1 P
X Pin_46 46 300 800 150 L 50 50 1 1 P
X Pin_47 47 300 900 150 L 50 50 1 1 P
X Pin_48 48 300 1000 150 L 50 50 1 1 P
X Pin_49 49 300 1100 150 L 50 50 1 1 P
X Pin_5 5 -200 800 150 R 50 50 1 1 P
X Pin_50 50 300 1200 150 L 50 50 1 1 P
X Pin_6 6 -200 700 150 R 50 50 1 1 P
X Pin_7 7 -200 600 150 R 50 50 1 1 P
X Pin_8 8 -200 500 150 R 50 50 1 1 P
X Pin_9 9 -200 400 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R_Small
#
DEF Device_R_Small R 0 10 N N 1 F N
F0 "R" 30 20 50 H V L CNN
F1 "Device_R_Small" 30 -40 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -30 70 30 -70 0 1 8 N
X ~ 1 0 100 30 D 50 50 1 1 P
X ~ 2 0 -100 30 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GW_PLD_GAL22V10-PLCC
#
DEF GW_PLD_GAL22V10-PLCC U 0 40 Y Y 1 F N
F0 "U" 0 300 50 V V C CNN
F1 "GW_PLD_GAL22V10-PLCC" 0 -200 50 V V C CNN
F2 "" 0 -50 50 H I C CNN
F3 "" 0 -50 50 H I C CNN
DRAW
S -250 600 250 -700 0 1 10 f
X IN 10 -400 -200 150 R 50 50 1 1 P
X IN 11 -400 -300 150 R 50 50 1 1 P
X IN 12 -400 -400 150 R 50 50 1 1 P
X IN 13 -400 -500 150 R 50 50 1 1 P
X GND 14 400 -600 150 L 50 50 1 1 W
X IN 16 -400 -600 150 R 50 50 1 1 P
X I/O 17 400 -500 150 L 50 50 1 1 P
X I/O 18 400 -400 150 L 50 50 1 1 P
X I/O 19 400 -300 150 L 50 50 1 1 P
X CLK/IN 2 -400 500 150 R 50 50 1 1 P
X I/O 20 400 -200 150 L 50 50 1 1 P
X I/O 21 400 -100 150 L 50 50 1 1 P
X I/O 23 400 0 150 L 50 50 1 1 P
X I/O 24 400 100 150 L 50 50 1 1 P
X I/O 25 400 200 150 L 50 50 1 1 P
X I/O 26 400 300 150 L 50 50 1 1 P
X I/O 27 400 400 150 L 50 50 1 1 P
X Vcc 28 400 500 150 L 50 50 1 1 W
X IN 3 -400 400 150 R 50 50 1 1 P
X IN 4 -400 300 150 R 50 50 1 1 P
X IN 5 -400 200 150 R 50 50 1 1 P
X IN 6 -400 100 150 R 50 50 1 1 P
X IN 7 -400 0 150 R 50 50 1 1 P
X IN 9 -400 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GW_RAM_SRAM-128Kx8-SOP-32
#
DEF GW_RAM_SRAM-128Kx8-SOP-32 U? 0 20 Y Y 1 F N
F0 "U?" 0 950 50 H V C CNN
F1 "GW_RAM_SRAM-128Kx8-SOP-32" 0 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TSOP?I*11.8x8mm*P0.5mm*
TSOP?I*18.4x8mm*P0.5mm*
$ENDFPLIST
DRAW
S -300 900 300 -900 1 1 10 f
X NC 1 400 -200 100 L 50 50 1 1 N N
X A2 10 -400 600 100 R 50 50 1 1 I
X A1 11 -400 700 100 R 50 50 1 1 I
X A0 12 -400 800 100 R 50 50 1 1 I
X D0 13 400 600 100 L 50 50 1 1 B
X D1 14 400 500 100 L 50 50 1 1 B
X D2 15 400 400 100 L 50 50 1 1 B
X GND 16 400 -800 100 L 50 50 1 1 W
X D3 17 400 300 100 L 50 50 1 1 B
X D4 18 400 200 100 L 50 50 1 1 B
X D5 19 400 100 100 L 50 50 1 1 B
X A16 2 -400 -800 100 R 50 50 1 1 I
X D6 20 400 0 100 L 50 50 1 1 B
X D7 21 400 -100 100 L 50 50 1 1 B
X ~CS~ 22 400 -300 100 L 50 50 1 1 I
X A10 23 -400 -200 100 R 50 50 1 1 I
X ~OE 24 400 -600 100 L 50 50 1 1 I
X A11 25 -400 -300 100 R 50 50 1 1 I
X A9 26 -400 -100 100 R 50 50 1 1 I
X A8 27 -400 0 100 R 50 50 1 1 I
X A13 28 -400 -500 100 R 50 50 1 1 I
X ~WE 29 400 -500 100 L 50 50 1 1 I
X A14 3 -400 -600 100 R 50 50 1 1 I
X CS 30 400 -400 100 L 50 50 1 1 I
X A15 31 -400 -700 100 R 50 50 1 1 I
X VCC 32 400 800 100 L 50 50 1 1 W
X A12 4 -400 -400 100 R 50 50 1 1 I
X A7 5 -400 100 100 R 50 50 1 1 I
X A6 6 -400 200 100 R 50 50 1 1 I
X A5 7 -400 300 100 R 50 50 1 1 I
X A4 8 -400 400 100 R 50 50 1 1 I
X A3 9 -400 500 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# Mechanical_Fiducial
#
DEF Mechanical_Fiducial FID 0 20 Y Y 1 F N
F0 "FID" 0 200 50 H V C CNN
F1 "Mechanical_Fiducial" 0 125 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Fiducial*
$ENDFPLIST
DRAW
C 0 0 50 0 1 20 f
ENDDRAW
ENDDEF
#
# Mechanical_MountingHole_Pad
#
DEF Mechanical_MountingHole_Pad H 0 40 N N 1 F N
F0 "H" 0 250 50 H V C CNN
F1 "Mechanical_MountingHole_Pad" 0 175 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
MountingHole*Pad*
$ENDFPLIST
DRAW
C 0 50 50 0 1 50 N
X 1 1 0 -100 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# power_+12V
#
DEF power_+12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+12V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_-12V
#
DEF power_-12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 100 50 H I C CNN
F1 "power_-12V" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F
X -12V 1 0 0 0 U 50 50 0 0 W N
ENDDRAW
ENDDEF
#
# power_-5V
#
DEF power_-5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 100 50 H I C CNN
F1 "power_-5V" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F
X -5V 1 0 0 0 U 50 50 0 0 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

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Voyager128-gerber.zip Normal file

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Voyager128.kicad_pcb Normal file

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update=Wednesday, February 19, 2020 at 07:32:36 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=Voyager128.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.1524
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.1524
TrackWidth2=0.2
TrackWidth3=0.254
TrackWidth4=0.508
TrackWidth5=0.762
TrackWidth6=1.016
TrackWidth7=1.27
TrackWidth8=1.524
ViaDiameter1=0.6
ViaDrill1=0.3
ViaDiameter2=0.8
ViaDrill2=0.4
ViaDiameter3=1.524
ViaDrill3=0.762
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.1524
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.07619999999999999
SolderMaskMinWidth=0.127
SolderPasteClearance=-0.03809999999999999
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1524
TrackWidth=0.1524
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

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Voyager128.sch Normal file

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(fp_lib_table
(lib (name stdpads)(type KiCad)(uri "$(KIPRJMOD)/../stdpads.pretty")(options "")(descr ""))
)

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gerber/Voyager128-B_Cu.gbl Normal file

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gerber/Voyager128-B_Mask.gbs Normal file

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G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.5-0-10_14)*
G04 #@! TF.CreationDate,2020-04-11T03:56:32-04:00*
G04 #@! TF.ProjectId,Voyager128,566f7961-6765-4723-9132-382e6b696361,rev?*
G04 #@! TF.SameCoordinates,Original*
G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2020-04-11 03:56:32*
%MOMM*%
%LPD*%
G04 APERTURE LIST*
%ADD10C,0.150000*%
G04 APERTURE END LIST*
D10*
X139446000Y-106553000D02*
X139446000Y-132080000D01*
X68326001Y-113664999D02*
X77470000Y-104521000D01*
X67818000Y-115189000D02*
X67818000Y-129540000D01*
X77470000Y-104521000D02*
G75*
G02X78994000Y-104013000I1524000J-2032000D01*
G01*
X78994000Y-104013000D02*
X136906000Y-104013000D01*
X70358000Y-132080000D02*
X73914000Y-132080000D01*
X68326001Y-113664999D02*
G75*
G03X67818000Y-115189000I2031999J-1524001D01*
G01*
X136906000Y-104013000D02*
G75*
G02X139446000Y-106553000I0J-2540000D01*
G01*
X139446000Y-132080000D02*
X139446000Y-139192000D01*
X70358000Y-132080000D02*
G75*
G02X67818000Y-129540000I0J2540000D01*
G01*
X73914000Y-132080000D02*
X73914000Y-139192000D01*
X139446000Y-139192000D02*
G75*
G02X138938000Y-139700000I-508000J0D01*
G01*
X74422000Y-139700000D02*
G75*
G02X73914000Y-139192000I0J508000D01*
G01*
X138938000Y-139700000D02*
X74422000Y-139700000D01*
M02*

24044
gerber/Voyager128-F_Cu.gtl Normal file

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5786
gerber/Voyager128-F_Mask.gts Normal file

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10071
gerber/Voyager128-F_SilkS.gto Normal file

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### Module positions - created on Saturday, April 11, 2020 at 03:56:36 AM ###
### Printed by Pcbnew version kicad (5.1.5-0-10_14)
## Unit = mm, Angle = deg.
## Side : bottom
# Ref Val Package PosX PosY Rot Side
## End

2756
gerber/Voyager128-drl_map.ps Normal file

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### Module positions - created on Saturday, April 11, 2020 at 03:56:36 AM ###
### Printed by Pcbnew version kicad (5.1.5-0-10_14)
## Unit = mm, Angle = deg.
## Side : top
# Ref Val Package PosX PosY Rot Side
C1 2u2 C_0805 136.3100 -127.8890 180.0000 top
C2 2u2 C_0805 92.9640 -126.7850 90.0000 top
C3 2u2 C_0805 120.1810 -110.1090 180.0000 top
C4 2u2 C_0805 134.7225 -112.7760 180.0000 top
C5 2u2 C_0805 77.0500 -127.8890 0.0000 top
C6 2u2 C_0805 78.8670 -119.1650 90.0000 top
FID1 Fiducial Fiducial 136.9060 -106.5530 270.0000 top
FID2 Fiducial Fiducial 70.3580 -115.1890 90.0000 top
FID3 Fiducial Fiducial 78.9940 -106.5530 180.0000 top
FID4 Fiducial Fiducial 136.9060 -124.8410 0.0000 top
FID5 Fiducial Fiducial 70.3580 -129.5400 0.0000 top
R1 1k R_0805 122.8700 -129.5400 180.0000 top
U1 74HCT245 SOIC-20W_7.5mm 86.4870 -114.3000 180.0000 top
U2 LY621024 SOP-32_P1.27mm 102.3620 -118.1100 180.0000 top
U3 GAL22V10 PLCC-28 119.7610 -118.7450 0.0000 top
U4 74LS125 SOIC-14_3.9mm 133.0960 -118.7450 0.0000 top
## End

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M48
; DRILL file {KiCad (5.1.5-0-10_14)} date Saturday, April 11, 2020 at 03:56:32 AM
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2020-04-11T03:56:32-04:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14)
FMAT,2
INCH
T1C0.0118
T2C0.0157
T3C0.0300
T4C0.0433
%
G90
G05
T1
X2.95Y-5.17
X3.05Y-5.17
X3.135Y-4.86
X3.15Y-5.17
X3.1575Y-5.0525
X3.16Y-4.275
X3.16Y-4.325
X3.16Y-4.375
X3.16Y-4.425
X3.16Y-4.475
X3.16Y-4.525
X3.16Y-4.575
X3.16Y-4.625
X3.2025Y-5.08
X3.25Y-5.17
X3.305Y-4.8
X3.325Y-4.65
X3.325Y-4.7
X3.35Y-5.07
X3.405Y-4.65
X3.4175Y-4.5
X3.45Y-5.17
X3.47Y-4.965
X3.4775Y-5.0725
X3.5Y-4.675
X3.505Y-4.22
X3.525Y-4.91
X3.535Y-5.03
X3.55Y-5.17
X3.65Y-5.17
X3.67Y-4.765
X3.68Y-4.5
X3.68Y-4.8675
X3.681Y-5.118
X3.696Y-4.669
X3.71Y-4.625
X3.75Y-5.17
X3.835Y-4.625
X3.835Y-4.675
X3.835Y-4.725
X3.835Y-4.775
X3.835Y-4.825
X3.835Y-4.875
X3.835Y-5.025
X3.85Y-5.17
X3.875Y-4.325
X3.875Y-4.375
X3.875Y-4.425
X3.8775Y-4.865
X3.93Y-4.72
X3.945Y-4.45
X3.95Y-5.17
X3.995Y-4.4
X4.02Y-4.45
X4.045Y-4.35
X4.045Y-4.6
X4.05Y-4.9
X4.05Y-5.025
X4.05Y-5.075
X4.05Y-5.17
X4.07Y-4.4
X4.07Y-4.475
X4.07Y-4.525
X4.075Y-4.815
X4.15Y-4.85
X4.15Y-4.95
X4.15Y-5.17
X4.1775Y-4.76
X4.195Y-4.475
X4.25Y-5.17
X4.35Y-4.775
X4.35Y-4.825
X4.35Y-4.875
X4.35Y-4.925
X4.35Y-4.975
X4.35Y-5.17
X4.355Y-4.325
X4.355Y-4.375
X4.355Y-4.425
X4.355Y-4.475
X4.355Y-4.525
X4.355Y-4.575
X4.385Y-4.8
X4.385Y-4.85
X4.4225Y-5.075
X4.445Y-4.525
X4.445Y-4.575
X4.445Y-4.625
X4.445Y-4.775
X4.45Y-5.17
X4.4725Y-4.985
X4.5Y-4.375
X4.54Y-4.985
X4.55Y-4.325
X4.55Y-5.17
X4.565Y-4.405
X4.59Y-5.06
X4.615Y-4.405
X4.615Y-4.945
X4.65Y-5.17
X4.66Y-4.24
X4.665Y-4.405
X4.665Y-4.8475
X4.75Y-5.17
X4.765Y-4.945
X4.8Y-5.145
X4.815Y-4.945
X4.85Y-5.17
X4.855Y-5.0
X4.865Y-4.945
X4.87Y-4.24
X4.945Y-5.1
X4.95Y-5.17
X4.985Y-4.725
X4.985Y-4.825
X5.035Y-5.0
X5.05Y-5.17
X5.085Y-4.675
X5.15Y-5.17
X5.2Y-4.675
X5.2Y-5.16
X5.25Y-5.17
X5.27Y-4.575
X5.28Y-4.775
X5.3Y-5.16
X5.35Y-5.17
X5.4Y-4.985
X5.45Y-5.17
T2
X2.71Y-4.515
X2.71Y-4.715
X2.71Y-4.915
X2.71Y-5.115
X2.755Y-5.16
X2.81Y-5.015
X2.835Y-4.39
X2.86Y-4.61
X2.965Y-4.26
X3.0Y-4.6575
X3.065Y-5.085
X3.07Y-4.985
X3.09Y-4.135
X3.11Y-5.035
X3.16Y-4.725
X3.2225Y-4.76
X3.245Y-4.135
X3.285Y-4.725
X3.445Y-4.135
X3.525Y-4.275
X3.5875Y-4.24
X3.61Y-4.96
X3.61Y-5.025
X3.645Y-4.135
X3.65Y-4.275
X3.66Y-4.915
X3.7Y-4.3
X3.71Y-5.025
X3.845Y-4.135
X4.045Y-4.135
X4.225Y-4.275
X4.245Y-4.135
X4.2875Y-4.24
X4.355Y-4.275
X4.445Y-4.135
X4.645Y-4.135
X4.655Y-4.335
X4.665Y-4.95
X4.7Y-4.285
X4.765Y-4.285
X4.765Y-4.385
X4.765Y-4.51
X4.81Y-4.335
X4.845Y-4.135
X5.045Y-4.135
X5.08Y-4.525
X5.08Y-4.825
X5.1425Y-4.49
X5.1425Y-4.86
X5.205Y-4.525
X5.205Y-4.825
X5.2275Y-4.44
X5.245Y-4.135
X5.27Y-4.39
X5.275Y-4.525
X5.29Y-5.035
X5.335Y-4.985
X5.335Y-5.085
X5.3375Y-4.39
X5.3375Y-4.49
X5.38Y-4.44
X5.4Y-4.525
X5.405Y-4.135
X5.45Y-4.18
X5.45Y-4.34
X5.45Y-4.54
X5.45Y-4.74
X5.45Y-4.94
T3
X3.0Y-5.1
X5.4Y-5.1
T4
X5.29Y-4.195
X3.21Y-4.195
X2.77Y-4.635
X5.25Y-5.1
X2.87Y-5.1
T0
M30

176
pal/GW4208-UES-GW4208A0.JED Executable file
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@ -0,0 +1,176 @@
PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
TITLE :GW4208 AUTHOR :Garrett's Workshop
PATTERN : COMPANY:02/18/20
REVISION:Zane Kaminski DATE :02/18/20

Device G22V10 converted from PAL22V10 JEDEC map.
PAL to GAL JEDEC conversion utility - paltogal v3.12 17 November 1992
Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
Input File: \\vmware-host\shared folders\repos\voyager128\pal\gw4208.jed
Output File: gw4208-g.jed
The Date: Tue May 05 22:24:31 2020
PAL22V10
_GW4208*
QP24*
QF5892*
G0*F0*
L00000 11111111111111111111111111111111111111111110*
L00044 11111111111111111111111111111111111111111111*
L00088 11111011111011111111111101111111011101110111*
L00132 11111011111011111111111111110111011101110111*
L00176 11111010111111111111111101111111011101111011*
L00220 11111010111111111111111111110111011101111011*
L00264 11111010111011111111111101111111011101111111*
L00308 11111010111011111111111111110111011101111111*
L00352 00000000000000000000000000000000000000000000*
L00396 00000000000000000000000000000000000000000000*
L00440 11111111111111111111111111111111111111111111*
L00484 11111110111111110111111111111111111111111111*
L00528 11111111011111111011111111101111111111111111*
L00572 00000000000000000000000000000000000000000000*
L00616 00000000000000000000000000000000000000000000*
L00660 00000000000000000000000000000000000000000000*
L00704 00000000000000000000000000000000000000000000*
L00748 00000000000000000000000000000000000000000000*
L00792 00000000000000000000000000000000000000000000*
L00836 00000000000000000000000000000000000000000000*
L00880 00000000000000000000000000000000000000000000*
L00924 11111111111111111111111111111111111111111111*
L00968 11111111111011110111111111111111111111111111*
L01012 11111111101110111011111111111111111111111111*
L01056 11111111011101111011111111111111111111111111*
L01100 00000000000000000000000000000000000000000000*
L01144 00000000000000000000000000000000000000000000*
L01188 00000000000000000000000000000000000000000000*
L01232 00000000000000000000000000000000000000000000*
L01276 00000000000000000000000000000000000000000000*
L01320 00000000000000000000000000000000000000000000*
L01364 00000000000000000000000000000000000000000000*
L01408 00000000000000000000000000000000000000000000*
L01452 00000000000000000000000000000000000000000000*
L01496 11111111111111111111111111111111111111111111*
L01540 11111111111111100111111111111111111111111111*
L01584 11111111111111111011011111111111111111111111*
L01628 00000000000000000000000000000000000000000000*
L01672 00000000000000000000000000000000000000000000*
L01716 00000000000000000000000000000000000000000000*
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L01804 00000000000000000000000000000000000000000000*
L01848 00000000000000000000000000000000000000000000*
L01892 00000000000000000000000000000000000000000000*
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L02024 00000000000000000000000000000000000000000000*
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L02112 00000000000000000000000000000000000000000000*
L02156 11111111111111111111111111111111111111111111*
L02200 11111111111011111111111101111111011101110111*
L02244 11111111111011111111111111110111011101110111*
L02288 11111110111111111111111101111111011101111011*
L02332 11111110111111111111111111110111011101111011*
L02376 11111110111011111111111101111111011101111111*
L02420 11111110111011111111111111110111011101111111*
L02464 00000000000000000000000000000000000000000000*
L02508 00000000000000000000000000000000000000000000*
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L02904 11111111111111111111111111111111111111111111*
L02948 11111111111111101111111111111011111111111111*
L02992 11111111111111111111111101110111111111111111*
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L03608 00000000000000000000000000000000000000000000*
L03652 11111111111111111111111111111111111111111111*
L03696 11111111111111110111111111101111111111111111*
L03740 11111111011111111011111111111111111111111111*
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L04004 00000000000000000000000000000000000000000000*
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L04224 00000000000000000000000000000000000000000000*
L04268 00000000000000000000000000000000000000000000*
L04312 11111111111111111111111111111111111111111111*
L04356 11111111011111110111111111111111111111111111*
L04400 11111111111111111011111111111110111111111111*
L04444 00000000000000000000000000000000000000000000*
L04488 00000000000000000000000000000000000000000000*
L04532 00000000000000000000000000000000000000000000*
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L04620 00000000000000000000000000000000000000000000*
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L04708 00000000000000000000000000000000000000000000*
L04752 00000000000000000000000000000000000000000000*
L04796 00000000000000000000000000000000000000000000*
L04840 00000000000000000000000000000000000000000000*
L04884 11111111111111111111111111111111111111111111*
L04928 11111111111101110111111111111111111111111111*
L04972 11111111111111111011111111111111111011111111*
L05016 00000000000000000000000000000000000000000000*
L05060 00000000000000000000000000000000000000000000*
L05104 00000000000000000000000000000000000000000000*
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L05192 00000000000000000000000000000000000000000000*
L05236 00000000000000000000000000000000000000000000*
L05280 00000000000000000000000000000000000000000000*
L05324 00000000000000000000000000000000000000000000*
L05368 11111111111111111111111111111111111111111111*
L05412 11111111111111110111011111111111111111111111*
L05456 11111111111111111011111111111111111111101111*
L05500 00000000000000000000000000000000000000000000*
L05544 00000000000000000000000000000000000000000000*
L05588 00000000000000000000000000000000000000000000*
L05632 00000000000000000000000000000000000000000000*
L05676 00000000000000000000000000000000000000000000*
L05720 00000000000000000000000000000000000000000000*
L05764 00000000000000000000000000000000000000000000*
N ==> Architecture Control *
L05808 01101010011110101010*
N ==> Signature is "GW4208A0" *
L05828 01000111010101110011010000110010001100000011*
L05872 10000100000100110000*
CD6F6*
0000

150
pal/GW4208.JED Normal file
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PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
TITLE :GW4208 AUTHOR :Garrett's Workshop
PATTERN : COMPANY:02/18/20
REVISION:Zane Kaminski DATE :02/18/20

PAL22V10
_GW4208*
QP24*
QF5828*
G0*F0*
L0000 11111111111111111111111111111111111111111110*
L0044 11111111111111111111111111111111111111111111*
L0088 11111011111011111111111101111111011101110111*
L0132 11111011111011111111111111110111011101110111*
L0176 11111010111111111111111101111111011101111011*
L0220 11111010111111111111111111110111011101111011*
L0264 11111010111011111111111101111111011101111111*
L0308 11111010111011111111111111110111011101111111*
L0352 00000000000000000000000000000000000000000000*
L0396 00000000000000000000000000000000000000000000*
L0440 11111111111111111111111111111111111111111111*
L0484 11111110111111110111111111111111111111111111*
L0528 11111111011111111011111111101111111111111111*
L0572 00000000000000000000000000000000000000000000*
L0616 00000000000000000000000000000000000000000000*
L0660 00000000000000000000000000000000000000000000*
L0704 00000000000000000000000000000000000000000000*
L0748 00000000000000000000000000000000000000000000*
L0792 00000000000000000000000000000000000000000000*
L0836 00000000000000000000000000000000000000000000*
L0880 00000000000000000000000000000000000000000000*
L0924 11111111111111111111111111111111111111111111*
L0968 11111111111011110111111111111111111111111111*
L1012 11111111101110111011111111111111111111111111*
L1056 11111111011101111011111111111111111111111111*
L1100 00000000000000000000000000000000000000000000*
L1144 00000000000000000000000000000000000000000000*
L1188 00000000000000000000000000000000000000000000*
L1232 00000000000000000000000000000000000000000000*
L1276 00000000000000000000000000000000000000000000*
L1320 00000000000000000000000000000000000000000000*
L1364 00000000000000000000000000000000000000000000*
L1408 00000000000000000000000000000000000000000000*
L1452 00000000000000000000000000000000000000000000*
L1496 11111111111111111111111111111111111111111111*
L1540 11111111111111100111111111111111111111111111*
L1584 11111111111111111011011111111111111111111111*
L1628 00000000000000000000000000000000000000000000*
L1672 00000000000000000000000000000000000000000000*
L1716 00000000000000000000000000000000000000000000*
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L1804 00000000000000000000000000000000000000000000*
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L1892 00000000000000000000000000000000000000000000*
L1936 00000000000000000000000000000000000000000000*
L1980 00000000000000000000000000000000000000000000*
L2024 00000000000000000000000000000000000000000000*
L2068 00000000000000000000000000000000000000000000*
L2112 00000000000000000000000000000000000000000000*
L2156 11111111111111111111111111111111111111111111*
L2200 11111111111011111111111101111111011101110111*
L2244 11111111111011111111111111110111011101110111*
L2288 11111110111111111111111101111111011101111011*
L2332 11111110111111111111111111110111011101111011*
L2376 11111110111011111111111101111111011101111111*
L2420 11111110111011111111111111110111011101111111*
L2464 00000000000000000000000000000000000000000000*
L2508 00000000000000000000000000000000000000000000*
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L2860 00000000000000000000000000000000000000000000*
L2904 11111111111111111111111111111111111111111111*
L2948 11111111111111101111111111111011111111111111*
L2992 11111111111111111111111101110111111111111111*
L3036 00000000000000000000000000000000000000000000*
L3080 00000000000000000000000000000000000000000000*
L3124 00000000000000000000000000000000000000000000*
L3168 00000000000000000000000000000000000000000000*
L3212 00000000000000000000000000000000000000000000*
L3256 00000000000000000000000000000000000000000000*
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L3432 00000000000000000000000000000000000000000000*
L3476 00000000000000000000000000000000000000000000*
L3520 00000000000000000000000000000000000000000000*
L3564 00000000000000000000000000000000000000000000*
L3608 00000000000000000000000000000000000000000000*
L3652 11111111111111111111111111111111111111111111*
L3696 11111111111111110111111111101111111111111111*
L3740 11111111011111111011111111111111111111111111*
L3784 00000000000000000000000000000000000000000000*
L3828 00000000000000000000000000000000000000000000*
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L3916 00000000000000000000000000000000000000000000*
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L4004 00000000000000000000000000000000000000000000*
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L4092 00000000000000000000000000000000000000000000*
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L4224 00000000000000000000000000000000000000000000*
L4268 00000000000000000000000000000000000000000000*
L4312 11111111111111111111111111111111111111111111*
L4356 11111111011111110111111111111111111111111111*
L4400 11111111111111111011111111111110111111111111*
L4444 00000000000000000000000000000000000000000000*
L4488 00000000000000000000000000000000000000000000*
L4532 00000000000000000000000000000000000000000000*
L4576 00000000000000000000000000000000000000000000*
L4620 00000000000000000000000000000000000000000000*
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L4708 00000000000000000000000000000000000000000000*
L4752 00000000000000000000000000000000000000000000*
L4796 00000000000000000000000000000000000000000000*
L4840 00000000000000000000000000000000000000000000*
L4884 11111111111111111111111111111111111111111111*
L4928 11111111111101110111111111111111111111111111*
L4972 11111111111111111011111111111111111011111111*
L5016 00000000000000000000000000000000000000000000*
L5060 00000000000000000000000000000000000000000000*
L5104 00000000000000000000000000000000000000000000*
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L5192 00000000000000000000000000000000000000000000*
L5236 00000000000000000000000000000000000000000000*
L5280 00000000000000000000000000000000000000000000*
L5324 00000000000000000000000000000000000000000000*
L5368 11111111111111111111111111111111111111111111*
L5412 11111111111111110111011111111111111111111111*
L5456 11111111111111111011111111111111111111101111*
L5500 00000000000000000000000000000000000000000000*
L5544 00000000000000000000000000000000000000000000*
L5588 00000000000000000000000000000000000000000000*
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L5720 00000000000000000000000000000000000000000000*
L5764 00000000000000000000000000000000000000000000*
L5808 01101010011110101010*
CD22B*
1AB5

124
pal/GW4208.SIM Normal file
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SIMULATION
TRACE_ON PHI1 /DEVSEL A0 A1 A2 A3 A12 A13 A14 A15 /WE /RES RA16 RA15 RA14 RA12 /INH /RCS BankAB ENRD ENWR ENWR0
SETF PHI1 /DEVSEL /A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE RES
SETF PHI1 /DEVSEL /A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE RES
SETF PHI1 /DEVSEL /A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL /A3 A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL /A3 A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 /A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 /A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 /A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 /A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF /PHI1 DEVSEL A3 A2 A1 A0 A12 A13 /A14 /A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 WE /RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 WE /RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
SETF /PHI1 /DEVSEL A3 A2 A1 A0 A12 A13 A14 A15 /WE /RES
TRACE_OFF

62
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PALASM4 PLDSIM - MARKET RELEASE 1.5 (7-10-92)
(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
PALASM SIMULATION SELECTIVE TRACE LISTING
Title : GW4208 Author : Garrett's Worksho
Pattern : Company : 02/18/20
Revision : Zane Kaminski Date : 02/18/20
PAL22V10
Page : 1
gggggggggggggggggggggggggggggggggggggggggggggggggggggggggggg
PHI1 HHHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHH
/DEVSEL HHHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHH
A0 LLLLLLLHHHHLLLLHHHHHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLH
A1 LLLLLLLLLLLHHHHHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLL
A2 LLLLLLLLLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLHHHHH
A3 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHHHHHHH
A12 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
A13 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
A14 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
A15 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
/WE HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
/RES LLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
RA16 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHH
RA15 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHHHHHHHHHHLL
RA14 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHLLLLHHHHHHHHHHHHHHHHHHHHLL
RA12 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
/INH HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
/RCS HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
BANKAB LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHHHH
ENRD LLLLLLHHHHLLLLLLLLHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLHHHHHH
ENWR LLLLLLLLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLLL
ENWR0 LLLLLLLLLLHHHHLLLLHHHHHHHHHHHHHHHHHHHHHHHHLLLLHHHHLLLLHHHHHH
PAL22V10
Page : 2
gggggggggggggggggggggggggggggg
PHI1 LLHHLLHHLLHHLLHHLLHHLLHHLLHHLL
/DEVSEL LLHHLLHHLLHHHHHHHHHHHHHHHHHHHH
A0 HHHLLLLHHHHHHHHHHHHHHHHHHHHHHH
A1 LLLHHHHHHHHHHHHHHHHHHHHHHHHHHH
A2 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
A3 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
A12 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
A13 HHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
A14 LLLLLLLLLLHHHHHHHHHHHHHHHHHHHH
A15 LLLLLLLLLLHHHHHHHHHHHHHHHHHHHH
/WE HHHHHHHHHHHHHHLLLLHHHHHHHHHHHH
/RES HHHHHHHHHHHHHHHHHHHHLLLLLLHHHH
RA16 HHHHHHHHHHHHHHHHHHHHLLLLLLLLLL
RA15 LLLLLLHHHHHHHHHHHHHHLLLLLLLLLL
RA14 LLHHHHLLLLHHHHHHHHHHLLLLLLLLLL
RA12 LLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
/INH HHHHHHHHHHLLLLHHHHLLHHHHHHHHHH
/RCS HHHHHHHHHHHHLLHHHHHHHHHHHHHHHH
BANKAB HHHHHHHHHHHHHHHHHHHHLLLLLLLLLL
ENRD HHHHHHHHHHHHHHHHHHHHLLLLLLLLLL
ENWR LLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
ENWR0 HHHHHHHHHHHHHHHHHHHHLLLLLLLLLL

172
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PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
TITLE :GW4208 AUTHOR :Garrett's Workshop
PATTERN : COMPANY:02/18/20
REVISION:Zane Kaminski DATE :02/18/20
PAL22V10
_GW4208
11 1111 1111 2222 2222 2233 3333 3333 4444
0123 4567 8901 2345 6789 0123 4567 8901 2345 6789 0123
0 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---X
1 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
2 ---- -X-- ---X ---- ---- ---- X--- ---- X--- X--- X---
3 ---- -X-- ---X ---- ---- ---- ---- X--- X--- X--- X---
4 ---- -X-X ---- ---- ---- ---- X--- ---- X--- X--- -X--
5 ---- -X-X ---- ---- ---- ---- ---- X--- X--- X--- -X--
6 ---- -X-X ---X ---- ---- ---- X--- ---- X--- X--- ----
7 ---- -X-X ---X ---- ---- ---- ---- X--- X--- X--- ----
8 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
9 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
10 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
11 ---- ---X ---- ---- X--- ---- ---- ---- ---- ---- ----
12 ---- ---- X--- ---- -X-- ---- ---X ---- ---- ---- ----
13 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
14 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
15 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
16 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
17 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
18 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
19 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
20 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
21 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
22 ---- ---- ---X ---- X--- ---- ---- ---- ---- ---- ----
23 ---- ---- -X-- -X-- -X-- ---- ---- ---- ---- ---- ----
24 ---- ---- X--- X--- -X-- ---- ---- ---- ---- ---- ----
25 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
26 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
27 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
28 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
29 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
30 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
31 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
32 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
33 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
34 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
35 ---- ---- ---- ---X X--- ---- ---- ---- ---- ---- ----
36 ---- ---- ---- ---- -X-- X--- ---- ---- ---- ---- ----
37 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
38 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
39 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
40 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
41 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
42 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
43 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
44 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
45 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
46 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
47 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
48 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
49 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
50 ---- ---- ---X ---- ---- ---- X--- ---- X--- X--- X---
51 ---- ---- ---X ---- ---- ---- ---- X--- X--- X--- X---
52 ---- ---X ---- ---- ---- ---- X--- ---- X--- X--- -X--
53 ---- ---X ---- ---- ---- ---- ---- X--- X--- X--- -X--
54 ---- ---X ---X ---- ---- ---- X--- ---- X--- X--- ----
55 ---- ---X ---X ---- ---- ---- ---- X--- X--- X--- ----
56 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
57 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
58 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
59 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
60 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
61 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
62 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
63 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
64 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
65 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
66 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
67 ---- ---- ---- ---X ---- ---- ---- -X-- ---- ---- ----
68 ---- ---- ---- ---- ---- ---- X--- X--- ---- ---- ----
69 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
70 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
71 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
72 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
73 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
74 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
75 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
76 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
77 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
78 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
79 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
80 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
81 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
82 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
83 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
84 ---- ---- ---- ---- X--- ---- ---X ---- ---- ---- ----
85 ---- ---- X--- ---- -X-- ---- ---- ---- ---- ---- ----
86 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
87 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
88 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
89 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
90 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
91 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
92 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
93 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
94 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
95 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
96 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
97 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
98 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
99 ---- ---- X--- ---- X--- ---- ---- ---- ---- ---- ----
100 ---- ---- ---- ---- -X-- ---- ---- ---X ---- ---- ----
101 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
102 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
103 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
104 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
105 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
106 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
107 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
108 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
109 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
110 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
111 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
112 ---- ---- ---- X--- X--- ---- ---- ---- ---- ---- ----
113 ---- ---- ---- ---- -X-- ---- ---- ---- ---X ---- ----
114 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
115 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
116 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
117 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
118 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
119 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
120 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
121 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
122 ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
123 ---- ---- ---- ---- X--- X--- ---- ---- ---- ---- ----
124 ---- ---- ---- ---- -X-- ---- ---- ---- ---- ---X ----
125 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
126 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
127 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
128 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
129 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
130 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
131 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
SUMMARY
-------
OUTPUT PINS: 1111112222
4567890123
POLARITY FUSES: -----X---X
OUTPUT PINS: 1111112222
4567890123
REG BYPASS FUSES: XXXX--XXX-
TOTAL FUSES BLOWN = 1667

78
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;PALASM Design Description
;---------------------------------- Declaration Segment ------------
TITLE GW4208
PATTERN
REVISION Zane Kaminski
AUTHOR Garrett's Workshop
COMPANY 02/18/20
DATE 02/18/20
CHIP _GW4208 PAL22V10
;---------------------------------- PIN Declarations ---------------
NODE 1 GLOBAL ;
PIN 1 /DEVSEL ;
PIN 2 PHI1 ;
PIN 3 A0 ;
PIN 4 A1 ;
PIN 5 A2 ;
PIN 6 A3 ;
PIN 7 A12 ;
PIN 8 A13 ;
PIN 9 A14 ;
PIN 10 A15 ;
PIN 11 /WE ;
PIN 13 /RES ;
PIN 14 RA16 REGISTERED ;
PIN 15 RA15 REGISTERED ;
PIN 16 RA14 REGISTERED ;
PIN 18 RA12 COMBINATORIAL ;
PIN 19 /INH COMBINATORIAL ;
PIN 23 /RCS COMBINATORIAL ;
PIN 20 BankAB REGISTERED ;
PIN 21 ENRD REGISTERED ;
PIN 22 ENWR REGISTERED ;
PIN 17 PREWR REGISTERED ;
;----------------------------------- Boolean Equation Segment ------
EQUATIONS
; Registered
GLOBAL.RSTF = RES
; if A2...
RA16 = (A2 * A3) + (/A2 * RA16)
RA15 = (A2 * A1) + (/A2 * RA15)
RA14 = (A2 * A0) + (/A2 * RA14)
; if /A2...
BankAB = ( A2 * BankAB) +
(/A2 * A3)
ENRD = ( A2 * ENRD) +
(/A2 * /A0 * /A1) +
(/A2 * A0 * A1)
PREWR = ( A2 * PREWR) +
(/A2 * A0)
ENWR = ( A2 * ENWR) +
(/A2 * A0 * PREWR)
; Combinational
INH = A15 * A14 * A12 * ENRD * /WE +
A15 * A14 * A13 * ENRD * /WE +
A15 * A14 * A12 * ENWR * WE +
A15 * A14 * A13 * ENWR * WE +
A15 * A14 * A12 * ENRD * ENWR +
A15 * A14 * A13 * ENRD * ENWR
RCS = /PHI1 * A15 * A14 * A12 * ENRD * /WE +
/PHI1 * A15 * A14 * A13 * ENRD * /WE +
/PHI1 * A15 * A14 * A12 * ENWR * WE +
/PHI1 * A15 * A14 * A13 * ENWR * WE +
/PHI1 * A15 * A14 * A12 * ENRD * ENWR +
/PHI1 * A15 * A14 * A13 * ENRD * ENWR
RA12 = /A13 * BankAB + A13 * A12

116
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Gw4208.pds
PALASM4 PARSER - MARKET RELEASE 1.5 (7-10-92)
(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
***********************************
* PALASM PARSER LISTING *
***********************************
LINE # |----+----1----+----2----+----3----+----4----+----5----+----6----+
1 |;PALASM Design Description
2 |
3 |;---------------------------------- Declaration Segment ------------
4 |TITLE GW4208
5 |PATTERN
6 |REVISION Zane Kaminski
7 |AUTHOR Garrett's Workshop
8 |COMPANY 02/18/20
9 |DATE 02/18/20
10 |
11 |CHIP _GW4208 PAL22V10
12 |
13 |;---------------------------------- PIN Declarations ---------------
14 |NODE 1 GLOBAL ;
15 |PIN 1 /DEVSEL ;
16 |PIN 2 PHI1 ;
17 |PIN 3 A0 ;
18 |PIN 4 A1 ;
19 |PIN 5 A2 ;
20 |PIN 6 A3 ;
21 |PIN 7 A12 ;
22 |PIN 8 A13 ;
23 |PIN 9 A14 ;
24 |PIN 10 A15 ;
25 |PIN 11 /WE ;
26 |PIN 13 /RES ;
27 |PIN 14 RA16 REGISTERED ;
28 |PIN 15 RA15 REGISTERED ;
29 |PIN 16 RA14 REGISTERED ;
30 |PIN 18 RA12 COMBINATORIAL ;
31 |PIN 19 /INH COMBINATORIAL ;
32 |PIN 23 /RCS COMBINATORIAL ;
33 |PIN 20 BankAB REGISTERED ;
34 |PIN 21 ENRD REGISTERED ;
35 |PIN 22 ENWR REGISTERED ;
36 |PIN 17 PREWR REGISTERED ;
37 |
38 |;----------------------------------- Boolean Equation Segment ------
39 |EQUATIONS
40 |
41 |; Registered
42 |GLOBAL.RSTF = RES
43 |
44 |; if A2...
45 |RA16 = (A2 * A3) + (/A2 * RA16)
46 |RA15 = (A2 * A1) + (/A2 * RA15)
47 |RA14 = (A2 * A0) + (/A2 * RA14)
48 |
49 |; if /A2...
50 |BankAB = ( A2 * BankAB) +
51 | (/A2 * A3)
52 |
53 |ENRD = ( A2 * ENRD) +
54 | (/A2 * /A0 * /A1) +
55 | (/A2 * A0 * A1)
56 |
57 |PREWR = ( A2 * PREWR) +
58 | (/A2 * A0)
59 |
60 |ENWR = ( A2 * ENWR) +
61 | (/A2 * A0 * PREWR)
62 |
63 |; Combinational
64 |INH = A15 * A14 * A12 * ENRD * /WE +
65 | A15 * A14 * A13 * ENRD * /WE +
66 | A15 * A14 * A12 * ENWR * WE +
67 | A15 * A14 * A13 * ENWR * WE +
68 | A15 * A14 * A12 * ENRD * ENWR +
69 | A15 * A14 * A13 * ENRD * ENWR
70 |
71 |RCS = /PHI1 * A15 * A14 * A12 * ENRD * /WE +
72 | /PHI1 * A15 * A14 * A13 * ENRD * /WE +
73 | /PHI1 * A15 * A14 * A12 * ENWR * WE +
74 | /PHI1 * A15 * A14 * A13 * ENWR * WE +
75 | /PHI1 * A15 * A14 * A12 * ENRD * ENWR +
76 | /PHI1 * A15 * A14 * A13 * ENRD * ENWR
77 |
78 |RA12 = /A13 * BankAB + A13 * A12
%% PARSE %% No errors. No warnings.
%% PARSE %% File processed successfully. File: Gw4208.pds
PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)
(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
FILE Gw4208.pds
TITLE GW4208
Equation being processed for output ==>> RA16
Equation being processed for output ==>> RA15
Equation being processed for output ==>> RA14
Equation being processed for output ==>> PREWR
Equation being processed for output ==>> RA12
Equation being processed for output ==>> INH
Equation being processed for output ==>> BANKAB
Equation being processed for output ==>> ENRD
Equation being processed for output ==>> ENWR
Equation being processed for output ==>> RCS
Equation being processed for output ==>> GLOBAL.RSTF
The fuse plot is stored in ===>Gw4208.XPT
The JEDEC is stored in ===>Gw4208.JED
%% PAL ASSEMBLER %% Maximum memory allocated was: 18346 bytes.
%% PAL ASSEMBLER %% File Processed Successfully. File: Gw4208.pds.
%% PAL ASSEMBLER %% ERROR count: 0 WARNING count: 0

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Gw4208.pds NNNNNN
1 223
1 85 GW4208
1 86
1 87 Zane Kaminski
1 88 Garrett's Workshop
1 89 02/18/20
1 90 02/18/20
-2 -2
1 60
2 1 _GW4208
2 166 24
2 18
3 1 DEVSEL
2 1 PHI1
2 1 A0
2 1 A1
2 1 A2
2 1 A3
2 1 A12
2 1 A13
2 1 A14
2 1 A15
2 18
3 1 WE
2 75
2 18
3 1 RES
2 1 RA16
3 10
2 1 RA15
3 10
2 1 RA14
3 10
2 1 PREWR
3 10
2 1 RA12
3 24
2 18
3 1 INH
4 24
2 1 BANKAB
3 10
2 1 ENRD
3 10
2 1 ENWR
3 10
2 18
3 1 RCS
4 24
2 74
2 1 GLOBAL
-3 -3
3 65
3 24
4 51
5 1 GLOBAL
4 1 RES
3 10
4 1 RA16
4 16
5 17
6 1 A2
6 1 A3
5 17
6 18
7 1 A2
6 1 RA16
3 10
4 1 RA15
4 16
5 17
6 1 A2
6 1 A1
5 17
6 18
7 1 A2
6 1 RA15
3 10
4 1 RA14
4 16
5 17
6 1 A2
6 1 A0
5 17
6 18
7 1 A2
6 1 RA14
3 10
4 1 BANKAB
4 16
5 17
6 1 A2
6 1 BANKAB
5 17
6 18
7 1 A2
6 1 A3
3 10
4 1 ENRD
4 16
5 17
6 1 A2
6 1 ENRD
5 16
6 17
7 18
8 1 A2
7 17
8 18
9 1 A0
8 18
9 1 A1
6 17
7 18
8 1 A2
7 17
8 1 A0
8 1 A1
3 10
4 1 PREWR
4 16
5 17
6 1 A2
6 1 PREWR
5 17
6 18
7 1 A2
6 1 A0
3 10
4 1 ENWR
4 16
5 17
6 1 A2
6 1 ENWR
5 17
6 18
7 1 A2
6 17
7 1 A0
7 1 PREWR
3 24
4 1 INH
4 16
5 17
6 1 A15
6 17
7 1 A14
7 17
8 1 A12
8 17
9 1 ENRD
9 18
10 1 WE
5 16
6 17
7 1 A15
7 17
8 1 A14
8 17
9 1 A13
9 17
10 1 ENRD
10 18
11 1 WE
6 16
7 17
8 1 A15
8 17
9 1 A14
9 17
10 1 A12
10 17
11 1 ENWR
11 1 WE
7 16
8 17
9 1 A15
9 17
10 1 A14
10 17
11 1 A13
11 17
12 1 ENWR
12 1 WE
8 16
9 17
10 1 A15
10 17
11 1 A14
11 17
12 1 A12
12 17
13 1 ENRD
13 1 ENWR
9 17
10 1 A15
10 17
11 1 A14
11 17
12 1 A13
12 17
13 1 ENRD
13 1 ENWR
3 24
4 1 RCS
4 16
5 17
6 18
7 1 PHI1
6 17
7 1 A15
7 17
8 1 A14
8 17
9 1 A12
9 17
10 1 ENRD
10 18
11 1 WE
5 16
6 17
7 18
8 1 PHI1
7 17
8 1 A15
8 17
9 1 A14
9 17
10 1 A13
10 17
11 1 ENRD
11 18
12 1 WE
6 16
7 17
8 18
9 1 PHI1
8 17
9 1 A15
9 17
10 1 A14
10 17
11 1 A12
11 17
12 1 ENWR
12 1 WE
7 16
8 17
9 18
10 1 PHI1
9 17
10 1 A15
10 17
11 1 A14
11 17
12 1 A13
12 17
13 1 ENWR
13 1 WE
8 16
9 17
10 18
11 1 PHI1
10 17
11 1 A15
11 17
12 1 A14
12 17
13 1 A12
13 17
14 1 ENRD
14 1 ENWR
9 17
10 18
11 1 PHI1
10 17
11 1 A15
11 17
12 1 A14
12 17
13 1 A13
13 17
14 1 ENRD
14 1 ENWR
3 24
4 1 RA12
4 16
5 17
6 18
7 1 A13
6 1 BANKAB
5 17
6 1 A13
6 1 A12
-5 -5
-9 -9

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PALASM4 PARSER - MARKET RELEASE 1.5 (7-10-92)
(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
%% PARSE %% Processing design file.......Gw4208.pds
%% PARSE %% Listing file.................sp.@@2
%% PARSE %% No errors. No warnings.
%% PARSE %% File processed successfully. File: Gw4208.pds

1
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GW4208.PDS

4
sym-lib-table Normal file
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@ -0,0 +1,4 @@
(sym_lib_table
(lib (name GW_RAM)(type Legacy)(uri ${KIPRJMOD}/../GW_Parts/GW_RAM.lib)(options "")(descr ""))
(lib (name GW_PLD)(type Legacy)(uri ${KIPRJMOD}/../GW_Parts/GW_PLD.lib)(options "")(descr ""))
)