<?xml version="1.0" encoding="UTF-8"?>
<DiamondModule name="REFB" module="EFB" VendorName="Lattice Semiconductor Corporation" generator="IPexpress" date="2023 09 20 04:46:00.352" version="1.2" type="Module" synthesis="synplify" source_format="Verilog">
  <Package>
		<File name="REFB.lpc" type="lpc" modified="2023 09 20 04:45:58.427"/>
		<File name="REFB.v" type="top_level_verilog" modified="2023 09 20 04:45:58.515"/>
		<File name="REFB_tmpl.v" type="template_verilog" modified="2023 09 20 04:45:58.515"/>
  </Package>
</DiamondModule>
