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RAM2E/CPLD/LCMXO2-1200HC/impl1/RAM2E_LCMXO2_1200HC_impl1.mrp

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RC
2023-09-21 09:45:21 +00:00
Lattice Mapping Report File for Design Module 'RAM2E'
Design Information
------------------
Command line: map -a MachXO2 -p LCMXO2-1200HC -t TQFP100 -s 4 -oc Commercial
RAM2E_LCMXO2_1200HC_impl1.ngd -o RAM2E_LCMXO2_1200HC_impl1_map.ncd -pr
RAM2E_LCMXO2_1200HC_impl1.prf -mp RAM2E_LCMXO2_1200HC_impl1.mrp -lpf //Mac/
iCloud/Repos/RAM2E/CPLD/LCMXO2-1200HC/impl1/RAM2E_LCMXO2_1200HC_impl1_synpl
ify.lpf -lpf //Mac/iCloud/Repos/RAM2E/CPLD/RAM2E-LCMXO2.lpf -c 0 -gui
-msgset //Mac/iCloud/Repos/RAM2E/CPLD/LCMXO2-1200HC/promote.xml
Target Vendor: LATTICE
Target Device: LCMXO2-1200HCTQFP100
Target Performance: 4
Mapper: xo2c00, version: Diamond (64-bit) 3.12.1.454
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Mapped on: 12/28/23 23:23:27
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Design Summary
--------------
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Number of registers: 122 out of 1520 (8%)
PFU registers: 93 out of 1280 (7%)
PIO registers: 29 out of 240 (12%)
Number of SLICEs: 148 out of 640 (23%)
SLICEs as Logic/ROM: 148 out of 640 (23%)
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SLICEs as RAM: 0 out of 480 (0%)
SLICEs as Carry: 9 out of 640 (1%)
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Number of LUT4s: 296 out of 1280 (23%)
Number used as logic LUTs: 278
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Number used as distributed RAM: 0
Number used as ripple logic: 18
Number used as shift registers: 0
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Number of PIO sites used: 69 + 4(JTAG) out of 80 (91%)
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Number of block RAMs: 0 out of 7 (0%)
Number of GSRs: 0 out of 1 (0%)
EFB used : Yes
JTAG used : No
Readback used : No
Oscillator used : No
Startup used : No
POR : On
Bandgap : On
Number of Power Controller: 0 out of 1 (0%)
Number of Dynamic Bank Controller (BCINRD): 0 out of 4 (0%)
Number of Dynamic Bank Controller (BCLVDSO): 0 out of 1 (0%)
Number of DCCA: 0 out of 8 (0%)
Number of DCMA: 0 out of 2 (0%)
Number of PLLs: 0 out of 1 (0%)
Number of DQSDLLs: 0 out of 2 (0%)
Number of CLKDIVC: 0 out of 4 (0%)
Number of ECLKSYNCA: 0 out of 4 (0%)
Number of ECLKBRIDGECS: 0 out of 2 (0%)
Notes:-
1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
distributed RAMs) + 2*(Number of ripple logic)
2. Number of logic LUT4s does not include count of distributed RAM and
ripple logic.
Number of clocks: 1
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Net C14M_c: 89 loads, 73 rising, 16 falling (Driver: PIO C14M )
Number of Clock Enables: 14
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Page 1
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Design: RAM2E Date: 12/28/23 23:23:27
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Design Summary (cont)
---------------------
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Net N_225_i: 2 loads, 0 LSLICEs
Net N_201_i: 2 loads, 0 LSLICEs
Net N_187_i: 11 loads, 11 LSLICEs
Net ram2e_ufm/wb_adr_0_sqmuxa_1_i: 1 loads, 1 LSLICEs
Net RC12: 2 loads, 2 LSLICEs
Net ram2e_ufm/CmdBitbangMXO2_RNINSM62: 8 loads, 8 LSLICEs
Net ram2e_ufm/wb_we_RNO_0: 1 loads, 1 LSLICEs
Net N_185_i: 2 loads, 2 LSLICEs
Net ram2e_ufm/un1_CmdSetRWBankFFChip13_1_i_0_0[0]: 1 loads, 1 LSLICEs
Net ram2e_ufm/un1_RWMask_0_sqmuxa_1_i_0_0[0]: 4 loads, 4 LSLICEs
Net ram2e_ufm/un1_LEDEN_0_sqmuxa_1_i_0_0[0]: 1 loads, 1 LSLICEs
Net N_126: 6 loads, 6 LSLICEs
Net un9_VOEEN_0_a2_0_a3_0_a3: 1 loads, 1 LSLICEs
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Net Vout3: 8 loads, 0 LSLICEs
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Number of LSRs: 7
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Net un1_CS_0_sqmuxa_i: 2 loads, 2 LSLICEs
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Net BA_0_sqmuxa: 2 loads, 0 LSLICEs
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Net S[2]: 1 loads, 1 LSLICEs
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Net ram2e_ufm/wb_rst: 1 loads, 0 LSLICEs
Net ram2e_ufm/wb_rst16_i: 1 loads, 1 LSLICEs
Net N_1080_0: 1 loads, 1 LSLICEs
Net N_1078_0: 1 loads, 1 LSLICEs
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Number of nets driven by tri-state buffers: 0
Top 10 highest fanout non-clock nets:
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Net S[2]: 50 loads
Net S[3]: 45 loads
Net S[0]: 37 loads
Net S[1]: 34 loads
Net FS[12]: 24 loads
Net FS[11]: 22 loads
Net FS[10]: 19 loads
Net FS[13]: 19 loads
Net FS[9]: 19 loads
Net FS[8]: 18 loads
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Number of warnings: 3
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Number of errors: 0
Design Errors/Warnings
----------------------
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WARNING - map: //Mac/iCloud/Repos/RAM2E/CPLD/RAM2E-LCMXO2.lpf(93): Semantic
error in "IOBUF PORT "nWE80" IO_TYPE=LVCMOS33 PULLMODE=NONE ;": Port
"nWE80" does not exist in the design. This preference has been disabled.
RC
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WARNING - map: UFM was enabled in EFB: Enabling the configuration interface will
temporarily disable certain features of the device including Power
Controller, GSR, Hardened User SPI Port, Hardened Primary User I2C Port.
Functionality is restored after the Flash Memory (UFM/Configuration)
Interface is disabled using Disable Configuration Interface command 0x26
followed by Bypass command 0xFF.
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WARNING - map: IO buffer missing for top level port nWE80...logic will be
discarded.
Page 2
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Design: RAM2E Date: 12/28/23 23:23:27
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IO (PIO) Attributes
-------------------
+---------------------+-----------+-----------+------------+
| IO Name | Direction | Levelmode | IO |
| | | IO_TYPE | Register |
+---------------------+-----------+-----------+------------+
| RD[0] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| LED | OUTPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| C14M | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| RD[7] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| RD[6] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| RD[5] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| RD[4] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| RD[3] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| RD[2] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| RD[1] | BIDIR | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
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| DQMH | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| DQML | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[11] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[10] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[9] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[8] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[7] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[6] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[5] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[4] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[3] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[2] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[1] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[0] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| BA[1] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
Page 3
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Design: RAM2E Date: 12/28/23 23:23:27
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IO (PIO) Attributes (cont)
--------------------------
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| BA[0] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| nRWEout | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| nCASout | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| nRASout | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nCSout | OUTPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| CKEout | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
| nVOE | OUTPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Vout[7] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| Vout[6] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| Vout[5] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| Vout[4] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| Vout[3] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| Vout[2] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| Vout[1] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| Vout[0] | OUTPUT | LVCMOS33 | OUT |
+---------------------+-----------+-----------+------------+
| nDOE | OUTPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
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| Dout[7] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[6] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[5] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[4] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[3] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[2] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[1] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[0] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
| Din[7] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Din[6] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Din[5] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Din[4] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
Page 4
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Design: RAM2E Date: 12/28/23 23:23:27
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IO (PIO) Attributes (cont)
--------------------------
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| Din[3] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Din[2] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Din[1] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Din[0] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
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| Ain[7] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Ain[6] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Ain[5] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Ain[4] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Ain[3] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Ain[2] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Ain[1] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| Ain[0] | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| nC07X | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| nEN80 | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| nWE | INPUT | LVCMOS33 | |
+---------------------+-----------+-----------+------------+
| PHI1 | INPUT | LVCMOS33 | IN |
+---------------------+-----------+-----------+------------+
Removed logic
-------------
Block GSR_INST undriven or does not drive anything - clipped.
RC
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Block ram2e_ufm/VCC undriven or does not drive anything - clipped.
Block ram2e_ufm/GND undriven or does not drive anything - clipped.
Signal CKEout.CN was merged into signal C14M_c
Signal ram2e_ufm/ufmefb/VCC undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/GND undriven or does not drive anything - clipped.
RC
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Signal FS_s_0_S1[15] undriven or does not drive anything - clipped.
Signal FS_s_0_COUT[15] undriven or does not drive anything - clipped.
RC
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Signal ram2e_ufm/ufmefb/CFGSTDBY undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/CFGWAKE undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/wbc_ufm_irq undriven or does not drive anything -
clipped.
Signal ram2e_ufm/ufmefb/TCOC undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/TCINT undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIIRQO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPICSNEN undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMCSN7 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMCSN6 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMCSN5 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMCSN4 undriven or does not drive anything - clipped.
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Page 5
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Design: RAM2E Date: 12/28/23 23:23:27
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Removed logic (cont)
--------------------
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Signal ram2e_ufm/ufmefb/SPIMCSN3 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMCSN2 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMCSN1 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMCSN0 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMOSIEN undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMOSIO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMISOEN undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPIMISOO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPISCKEN undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/SPISCKO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/I2C2IRQO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/I2C1IRQO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/I2C2SDAOEN undriven or does not drive anything -
clipped.
Signal ram2e_ufm/ufmefb/I2C2SDAO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/I2C2SCLOEN undriven or does not drive anything -
clipped.
Signal ram2e_ufm/ufmefb/I2C2SCLO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/I2C1SDAOEN undriven or does not drive anything -
clipped.
Signal ram2e_ufm/ufmefb/I2C1SDAO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/I2C1SCLOEN undriven or does not drive anything -
clipped.
Signal ram2e_ufm/ufmefb/I2C1SCLO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO0 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO1 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO2 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO3 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO4 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO5 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO6 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLDATO7 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLADRO0 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLADRO1 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLADRO2 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLADRO3 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLADRO4 undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLWEO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLL1STBO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLL0STBO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLRSTO undriven or does not drive anything - clipped.
Signal ram2e_ufm/ufmefb/PLLCLKO undriven or does not drive anything - clipped.
RC
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Signal FS_cry_0_S0[0] undriven or does not drive anything - clipped.
Signal N_1 undriven or does not drive anything - clipped.
RC
2023-12-29 04:12:12 +00:00
Block nCASout.CN was optimized away.
Block ram2e_ufm/ufmefb/VCC was optimized away.
Block ram2e_ufm/ufmefb/GND was optimized away.
RC
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Embedded Functional Block Connection Summary
--------------------------------------------
Desired WISHBONE clock frequency: 14.4 MHz
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Page 6
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Design: RAM2E Date: 12/28/23 23:23:27
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Embedded Functional Block Connection Summary (cont)
---------------------------------------------------
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Clock source: C14M_c
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Reset source: ram2e_ufm/wb_rst
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Functions mode:
I2C #1 (Primary) Function: DISABLED
I2C #2 (Secondary) Function: DISABLED
SPI Function: DISABLED
Timer/Counter Function: DISABLED
Timer/Counter Mode: WB
UFM Connection: ENABLED
PLL0 Connection: DISABLED
PLL1 Connection: DISABLED
I2C Function Summary:
--------------------
None
SPI Function Summary:
--------------------
None
Timer/Counter Function Summary:
------------------------------
None
UFM Function Summary:
--------------------
UFM Utilization: General Purpose Flash Memory
Initialized UFM Pages: 321 Pages (321*128 Bits)
Available General
Purpose Flash Memory: 511 Pages (511*128 Bits)
EBR Blocks with Unique
Initialization Data: 0
WID EBR Instance
--- ------------
ASIC Components
---------------
RC
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Instance Name: ram2e_ufm/ufmefb/EFBInst_0
RC
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Type: EFB
Run Time and Memory Usage
-------------------------
RC
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Total CPU Time: 0 secs
RC
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Total REAL Time: 0 secs
RC
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Peak Memory Usage: 64 MB
RC
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Page 7
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Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights
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