From 0bc28d5c8a48f1b75d9b320843bc8d41b505b2eb Mon Sep 17 00:00:00 2001 From: Zane Kaminski Date: Sat, 27 Jan 2024 17:27:22 -0500 Subject: [PATCH] nVOE change --- CPLD/RAM2E.v | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/CPLD/RAM2E.v b/CPLD/RAM2E.v index 5047662..ad78a7f 100644 --- a/CPLD/RAM2E.v +++ b/CPLD/RAM2E.v @@ -50,13 +50,13 @@ module RAM2E(C14M, PHI1, LED, output [7:0] Dout; assign Dout[7:0] = RD[7:0]; /* Video Data Bus */ - reg VOEEN; - always @(posedge C14M) begin - VOEEN <= S==4'h7 || - S==4'h8 || S==4'h9 || S==4'hA || S==4'hB || - S==4'hC || S==4'hD || S==4'hE || S==4'hF; + reg VOEENf, VOEENr; + always @(negedge C14M) VOEENf <= S==4'h7; + always @(negedge C14M) begin + VOEENr <= S==4'h7 || S==4'h8 || S==4'h9 || + S==4'hA || S==4'hB || S==4'hC; end - output nVOE; assign nVOE = !(!PHI1 && VOEEN); + output nVOE; assign nVOE = !(VOEENf && VOEENr); output reg [7:0] Vout; // Video data bus always @(negedge C14M) if (S==4'h6) Vout[7:0] <= RD[7:0];