Apple-2-HW
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RAM2E
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As submitted to JLCPCB August 21 2020

This commit is contained in:
Zane Kaminski 2020-08-20 22:32:17 -04:00
parent aa58ecc4d9
commit 7b68a9e9b8
16 changed files with 1133 additions and 1066 deletions
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RAM2E.kicad_pcb
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@ -6,7 +6,7 @@
(tracks 2102)
(zones 0)
(modules 55)
(nets 166)
(nets 164)
)
(page A4)
@ -43,7 +43,7 @@
)
(setup
(last_trace_width 0.5)
(last_trace_width 0.15)
(user_trace_width 0.2)
(user_trace_width 0.25)
(user_trace_width 0.3)
@ -270,18 +270,16 @@
(net 151 "Net-(RN3-Pad1)")
(net 152 "Net-(U4-Pad17)")
(net 153 "Net-(U4-Pad16)")
(net 154 "Net-(U4-Pad4)")
(net 155 "Net-(U4-Pad3)")
(net 156 /~FRCTXT~)
(net 157 "Net-(U1-Pad88)")
(net 158 "Net-(U1-Pad87)")
(net 159 "Net-(U1-Pad86)")
(net 160 "Net-(RN3-Pad3)")
(net 161 "Net-(RN3-Pad2)")
(net 162 "Net-(RN3-Pad7)")
(net 163 "Net-(RN3-Pad6)")
(net 164 "Net-(U1-Pad82)")
(net 165 "Net-(U1-Pad83)")
(net 154 /~FRCTXT~)
(net 155 "Net-(U1-Pad88)")
(net 156 "Net-(U1-Pad87)")
(net 157 "Net-(U1-Pad86)")
(net 158 "Net-(RN3-Pad3)")
(net 159 "Net-(RN3-Pad2)")
(net 160 "Net-(RN3-Pad7)")
(net 161 "Net-(RN3-Pad6)")
(net 162 "Net-(U1-Pad82)")
(net 163 "Net-(U1-Pad83)")
(net_class Default "This is the default net class."
(clearance 0.15)
@ -453,8 +451,6 @@
(add_net "Net-(U1-Pad88)")
(add_net "Net-(U4-Pad16)")
(add_net "Net-(U4-Pad17)")
(add_net "Net-(U4-Pad3)")
(add_net "Net-(U4-Pad4)")
)
(module stdpads:C_0603 (layer F.Cu) (tedit 5E890746) (tstamp 5F2C3B04)
@ -747,19 +743,19 @@
(pad 81 smd roundrect (at -7.6625 -3.5) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 105 "Net-(U1-Pad81)"))
(pad 82 smd roundrect (at -7.6625 -3) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 164 "Net-(U1-Pad82)"))
(net 162 "Net-(U1-Pad82)"))
(pad 83 smd roundrect (at -7.6625 -2.5) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 165 "Net-(U1-Pad83)"))
(net 163 "Net-(U1-Pad83)"))
(pad 84 smd roundrect (at -7.6625 -2) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 139 /Dout6))
(pad 85 smd roundrect (at -7.6625 -1.5) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 140 /Dout7))
(pad 86 smd roundrect (at -7.6625 -1) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 159 "Net-(U1-Pad86)"))
(net 157 "Net-(U1-Pad86)"))
(pad 87 smd roundrect (at -7.6625 -0.5) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 158 "Net-(U1-Pad87)"))
(net 156 "Net-(U1-Pad87)"))
(pad 88 smd roundrect (at -7.6625 0) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 157 "Net-(U1-Pad88)"))
(net 155 "Net-(U1-Pad88)"))
(pad 89 smd roundrect (at -7.6625 0.5) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 144 /RD3r))
(pad 90 smd roundrect (at -7.6625 1) (size 0.3 1.475) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
@ -957,17 +953,17 @@
(pad 1 smd roundrect (at -0.8 0.5 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 151 "Net-(RN3-Pad1)") (solder_paste_margin -0.035))
(pad 3 smd roundrect (at 0.25 0.5 90) (size 0.65 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 160 "Net-(RN3-Pad3)"))
(net 158 "Net-(RN3-Pad3)"))
(pad 2 smd roundrect (at -0.25 0.5 90) (size 0.65 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 161 "Net-(RN3-Pad2)"))
(net 159 "Net-(RN3-Pad2)"))
(pad 4 smd roundrect (at 0.8 0.5 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 151 "Net-(RN3-Pad1)") (solder_paste_margin -0.035))
(pad 7 smd roundrect (at -0.25 -0.5 90) (size 0.65 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 162 "Net-(RN3-Pad7)"))
(net 160 "Net-(RN3-Pad7)"))
(pad 8 smd roundrect (at -0.8 -0.5 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 149 /RCLK) (solder_paste_margin -0.035))
(pad 6 smd roundrect (at 0.25 -0.5 90) (size 0.65 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 163 "Net-(RN3-Pad6)"))
(net 161 "Net-(RN3-Pad6)"))
(pad 5 smd roundrect (at 0.8 -0.5 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 150 /ACLK) (solder_paste_margin -0.035))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_Array_Convex_4x0402.wrl
@ -1038,9 +1034,9 @@
(pad 5 smd roundrect (at -0.325 2.95 90) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 30 /~EN80~))
(pad 4 smd roundrect (at -0.975 2.95 90) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 154 "Net-(U4-Pad4)"))
(net 2 GND))
(pad 3 smd roundrect (at -1.625 2.95 90) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 155 "Net-(U4-Pad3)"))
(net 2 GND))
(pad 2 smd roundrect (at -2.275 2.95 90) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 50 /C14M))
(pad 1 smd roundrect (at -2.925 2.95 90) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
@ -1608,7 +1604,7 @@
(pad 2 smd roundrect (at 0.95 0) (size 0.85 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 29 /AN3))
(pad 1 smd roundrect (at -0.95 0) (size 0.85 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 156 /~FRCTXT~))
(net 154 /~FRCTXT~))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@ -1645,7 +1641,7 @@
(pad 2 smd roundrect (at 0.95 0) (size 0.85 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 29 /AN3))
(pad 1 smd roundrect (at -0.95 0) (size 0.85 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 156 /~FRCTXT~))
(net 154 /~FRCTXT~))
)
(module stdpads:C_0805 (layer F.Cu) (tedit 5F02840E) (tstamp 5E81676C)
@ -2644,7 +2640,7 @@
(pad 56 smd roundrect (at -26.67 -0.1 180) (size 1.524 7.34) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
(net 37 /~RA9~))
(pad 55 smd roundrect (at -24.13 -0.1 180) (size 1.524 7.34) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
(net 156 /~FRCTXT~))
(net 154 /~FRCTXT~))
(pad 54 smd roundrect (at -21.59 -0.1 180) (size 1.524 7.34) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
(net 36 /SEGB))
(pad 53 smd roundrect (at -19.05 -0.1 180) (size 1.524 7.34) (layers B.Cu B.Mask) (roundrect_rratio 0.25)
@ -5107,14 +5103,14 @@
(segment (start 228.4 112.4) (end 228.3 112.4) (width 0.15) (layer F.Cu) (net 151))
(segment (start 229.15 111.65) (end 228.4 112.4) (width 0.15) (layer F.Cu) (net 151))
(segment (start 229.15 111.15) (end 229.15 111.65) (width 0.15) (layer F.Cu) (net 151))
(via (at 207.518 124.0155) (size 0.5) (drill 0.2) (layers F.Cu B.Cu) (net 156))
(segment (start 208.346 124.0155) (end 207.518 124.0155) (width 0.15) (layer F.Cu) (net 156))
(via (at 207.518 126.1745) (size 0.5) (drill 0.2) (layers F.Cu B.Cu) (net 156))
(segment (start 208.346 126.1745) (end 207.518 126.1745) (width 0.15) (layer F.Cu) (net 156))
(segment (start 207.518 126.1745) (end 207.518 124.0155) (width 0.15) (layer B.Cu) (net 156))
(segment (start 208.7245 126.1745) (end 207.518 126.1745) (width 0.15) (layer B.Cu) (net 156))
(segment (start 213.36 130.81) (end 208.7245 126.1745) (width 0.15) (layer B.Cu) (net 156))
(segment (start 213.36 135.282) (end 213.36 130.81) (width 0.15) (layer B.Cu) (net 156))
(via (at 207.518 124.0155) (size 0.5) (drill 0.2) (layers F.Cu B.Cu) (net 154))
(segment (start 208.346 124.0155) (end 207.518 124.0155) (width 0.15) (layer F.Cu) (net 154))
(via (at 207.518 126.1745) (size 0.5) (drill 0.2) (layers F.Cu B.Cu) (net 154))
(segment (start 208.346 126.1745) (end 207.518 126.1745) (width 0.15) (layer F.Cu) (net 154))
(segment (start 207.518 126.1745) (end 207.518 124.0155) (width 0.15) (layer B.Cu) (net 154))
(segment (start 208.7245 126.1745) (end 207.518 126.1745) (width 0.15) (layer B.Cu) (net 154))
(segment (start 213.36 130.81) (end 208.7245 126.1745) (width 0.15) (layer B.Cu) (net 154))
(segment (start 213.36 135.282) (end 213.36 130.81) (width 0.15) (layer B.Cu) (net 154))
(zone (net 2) (net_name GND) (layer F.Cu) (tstamp 5E9330CC) (hatch edge 0.508)
(connect_pads (clearance 0.154))
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(zone (net 2) (net_name GND) (layer B.Cu) (tstamp 5E9330C9) (hatch edge 0.508)
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16
RAM2E.sch
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@ -2333,6 +2333,22 @@ Wire Wire Line
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Wire Wire Line
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$Comp
L power:GND #PWR?
U 1 1 5F4141A1
P 2300 2550
F 0 "#PWR?" H 2300 2300 50 0001 C CNN
F 1 "GND" H 2300 2400 50 0000 C CNN
F 2 "" H 2300 2550 50 0001 C CNN
F 3 "" H 2300 2550 50 0001 C CNN
1 2300 2550
1 0 0 -1
$EndComp
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gerber/RAM2E-F_Cu.gtl
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gerber/RAM2E-In1_Cu.g2
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gerber/RAM2E-bottom.pos
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### Module positions - created on Saturday, August 08, 2020 at 03:48:01 AM ###
### Module positions - created on Thursday, August 20, 2020 at 10:30:40 PM ###
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gerber/RAM2E-drl_map.ps
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gerber/RAM2E.drl
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M48
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