mirror of
https://github.com/garrettsworkshop/RAM2E.git
synced 2024-12-11 17:50:39 +00:00
118 lines
6.8 KiB
Plaintext
118 lines
6.8 KiB
Plaintext
Flow report for RAM2E
|
|
Tue Nov 21 06:54:45 2023
|
|
Quartus Prime Version 19.1.0 Build 670 09/22/2019 Patches 0.02std SJ Lite Edition
|
|
|
|
|
|
---------------------
|
|
; Table of Contents ;
|
|
---------------------
|
|
1. Legal Notice
|
|
2. Flow Summary
|
|
3. Flow Settings
|
|
4. Flow Non-Default Global Settings
|
|
5. Flow Elapsed Time
|
|
6. Flow OS Summary
|
|
7. Flow Log
|
|
8. Flow Messages
|
|
9. Flow Suppressed Messages
|
|
|
|
|
|
|
|
----------------
|
|
; Legal Notice ;
|
|
----------------
|
|
Copyright (C) 2019 Intel Corporation. All rights reserved.
|
|
Your use of Intel Corporation's design tools, logic functions
|
|
and other software and tools, and any partner logic
|
|
functions, and any output files from any of the foregoing
|
|
(including device programming or simulation files), and any
|
|
associated documentation or information are expressly subject
|
|
to the terms and conditions of the Intel Program License
|
|
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
|
the Intel FPGA IP License Agreement, or other applicable license
|
|
agreement, including, without limitation, that your use is for
|
|
the sole purpose of programming logic devices manufactured by
|
|
Intel and sold by Intel or its authorized distributors. Please
|
|
refer to the applicable agreement for further details, at
|
|
https://fpgasoftware.intel.com/eula.
|
|
|
|
|
|
|
|
+-------------------------------------------------------------------------------------+
|
|
; Flow Summary ;
|
|
+-----------------------+-------------------------------------------------------------+
|
|
; Flow Status ; Successful - Tue Nov 21 06:54:42 2023 ;
|
|
; Quartus Prime Version ; 19.1.0 Build 670 09/22/2019 Patches 0.02std SJ Lite Edition ;
|
|
; Revision Name ; RAM2E ;
|
|
; Top-level Entity Name ; RAM2E ;
|
|
; Family ; MAX V ;
|
|
; Device ; 5M240ZT100C5 ;
|
|
; Timing Models ; Final ;
|
|
; Total logic elements ; 209 / 240 ( 87 % ) ;
|
|
; Total pins ; 71 / 79 ( 90 % ) ;
|
|
; Total virtual pins ; 0 ;
|
|
; UFM blocks ; 1 / 1 ( 100 % ) ;
|
|
+-----------------------+-------------------------------------------------------------+
|
|
|
|
|
|
+-----------------------------------------+
|
|
; Flow Settings ;
|
|
+-------------------+---------------------+
|
|
; Option ; Setting ;
|
|
+-------------------+---------------------+
|
|
; Start date & time ; 11/21/2023 06:54:06 ;
|
|
; Main task ; Compilation ;
|
|
; Revision Name ; RAM2E ;
|
|
+-------------------+---------------------+
|
|
|
|
|
|
+---------------------------------------------------------------------------------------------------------+
|
|
; Flow Non-Default Global Settings ;
|
|
+-------------------------------+------------------------------+---------------+-------------+------------+
|
|
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
|
|
+-------------------------------+------------------------------+---------------+-------------+------------+
|
|
; COMPILER_SIGNATURE_ID ; 121381084694.170056764601716 ; -- ; -- ; -- ;
|
|
; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
|
|
; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
|
|
; NUM_PARALLEL_PROCESSORS ; 4 ; -- ; -- ; -- ;
|
|
; POWER_PRESET_COOLING_SOLUTION ; No Heat Sink With Still Air ; -- ; -- ; -- ;
|
|
; PROJECT_OUTPUT_DIRECTORY ; output_files ; -- ; -- ; -- ;
|
|
+-------------------------------+------------------------------+---------------+-------------+------------+
|
|
|
|
|
|
+--------------------------------------------------------------------------------------------------------------------------+
|
|
; Flow Elapsed Time ;
|
|
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
|
|
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
|
|
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
|
|
; Analysis & Synthesis ; 00:00:27 ; 1.0 ; 13111 MB ; 00:00:43 ;
|
|
; Fitter ; 00:00:06 ; 1.0 ; 13746 MB ; 00:00:04 ;
|
|
; Assembler ; 00:00:01 ; 1.0 ; 13066 MB ; 00:00:01 ;
|
|
; Timing Analyzer ; 00:00:02 ; 1.0 ; 13066 MB ; 00:00:02 ;
|
|
; Total ; 00:00:36 ; -- ; -- ; 00:00:50 ;
|
|
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
|
|
|
|
|
|
+------------------------------------------------------------------------------------+
|
|
; Flow OS Summary ;
|
|
+----------------------+------------------+------------+------------+----------------+
|
|
; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
|
|
+----------------------+------------------+------------+------------+----------------+
|
|
; Analysis & Synthesis ; ZaneMacWin11 ; Windows 10 ; 10.0 ; x86_64 ;
|
|
; Fitter ; ZaneMacWin11 ; Windows 10 ; 10.0 ; x86_64 ;
|
|
; Assembler ; ZaneMacWin11 ; Windows 10 ; 10.0 ; x86_64 ;
|
|
; Timing Analyzer ; ZaneMacWin11 ; Windows 10 ; 10.0 ; x86_64 ;
|
|
+----------------------+------------------+------------+------------+----------------+
|
|
|
|
|
|
------------
|
|
; Flow Log ;
|
|
------------
|
|
quartus_map --read_settings_files=on --write_settings_files=off RAM2E-MAXV -c RAM2E
|
|
quartus_fit --read_settings_files=off --write_settings_files=off RAM2E-MAXV -c RAM2E
|
|
quartus_asm --read_settings_files=off --write_settings_files=off RAM2E-MAXV -c RAM2E
|
|
quartus_sta RAM2E-MAXV -c RAM2E
|
|
|
|
|
|
|