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https://github.com/garrettsworkshop/RAM2E.git
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7ff514a26c
Previous commit had "snow" in 80-col mode when updating display. Put back command timing to fix problem. Kept PHI0 read gating depending on EN80 and data output gating
7 lines
298 B
Plaintext
7 lines
298 B
Plaintext
start_full_compilation:s:00:00:07
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start_analysis_synthesis:s:00:00:02-start_full_compilation
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start_analysis_elaboration:s-start_full_compilation
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start_fitter:s:00:00:02-start_full_compilation
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start_assembler:s:00:00:01-start_full_compilation
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start_timing_analyzer:s:00:00:02-start_full_compilation
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