148 lines
7.0 KiB
Plaintext
Executable File
148 lines
7.0 KiB
Plaintext
Executable File
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 32-bit
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# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
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# Date created = 17:58:45 August 04, 2019
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# RAM2E_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY MAX7000S
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set_global_assignment -name DEVICE "EPM7128SLC84-15"
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set_global_assignment -name TOP_LEVEL_ENTITY RAM2E
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:58:45 AUGUST 04, 2019"
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set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name DEVICE_FILTER_PACKAGE PLCC
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 84
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL
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set_location_assignment PIN_2 -to Q3
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set_location_assignment PIN_5 -to nWE
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set_location_assignment PIN_6 -to nC07X
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set_location_assignment PIN_8 -to nPRAS
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set_location_assignment PIN_9 -to C7M
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set_location_assignment PIN_1 -to Q3_2
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set_location_assignment PIN_24 -to RA[10]
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set_location_assignment PIN_25 -to RA[11]
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set_location_assignment PIN_27 -to nCAS
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set_location_assignment PIN_28 -to RD[4]
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set_location_assignment PIN_29 -to RD[5]
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set_location_assignment PIN_30 -to RD[6]
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set_location_assignment PIN_31 -to RD[7]
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set_location_assignment PIN_33 -to RD[0]
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set_location_assignment PIN_34 -to RD[1]
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set_location_assignment PIN_35 -to RD[2]
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set_location_assignment PIN_36 -to RD[3]
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set_location_assignment PIN_37 -to nRWE
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set_location_assignment PIN_39 -to nRAS
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set_location_assignment PIN_40 -to RA[9]
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set_location_assignment PIN_41 -to RA[8]
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set_location_assignment PIN_54 -to VD[7]
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set_location_assignment PIN_55 -to MD[7]
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set_location_assignment PIN_56 -to VD[0]
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set_location_assignment PIN_57 -to MD[0]
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set_location_assignment PIN_58 -to MD[6]
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set_location_assignment PIN_60 -to VD[6]
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set_location_assignment PIN_61 -to MD[1]
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set_location_assignment PIN_63 -to VD[1]
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set_location_assignment PIN_64 -to VD[5]
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set_location_assignment PIN_65 -to MD[5]
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set_location_assignment PIN_67 -to VD[2]
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set_location_assignment PIN_68 -to MD[2]
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set_location_assignment PIN_69 -to MD[4]
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set_location_assignment PIN_70 -to VD[4]
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set_location_assignment PIN_73 -to MD[3]
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set_location_assignment PIN_74 -to VD[3]
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set_location_assignment PIN_75 -to PHI0
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set_location_assignment PIN_76 -to nEN80
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set_location_assignment PIN_79 -to PHI1
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set_location_assignment PIN_77 -to nCASEN
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set_location_assignment PIN_80 -to nWE80
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set_location_assignment PIN_81 -to nPCAS
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set_location_assignment PIN_83 -to C14M
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set_location_assignment PIN_84 -to C14M_2
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set_location_assignment PIN_44 -to MA[7]
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set_location_assignment PIN_45 -to MA[0]
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set_location_assignment PIN_46 -to MA[1]
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set_location_assignment PIN_48 -to MA[2]
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set_location_assignment PIN_49 -to MA[3]
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set_location_assignment PIN_50 -to MA[4]
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set_location_assignment PIN_51 -to MA[5]
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set_location_assignment PIN_52 -to MA[6]
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set_location_assignment PIN_10 -to C3M58
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set_location_assignment PIN_4 -to AN3
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set_global_assignment -name SIMULATION_MODE FUNCTIONAL
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
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set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST ON -section_id eda_simulation
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set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
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set_location_assignment PIN_15 -to DelayIn[1]
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set_location_assignment PIN_16 -to DelayOut[1]
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set_location_assignment PIN_12 -to DelayOut[0]
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set_location_assignment PIN_11 -to DelayIn[0]
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set_location_assignment PIN_17 -to DelayIn[2]
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set_location_assignment PIN_18 -to DelayOut[2]
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set_location_assignment PIN_20 -to DelayIn[3]
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set_location_assignment PIN_21 -to DelayOut[3]
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set_global_assignment -name MAX7000S_JTAG_USER_CODE 7A2E
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set_global_assignment -name USE_CONFIGURATION_DEVICE ON
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
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set_global_assignment -name VERILOG_FILE RAM2E.v
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set_global_assignment -name VECTOR_WAVEFORM_FILE Simulation.vwf
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set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE "Z:/Repos/RAM2E/cpld/Simulation.vwf"
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
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set_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS OFF
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set_global_assignment -name AUTO_LCELL_INSERTION OFF
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set_global_assignment -name AUTO_PARALLEL_EXPANDERS OFF
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set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH
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set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
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set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
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set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
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set_global_assignment -name ECO_OPTIMIZE_TIMING ON
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set_global_assignment -name ECO_REGENERATE_REPORT ON
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set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING "PACK ALL IO REGISTERS"
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set_global_assignment -name SLOW_SLEW_RATE ON
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set_global_assignment -name ALM_REGISTER_PACKING_EFFORT HIGH
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set_global_assignment -name POWER_USE_PVA OFF
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set_global_assignment -name AUTO_TURBO_BIT OFF
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set_location_assignment PIN_22 -to C073SEL
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set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to DelayOut[1]
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set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to DelayOut[2]
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set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to DelayIn[2]
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set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to DelayIn[3]
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set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to DelayIn[1]
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set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to DelayOut[3]
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set_instance_assignment -name MAX7000_INDIVIDUAL_TURBO_BIT ON -to MDBEN |