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RAM2E
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RAM2E/cpld/db/RAM2E.map.qmsg

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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1581910341941 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1581910341941 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Feb 16 22:32:21 2020 " "Processing started: Sun Feb 16 22:32:21 2020" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1581910341941 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1581910341941 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off RAM2E -c RAM2E " "Command: quartus_map --read_settings_files=on --write_settings_files=off RAM2E -c RAM2E" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1581910341941 ""}
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1581910342144 ""}
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "RAM2E.v(39) " "Verilog HDL warning at RAM2E.v(39): extended using \"x\" or \"z\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 39 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1581910342170 ""}
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "RAM2E.v(44) " "Verilog HDL warning at RAM2E.v(44): extended using \"x\" or \"z\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 44 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1581910342170 ""}
{ "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "RAM2E.v(49) " "Verilog HDL warning at RAM2E.v(49): extended using \"x\" or \"z\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 49 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1581910342170 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ram2e.v 1 1 " "Found 1 design units, including 1 entities, in source file ram2e.v" { { "Info" "ISGN_ENTITY_NAME" "1 RAM2E " "Found entity 1: RAM2E" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1581910342171 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1581910342171 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "RAM2E " "Elaborating entity \"RAM2E\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1581910342197 ""}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 RAM2E.v(60) " "Verilog HDL assignment warning at RAM2E.v(60): truncated value with size 32 to match size of target (4)" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 60 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1581910342198 "|RAM2E"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 RAM2E.v(65) " "Verilog HDL assignment warning at RAM2E.v(65): truncated value with size 32 to match size of target (4)" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 65 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1581910342198 "|RAM2E"}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "RA\[11\]~reg0 data_in GND " "Reduced register \"RA\[11\]~reg0\" with stuck data_in port to stuck value GND" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 58 -1 0 } } } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "Quartus II" 0 -1 1581910342233 "|RAM2E|RA[11]~reg0"}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "Ref_rtl_0 4 " "Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"Ref_rtl_0\"" { } { } 0 19001 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342263 ""} } { } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Quartus II" 0 -1 1581910342263 ""}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:Ref_rtl_0 " "Elaborated megafunction instantiation \"lpm_counter:Ref_rtl_0\"" { } { } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342292 ""}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_counter:Ref_rtl_0 " "Instantiated megafunction \"lpm_counter:Ref_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 4 " "Parameter \"LPM_WIDTH\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1581910342292 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION UP " "Parameter \"LPM_DIRECTION\" = \"UP\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1581910342292 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_COUNTER " "Parameter \"LPM_TYPE\" = \"LPM_COUNTER\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1581910342292 ""} } { } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1581910342292 ""}
{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "RA\[11\] GND " "Pin \"RA\[11\]\" is stuck at GND" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 58 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 -1 1581910342354 "|RAM2E|RA[11]"} { "Warning" "WMLS_MLS_STUCK_PIN" "DelayOut\[0\] GND " "Pin \"DelayOut\[0\]\" is stuck at GND" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 18 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 -1 1581910342354 "|RAM2E|DelayOut[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "DelayOut\[3\] GND " "Pin \"DelayOut\[3\]\" is stuck at GND" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 18 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 -1 1581910342354 "|RAM2E|DelayOut[3]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Quartus II" 0 -1 1581910342354 ""}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "C14M " "Promoted clock signal driven by pin \"C14M\" to global clock signal" { } { } 0 280014 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "Quartus II" 0 -1 1581910342358 ""} } { } 0 280013 "Promoted pin-driven signal(s) to global signal" 0 0 "Quartus II" 0 -1 1581910342358 ""}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "18 " "Design contains 18 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "C14M_2 " "No output dependent on input pin \"C14M_2\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|C14M_2"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "C7M " "No output dependent on input pin \"C7M\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 9 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|C7M"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "Q3 " "No output dependent on input pin \"Q3\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|Q3"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "PHI0 " "No output dependent on input pin \"PHI0\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|PHI0"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "nPRAS " "No output dependent on input pin \"nPRAS\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 14 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|nPRAS"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "nPCAS " "No output dependent on input pin \"nPCAS\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 14 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|nPCAS"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "MA\[1\] " "No output dependent on input pin \"MA\[1\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 32 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|MA[1]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "MA\[2\] " "No output dependent on input pin \"MA\[2\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 32 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|MA[2]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "MA\[4\] " "No output dependent on input pin \"MA\[4\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 32 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|MA[4]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "MA\[5\] " "No output dependent on input pin \"MA\[5\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 32 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|MA[5]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "MA\[6\] " "No output dependent on input pin \"MA\[6\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 32 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|MA[6]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "MA\[7\] " "No output dependent on input pin \"MA\[7\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 32 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|MA[7]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "Q3_2 " "No output dependent on input pin \"Q3_2\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|Q3_2"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "C3M58 " "No output dependent on input pin \"C3M58\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 13 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|C3M58"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "AN3 " "No output dependent on input pin \"AN3\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 14 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|AN3"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "nCASEN " "No output dependent on input pin \"nCASEN\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 14 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|nCASEN"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DelayIn\[0\] " "No output dependent on input pin \"DelayIn\[0\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 17 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|DelayIn[0]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DelayIn\[3\] " "No output dependent on input pin \"DelayIn\[3\]\"" { } { { "RAM2E.v" "" { Text "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v" 17 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1581910342410 "|RAM2E|DelayIn[3]"} } { } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Quartus II" 0 -1 1581910342410 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "123 " "Implemented 123 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "28 " "Implemented 28 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1581910342411 ""} { "Info" "ICUT_CUT_TM_OPINS" "12 " "Implemented 12 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1581910342411 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "24 " "Implemented 24 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Quartus II" 0 -1 1581910342411 ""} { "Info" "ICUT_CUT_TM_MCELLS" "55 " "Implemented 55 macrocells" { } { } 0 21063 "Implemented %1!d! macrocells" 0 0 "Quartus II" 0 -1 1581910342411 ""} { "Info" "ICUT_CUT_TM_SEXPS" "4 " "Implemented 4 shareable expanders" { } { } 0 21073 "Implemented %1!d! shareable expanders" 0 0 "Quartus II" 0 -1 1581910342411 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1581910342411 ""}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Users/Zane/Documents/GitHub/RAM2E/cpld/output_files/RAM2E.map.smsg " "Generated suppressed messages file C:/Users/Zane/Documents/GitHub/RAM2E/cpld/output_files/RAM2E.map.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Quartus II" 0 -1 1581910342447 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 27 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 27 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4586 " "Peak virtual memory: 4586 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1581910342492 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Feb 16 22:32:22 2020 " "Processing ended: Sun Feb 16 22:32:22 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1581910342492 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1581910342492 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1581910342492 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1581910342492 ""}
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