RAM2E/cpld/simulation/modelsim/RAM2E_modelsim.xrf

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vendor_name = ModelSim
source_file = 1, C:/Users/Zane/Documents/GitHub/RAM2E/cpld/RAM2E.v
source_file = 1, C:/Users/Zane/Documents/GitHub/RAM2E/cpld/Simulation.vwf
source_file = 1, C:/Users/Zane/Documents/GitHub/RAM2E/cpld/db/RAM2E.cbx.xml
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_counter.tdf
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_constant.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_decode.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_add_sub.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/cmpconst.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_compare.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/lpm_counter.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/dffeea.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/alt_counter_stratix.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/aglobal130.inc
source_file = 1, c:/altera/13.0sp1/quartus/libraries/megafunctions/cbx.lst
design_name = RAM2E
instance = comp, \MA[0]~I , MA[0], RAM2E, 1
instance = comp, \MD[0]~I , MD[0], RAM2E, 1
instance = comp, \MD[1]~I , MD[1], RAM2E, 1
instance = comp, \MD[2]~I , MD[2], RAM2E, 1
instance = comp, \MD[3]~I , MD[3], RAM2E, 1
instance = comp, \MD[4]~I , MD[4], RAM2E, 1
instance = comp, \MD[5]~I , MD[5], RAM2E, 1
instance = comp, \MD[6]~I , MD[6], RAM2E, 1
instance = comp, \MD[7]~I , MD[7], RAM2E, 1
instance = comp, \RD[0]~I , RD[0], RAM2E, 1
instance = comp, \RD[1]~I , RD[1], RAM2E, 1
instance = comp, \RD[2]~I , RD[2], RAM2E, 1
instance = comp, \RD[3]~I , RD[3], RAM2E, 1
instance = comp, \RD[4]~I , RD[4], RAM2E, 1
instance = comp, \RD[5]~I , RD[5], RAM2E, 1
instance = comp, \RD[6]~I , RD[6], RAM2E, 1
instance = comp, \RD[7]~I , RD[7], RAM2E, 1
instance = comp, \C14M~I , C14M, RAM2E, 1
instance = comp, \PHI1~I , PHI1, RAM2E, 1
instance = comp, \S[2] , S[2], RAM2E, 1
instance = comp, \S[3] , S[3], RAM2E, 1
instance = comp, \S[1] , S[1], RAM2E, 1
instance = comp, \S[0] , S[0], RAM2E, 1
instance = comp, \MDR[0] , MDR[0], RAM2E, 1
instance = comp, \nWE~I , nWE, RAM2E, 1
instance = comp, \DelayIn[2]~I , DelayIn[2], RAM2E, 1
instance = comp, \MDOE~1 , MDOE~1, RAM2E, 1
instance = comp, \MDR[1] , MDR[1], RAM2E, 1
instance = comp, \MDR[2] , MDR[2], RAM2E, 1
instance = comp, \MDR[3] , MDR[3], RAM2E, 1
instance = comp, \MDR[4] , MDR[4], RAM2E, 1
instance = comp, \MDR[5] , MDR[5], RAM2E, 1
instance = comp, \MDR[6] , MDR[6], RAM2E, 1
instance = comp, \MDR[7] , MDR[7], RAM2E, 1
instance = comp, \MD[0]~24 , MD[0]~24, RAM2E, 1
instance = comp, \RDOE~1 , RDOE~1, RAM2E, 1
instance = comp, \MD[1]~26 , MD[1]~26, RAM2E, 1
instance = comp, \MD[2]~28 , MD[2]~28, RAM2E, 1
instance = comp, \MD[3]~30 , MD[3]~30, RAM2E, 1
instance = comp, \MD[4]~32 , MD[4]~32, RAM2E, 1
instance = comp, \MD[5]~34 , MD[5]~34, RAM2E, 1
instance = comp, \MD[6]~36 , MD[6]~36, RAM2E, 1
instance = comp, \MD[7]~38 , MD[7]~38, RAM2E, 1
instance = comp, \~GND~0 , ~GND~0, RAM2E, 1
instance = comp, \~GND~1 , ~GND~1, RAM2E, 1
instance = comp, \~GND~2 , ~GND~2, RAM2E, 1
instance = comp, \nWE80~I , nWE80, RAM2E, 1
instance = comp, \nWE80~1 , nWE80~1, RAM2E, 1
instance = comp, \nEN80~I , nEN80, RAM2E, 1
instance = comp, \nEN80~1 , nEN80~1, RAM2E, 1
instance = comp, \DelayIn[1]~I , DelayIn[1], RAM2E, 1
instance = comp, \DelayIn[1]~1 , DelayIn[1]~1, RAM2E, 1
instance = comp, \VDR[0] , VDR[0], RAM2E, 1
instance = comp, \VDR[1] , VDR[1], RAM2E, 1
instance = comp, \VDR[2] , VDR[2], RAM2E, 1
instance = comp, \VDR[3] , VDR[3], RAM2E, 1
instance = comp, \VDR[4] , VDR[4], RAM2E, 1
instance = comp, \VDR[5] , VDR[5], RAM2E, 1
instance = comp, \VDR[6] , VDR[6], RAM2E, 1
instance = comp, \VDR[7] , VDR[7], RAM2E, 1
instance = comp, \C073SEL~7 , C073SEL~7, RAM2E, 1
instance = comp, \MA[3]~I , MA[3], RAM2E, 1
instance = comp, \C073SEL~8 , C073SEL~8, RAM2E, 1
instance = comp, \nC07X~I , nC07X, RAM2E, 1
instance = comp, \C073SEL~9 , C073SEL~9, RAM2E, 1
instance = comp, \C073SEL~reg0 , C073SEL~reg0, RAM2E, 1
instance = comp, \BA[4] , BA[4], RAM2E, 1
instance = comp, \RA[10]~reg0 , RA[10]~reg0, RAM2E, 1
instance = comp, \BA[2] , BA[2], RAM2E, 1
instance = comp, \BA[0] , BA[0], RAM2E, 1
instance = comp, \RA[8]~reg0 , RA[8]~reg0, RAM2E, 1
instance = comp, \BA[5] , BA[5], RAM2E, 1
instance = comp, \BA[3] , BA[3], RAM2E, 1
instance = comp, \BA[1] , BA[1], RAM2E, 1
instance = comp, \RA[9]~reg0 , RA[9]~reg0, RAM2E, 1
instance = comp, \Ref_rtl_0|dffs[2] , Ref_rtl_0|dffs[2], RAM2E, 1
instance = comp, \Ref_rtl_0|dffs[0] , Ref_rtl_0|dffs[0], RAM2E, 1
instance = comp, \Ref_rtl_0|dffs[1] , Ref_rtl_0|dffs[1], RAM2E, 1
instance = comp, \Ref_rtl_0|dffs[3] , Ref_rtl_0|dffs[3], RAM2E, 1
instance = comp, \nRAS~8 , nRAS~8, RAM2E, 1
instance = comp, \nRAS~reg0 , nRAS~reg0, RAM2E, 1
instance = comp, \nCAS~reg0 , nCAS~reg0, RAM2E, 1
instance = comp, \C14M_2~I , C14M_2, RAM2E, 1
instance = comp, \C7M~I , C7M, RAM2E, 1
instance = comp, \Q3~I , Q3, RAM2E, 1
instance = comp, \PHI0~I , PHI0, RAM2E, 1
instance = comp, \nPRAS~I , nPRAS, RAM2E, 1
instance = comp, \nPCAS~I , nPCAS, RAM2E, 1
instance = comp, \MA[1]~I , MA[1], RAM2E, 1
instance = comp, \MA[2]~I , MA[2], RAM2E, 1
instance = comp, \MA[4]~I , MA[4], RAM2E, 1
instance = comp, \MA[5]~I , MA[5], RAM2E, 1
instance = comp, \MA[6]~I , MA[6], RAM2E, 1
instance = comp, \MA[7]~I , MA[7], RAM2E, 1
instance = comp, \RA[11]~I , RA[11], RAM2E, 1
instance = comp, \Q3_2~I , Q3_2, RAM2E, 1
instance = comp, \C3M58~I , C3M58, RAM2E, 1
instance = comp, \AN3~I , AN3, RAM2E, 1
instance = comp, \nCASEN~I , nCASEN, RAM2E, 1
instance = comp, \DelayIn[0]~I , DelayIn[0], RAM2E, 1
instance = comp, \DelayIn[3]~I , DelayIn[3], RAM2E, 1
instance = comp, \DelayOut[0]~I , DelayOut[0], RAM2E, 1
instance = comp, \DelayOut[3]~I , DelayOut[3], RAM2E, 1
instance = comp, \nRWE~I , nRWE, RAM2E, 1
instance = comp, \DelayOut[1]~I , DelayOut[1], RAM2E, 1
instance = comp, \DelayOut[2]~I , DelayOut[2], RAM2E, 1
instance = comp, \VD[0]~I , VD[0], RAM2E, 1
instance = comp, \VD[1]~I , VD[1], RAM2E, 1
instance = comp, \VD[2]~I , VD[2], RAM2E, 1
instance = comp, \VD[3]~I , VD[3], RAM2E, 1
instance = comp, \VD[4]~I , VD[4], RAM2E, 1
instance = comp, \VD[5]~I , VD[5], RAM2E, 1
instance = comp, \VD[6]~I , VD[6], RAM2E, 1
instance = comp, \VD[7]~I , VD[7], RAM2E, 1
instance = comp, \C073SEL~I , C073SEL, RAM2E, 1
instance = comp, \RA[10]~I , RA[10], RAM2E, 1
instance = comp, \RA[8]~I , RA[8], RAM2E, 1
instance = comp, \RA[9]~I , RA[9], RAM2E, 1
instance = comp, \nRAS~I , nRAS, RAM2E, 1
instance = comp, \nCAS~I , nCAS, RAM2E, 1