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dec33238f1
RAM2E/CPLD/LCMXO2-1200HC/impl1/RAM2E_LCMXO2_1200HC_impl1_iotiming.html
Zane Kaminski dec33238f1 RC
2023-09-21 05:45:21 -04:00

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<HEAD><TITLE>I/O Timing Report</TITLE>
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<PRE><A name="Top"></A><B><U><big>I/O Timing Report</big></U></B>
Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
Design name: RAM2E
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-1200HC
Package: TQFP100
Performance: 5
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
Design name: RAM2E
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-1200HC
Package: TQFP100
Performance: 6
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
Loading design for application iotiming from file ram2e_lcmxo2_1200hc_impl1.ncd.
Design name: RAM2E
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-1200HC
Package: TQFP100
Performance: M
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
// Design: RAM2E
// Package: TQFP100
// ncd File: ram2e_lcmxo2_1200hc_impl1.ncd
// Version: Diamond (64-bit) 3.12.1.454
// Written on Thu Sep 21 05:35:11 2023
// M: Minimum Performance Grade
// iotiming RAM2E_LCMXO2_1200HC_impl1.ncd RAM2E_LCMXO2_1200HC_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2E/CPLD/LCMXO2-1200HC/promote.xml
I/O Timing Report (All units are in ns)
Worst Case Results across Performance Grades (M, 6, 5, 4):
// Input Setup and Hold Times
Port Clock Edge Setup Performance_Grade Hold Performance_Grade
----------------------------------------------------------------------
Ain[0] C14M R -0.231 M 2.350 4
Ain[1] C14M R 1.429 4 0.543 4
Ain[2] C14M R 1.518 4 0.412 4
Ain[3] C14M R -0.231 M 2.350 4
Ain[4] C14M R 0.212 4 1.560 4
Ain[5] C14M R 0.742 4 1.110 4
Ain[6] C14M R 0.469 4 1.329 4
Ain[7] C14M R 1.416 4 0.531 4
Din[0] C14M R 8.327 4 1.958 4
Din[1] C14M R 5.826 4 2.521 4
Din[2] C14M R 6.539 4 2.135 4
Din[3] C14M R 5.849 4 2.648 4
Din[4] C14M R 7.061 4 2.095 4
Din[5] C14M R 6.295 4 2.894 4
Din[6] C14M R 4.991 4 2.892 4
Din[7] C14M R 6.416 4 2.971 4
PHI1 C14M R 1.151 4 4.842 4
RD[0] C14M F -0.266 M 3.107 4
RD[1] C14M F -0.248 M 3.183 4
RD[2] C14M F -0.105 M 2.610 4
RD[3] C14M F -0.243 M 3.107 4
RD[4] C14M F 0.103 4 2.201 4
RD[5] C14M F -0.092 M 2.192 4
RD[6] C14M F -0.084 M 1.756 4
RD[7] C14M F -0.092 M 2.661 4
nC07X C14M R -0.316 M 2.625 4
nEN80 C14M R 5.220 4 0.032 M
nWE C14M R -0.093 M 2.033 4
nWE80 C14M R 1.630 4 0.329 6
// Clock to Output Delay
Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade
------------------------------------------------------------------------
BA[0] C14M R 10.424 4 3.355 M
BA[1] C14M R 10.424 4 3.355 M
CKE C14M R 10.424 4 3.355 M
DQMH C14M R 10.404 4 3.362 M
DQML C14M R 10.404 4 3.362 M
Dout[0] C14M F 10.750 4 3.634 M
Dout[1] C14M F 10.750 4 3.634 M
Dout[2] C14M F 10.739 4 3.628 M
Dout[3] C14M F 10.750 4 3.634 M
Dout[4] C14M F 10.739 4 3.628 M
Dout[5] C14M F 10.739 4 3.628 M
Dout[6] C14M F 10.750 4 3.634 M
Dout[7] C14M F 10.750 4 3.634 M
LED C14M R 21.299 4 8.576 M
RA[0] C14M R 12.236 4 3.758 M
RA[10] C14M R 10.490 4 3.360 M
RA[11] C14M R 10.424 4 3.355 M
RA[1] C14M R 10.490 4 3.360 M
RA[2] C14M R 10.490 4 3.360 M
RA[3] C14M R 11.808 4 3.656 M
RA[4] C14M R 10.490 4 3.360 M
RA[5] C14M R 10.490 4 3.360 M
RA[6] C14M R 10.490 4 3.360 M
RA[7] C14M R 10.490 4 3.360 M
RA[8] C14M R 10.490 4 3.360 M
RA[9] C14M R 10.490 4 3.360 M
Vout[0] C14M F 11.348 4 3.872 M
Vout[1] C14M F 11.434 4 3.871 M
Vout[2] C14M F 11.348 4 3.872 M
Vout[3] C14M F 11.434 4 3.871 M
Vout[4] C14M F 11.348 4 3.872 M
Vout[5] C14M F 11.348 4 3.872 M
Vout[6] C14M F 11.434 4 3.871 M
Vout[7] C14M F 11.434 4 3.871 M
nCAS C14M R 10.424 4 3.355 M
nCS C14M R 10.424 4 3.355 M
nDOE C14M R 14.217 4 4.353 M
nRAS C14M R 10.424 4 3.355 M
nRWE C14M R 10.424 4 3.355 M
WARNING: you must also run trce with hold speed: 4
WARNING: you must also run trce with hold speed: 6
WARNING: you must also run trce with setup speed: M
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