469 lines
21 KiB
Plaintext
469 lines
21 KiB
Plaintext
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Lattice Mapping Report File for Design Module 'RAM2E'
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Design Information
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------------------
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Command line: map -a MachXO2 -p LCMXO2-640HC -t TQFP100 -s 4 -oc Commercial
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RAM2E_LCMXO2_640HC_impl1.ngd -o RAM2E_LCMXO2_640HC_impl1_map.ncd -pr
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RAM2E_LCMXO2_640HC_impl1.prf -mp RAM2E_LCMXO2_640HC_impl1.mrp -lpf //Mac/iC
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loud/Repos/ram2e/CPLD/LCMXO2-640HC/impl1/RAM2E_LCMXO2_640HC_impl1_synplify.
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lpf -lpf //Mac/iCloud/Repos/ram2e/CPLD/RAM2E-LCMXO2.lpf -c 0 -gui -msgset
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//Mac/iCloud/Repos/ram2e/CPLD/LCMXO2-640HC/promote.xml
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Target Vendor: LATTICE
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Target Device: LCMXO2-640HCTQFP100
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Target Performance: 4
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Mapper: xo2c00, version: Diamond (64-bit) 3.12.1.454
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Mapped on: 12/28/23 23:09:57
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Design Summary
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--------------
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Number of registers: 122 out of 877 (14%)
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PFU registers: 93 out of 640 (15%)
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PIO registers: 29 out of 237 (12%)
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Number of SLICEs: 148 out of 320 (46%)
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SLICEs as Logic/ROM: 148 out of 320 (46%)
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SLICEs as RAM: 0 out of 240 (0%)
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SLICEs as Carry: 9 out of 320 (3%)
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Number of LUT4s: 296 out of 640 (46%)
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Number used as logic LUTs: 278
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Number used as distributed RAM: 0
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Number used as ripple logic: 18
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Number used as shift registers: 0
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Number of PIO sites used: 69 + 4(JTAG) out of 79 (92%)
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Number of block RAMs: 0 out of 2 (0%)
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Number of GSRs: 0 out of 1 (0%)
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EFB used : Yes
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JTAG used : No
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Readback used : No
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Oscillator used : No
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Startup used : No
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POR : On
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Bandgap : On
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Number of Power Controller: 0 out of 1 (0%)
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Number of Dynamic Bank Controller (BCINRD): 0 out of 4 (0%)
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Number of DCCA: 0 out of 8 (0%)
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Number of DCMA: 0 out of 2 (0%)
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Notes:-
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1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
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distributed RAMs) + 2*(Number of ripple logic)
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2. Number of logic LUT4s does not include count of distributed RAM and
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ripple logic.
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Number of clocks: 1
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Net C14M_c: 89 loads, 73 rising, 16 falling (Driver: PIO C14M )
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Number of Clock Enables: 14
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Net N_225_i: 2 loads, 0 LSLICEs
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Net N_201_i: 2 loads, 0 LSLICEs
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Net N_187_i: 11 loads, 11 LSLICEs
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Net ram2e_ufm/wb_adr_0_sqmuxa_1_i: 1 loads, 1 LSLICEs
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Net RC12: 2 loads, 2 LSLICEs
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Net ram2e_ufm/CmdBitbangMXO2_RNINSM62: 8 loads, 8 LSLICEs
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Page 1
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Design: RAM2E Date: 12/28/23 23:09:57
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Design Summary (cont)
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---------------------
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Net ram2e_ufm/wb_we_RNO_0: 1 loads, 1 LSLICEs
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Net N_185_i: 2 loads, 2 LSLICEs
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Net ram2e_ufm/un1_CmdSetRWBankFFChip13_1_i_0_0[0]: 1 loads, 1 LSLICEs
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Net ram2e_ufm/un1_RWMask_0_sqmuxa_1_i_0_0[0]: 4 loads, 4 LSLICEs
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Net ram2e_ufm/un1_LEDEN_0_sqmuxa_1_i_0_0[0]: 1 loads, 1 LSLICEs
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Net N_126: 6 loads, 6 LSLICEs
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Net un9_VOEEN_0_a2_0_a3_0_a3: 1 loads, 1 LSLICEs
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Net Vout3: 8 loads, 0 LSLICEs
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Number of LSRs: 7
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Net un1_CS_0_sqmuxa_i: 2 loads, 2 LSLICEs
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Net BA_0_sqmuxa: 2 loads, 0 LSLICEs
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Net S[2]: 1 loads, 1 LSLICEs
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Net ram2e_ufm/wb_rst: 1 loads, 0 LSLICEs
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Net ram2e_ufm/wb_rst16_i: 1 loads, 1 LSLICEs
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Net N_1080_0: 1 loads, 1 LSLICEs
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Net N_1078_0: 1 loads, 1 LSLICEs
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Number of nets driven by tri-state buffers: 0
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Top 10 highest fanout non-clock nets:
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Net S[2]: 50 loads
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Net S[3]: 45 loads
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Net S[0]: 37 loads
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Net S[1]: 34 loads
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Net FS[12]: 24 loads
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Net FS[11]: 22 loads
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Net FS[10]: 19 loads
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Net FS[13]: 19 loads
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Net FS[9]: 19 loads
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Net FS[8]: 18 loads
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Number of warnings: 3
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Number of errors: 0
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Design Errors/Warnings
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----------------------
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WARNING - map: //Mac/iCloud/Repos/ram2e/CPLD/RAM2E-LCMXO2.lpf(93): Semantic
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error in "IOBUF PORT "nWE80" IO_TYPE=LVCMOS33 PULLMODE=NONE ;": Port
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"nWE80" does not exist in the design. This preference has been disabled.
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WARNING - map: UFM was enabled in EFB: Enabling the configuration interface will
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temporarily disable certain features of the device including Power
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Controller, GSR, Hardened User SPI Port, Hardened Primary User I2C Port.
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Functionality is restored after the Flash Memory (UFM/Configuration)
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Interface is disabled using Disable Configuration Interface command 0x26
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followed by Bypass command 0xFF.
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WARNING - map: IO buffer missing for top level port nWE80...logic will be
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discarded.
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IO (PIO) Attributes
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-------------------
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+---------------------+-----------+-----------+------------+
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| IO Name | Direction | Levelmode | IO |
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Page 2
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Design: RAM2E Date: 12/28/23 23:09:57
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IO (PIO) Attributes (cont)
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--------------------------
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| | | IO_TYPE | Register |
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+---------------------+-----------+-----------+------------+
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| RD[0] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| LED | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| C14M | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RD[7] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RD[6] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RD[5] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RD[4] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RD[3] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RD[2] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RD[1] | BIDIR | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| DQMH | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| DQML | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[11] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[10] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[9] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[8] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[7] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[6] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[5] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[4] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[3] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[2] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[1] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RAout[0] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| BA[1] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| BA[0] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nRWEout | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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Page 3
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Design: RAM2E Date: 12/28/23 23:09:57
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IO (PIO) Attributes (cont)
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--------------------------
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| nCASout | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nRASout | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nCSout | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| CKEout | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nVOE | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Vout[7] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Vout[6] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Vout[5] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Vout[4] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Vout[3] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Vout[2] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Vout[1] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Vout[0] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nDOE | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[7] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[6] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[5] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[4] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[3] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[2] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[1] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[0] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Din[7] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Din[6] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Din[5] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Din[4] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Din[3] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Din[2] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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Page 4
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Design: RAM2E Date: 12/28/23 23:09:57
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IO (PIO) Attributes (cont)
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--------------------------
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| Din[1] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Din[0] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[7] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[6] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[5] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[4] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[3] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[2] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[1] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Ain[0] | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nC07X | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nEN80 | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nWE | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| PHI1 | INPUT | LVCMOS33 | IN |
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+---------------------+-----------+-----------+------------+
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Removed logic
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-------------
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Block GSR_INST undriven or does not drive anything - clipped.
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Block ram2e_ufm/VCC undriven or does not drive anything - clipped.
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Block ram2e_ufm/GND undriven or does not drive anything - clipped.
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Signal CKEout.CN was merged into signal C14M_c
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Signal ram2e_ufm/ufmefb/VCC undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/GND undriven or does not drive anything - clipped.
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Signal FS_s_0_S1[15] undriven or does not drive anything - clipped.
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Signal FS_s_0_COUT[15] undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/CFGSTDBY undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/CFGWAKE undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/wbc_ufm_irq undriven or does not drive anything -
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clipped.
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Signal ram2e_ufm/ufmefb/TCOC undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/TCINT undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIIRQO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPICSNEN undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN7 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN6 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN5 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN4 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN3 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN2 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN1 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMCSN0 undriven or does not drive anything - clipped.
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Page 5
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Design: RAM2E Date: 12/28/23 23:09:57
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Removed logic (cont)
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--------------------
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Signal ram2e_ufm/ufmefb/SPIMOSIEN undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMOSIO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMISOEN undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPIMISOO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPISCKEN undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/SPISCKO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/I2C2IRQO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/I2C1IRQO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/I2C2SDAOEN undriven or does not drive anything -
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clipped.
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Signal ram2e_ufm/ufmefb/I2C2SDAO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/I2C2SCLOEN undriven or does not drive anything -
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clipped.
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Signal ram2e_ufm/ufmefb/I2C2SCLO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/I2C1SDAOEN undriven or does not drive anything -
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clipped.
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Signal ram2e_ufm/ufmefb/I2C1SDAO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/I2C1SCLOEN undriven or does not drive anything -
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clipped.
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Signal ram2e_ufm/ufmefb/I2C1SCLO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO0 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO1 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO2 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO3 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO4 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO5 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO6 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLDATO7 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLADRO0 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLADRO1 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLADRO2 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLADRO3 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLADRO4 undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLWEO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLL1STBO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLL0STBO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLRSTO undriven or does not drive anything - clipped.
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Signal ram2e_ufm/ufmefb/PLLCLKO undriven or does not drive anything - clipped.
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Signal FS_cry_0_S0[0] undriven or does not drive anything - clipped.
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Signal N_1 undriven or does not drive anything - clipped.
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Block nCASout.CN was optimized away.
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Block ram2e_ufm/ufmefb/VCC was optimized away.
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Block ram2e_ufm/ufmefb/GND was optimized away.
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Embedded Functional Block Connection Summary
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--------------------------------------------
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Desired WISHBONE clock frequency: 14.4 MHz
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Clock source: C14M_c
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Reset source: ram2e_ufm/wb_rst
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Functions mode:
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I2C #1 (Primary) Function: DISABLED
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Page 6
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Design: RAM2E Date: 12/28/23 23:09:57
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Embedded Functional Block Connection Summary (cont)
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---------------------------------------------------
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I2C #2 (Secondary) Function: DISABLED
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SPI Function: DISABLED
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Timer/Counter Function: DISABLED
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Timer/Counter Mode: WB
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UFM Connection: ENABLED
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PLL0 Connection: DISABLED
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PLL1 Connection: DISABLED
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I2C Function Summary:
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--------------------
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None
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SPI Function Summary:
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--------------------
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None
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Timer/Counter Function Summary:
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------------------------------
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None
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UFM Function Summary:
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--------------------
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UFM Utilization: General Purpose Flash Memory
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Initialized UFM Pages: 1 Pages (1*128 Bits)
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Available General
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Purpose Flash Memory: 191 Pages (191*128 Bits)
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EBR Blocks with Unique
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Initialization Data: 0
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WID EBR Instance
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--- ------------
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ASIC Components
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---------------
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Instance Name: ram2e_ufm/ufmefb/EFBInst_0
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Type: EFB
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Run Time and Memory Usage
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-------------------------
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Total CPU Time: 0 secs
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Total REAL Time: 0 secs
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Peak Memory Usage: 59 MB
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Page 7
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Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
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Copyright (c) 1995 AT&T Corp. All rights reserved.
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Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
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Copyright (c) 2001 Agere Systems All rights reserved.
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Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights
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reserved.
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