#Build: Synplify Pro (R) R-2021.03L-SP1, Build 093R, Aug 10 2021 #install: C:\lscc\diamond\3.12\synpbase #OS: Windows 8 6.2 #Hostname: ZANEPC # Wed Aug 16 20:59:29 2023 #Implementation: impl1 Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: R-2021.03L-SP1 Install: C:\lscc\diamond\3.12\synpbase OS: Windows 6.2 Hostname: ZANEPC Implementation : impl1 Synopsys HDL Compiler, Version comp202103synp2, Build 093R, Built Aug 10 2021 09:15:36, @ @N: : | Running in 64-bit mode ###########################################################[ Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: R-2021.03L-SP1 Install: C:\lscc\diamond\3.12\synpbase OS: Windows 6.2 Hostname: ZANEPC Implementation : impl1 Synopsys Verilog Compiler, Version comp202103synp2, Build 093R, Built Aug 10 2021 09:15:36, @ @N: : | Running in 64-bit mode @I::"C:\lscc\diamond\3.12\synpbase\lib\lucent\machxo2.v" (library work) @I::"C:\lscc\diamond\3.12\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"D:\OneDrive\Documents\GitHub\RAM2GS\CPLD\RAM2GS-LCMXO2.v" (library work) @I::"D:\OneDrive\Documents\GitHub\RAM2GS\CPLD\LCMXO2-640HC\REFB.v" (library work) Verilog syntax check successful! Compiler output is up to date. No re-compile necessary Selecting top level module RAM2GS @N:CG364 : machxo2.v(1120) | Synthesizing module VHI in library work. Running optimization stage 1 on VHI ....... Finished optimization stage 1 on VHI (CPU Time 0h:00m:00s, Memory Used current: 92MB peak: 92MB) @N:CG364 : machxo2.v(1124) | Synthesizing module VLO in library work. Running optimization stage 1 on VLO ....... Finished optimization stage 1 on VLO (CPU Time 0h:00m:00s, Memory Used current: 92MB peak: 92MB) @N:CG364 : machxo2.v(1800) | Synthesizing module EFB in library work. Running optimization stage 1 on EFB ....... Finished optimization stage 1 on EFB (CPU Time 0h:00m:00s, Memory Used current: 92MB peak: 92MB) @N:CG364 : REFB.v(8) | Synthesizing module REFB in library work. Running optimization stage 1 on REFB ....... Finished optimization stage 1 on REFB (CPU Time 0h:00m:00s, Memory Used current: 92MB peak: 92MB) @N:CG364 : RAM2GS-LCMXO2.v(1) | Synthesizing module RAM2GS in library work. Running optimization stage 1 on RAM2GS ....... Finished optimization stage 1 on RAM2GS (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 94MB) Running optimization stage 2 on RAM2GS ....... Finished optimization stage 2 on RAM2GS (CPU Time 0h:00m:00s, Memory Used current: 95MB peak: 96MB) Running optimization stage 2 on REFB ....... Finished optimization stage 2 on REFB (CPU Time 0h:00m:00s, Memory Used current: 95MB peak: 96MB) Running optimization stage 2 on EFB ....... Finished optimization stage 2 on EFB (CPU Time 0h:00m:00s, Memory Used current: 95MB peak: 96MB) Running optimization stage 2 on VLO ....... Finished optimization stage 2 on VLO (CPU Time 0h:00m:00s, Memory Used current: 95MB peak: 96MB) Running optimization stage 2 on VHI ....... Finished optimization stage 2 on VHI (CPU Time 0h:00m:00s, Memory Used current: 95MB peak: 96MB) For a summary of runtime and memory usage per design unit, please see file: ========================================================== Linked File: layer0.rt.csv At c_ver Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 90MB peak: 91MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Wed Aug 16 20:59:29 2023 ###########################################################] ###########################################################[ Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: R-2021.03L-SP1 Install: C:\lscc\diamond\3.12\synpbase OS: Windows 6.2 Hostname: ZANEPC Implementation : impl1 Synopsys Synopsys Netlist Linker, Version comp202103synp2, Build 093R, Built Aug 10 2021 09:15:36, @ @N: : | Running in 64-bit mode Linker output is up to date. No re-linking necessary At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 87MB peak: 87MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Wed Aug 16 20:59:29 2023 ###########################################################] For a summary of runtime and memory usage for all design units, please see file: ========================================================== Linked File: LCMXO2_640HC_impl1_comp.rt.csv @END At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 23MB peak: 23MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Wed Aug 16 20:59:29 2023 ###########################################################]