Project Settings |
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Project Name | proj_1 | Device Name | impl1: Lattice MachXO2 : LCMXO2_640HC |
Implementation Name | impl1 | Top Module | RAM2GS |
Pipelining | 1 | Retiming | 0 |
Resource Sharing | 1 | Fanout Guide | 1000 |
Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
Clock Conversion | 1 | FSM Compiler | 1 |
Run Status |
Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
(compiler) | Complete |
8 |
0 |
0 |
- |
00m:00s |
- |
8/16/2023 8:59:29 PM |
(premap) | Complete |
23 |
1 |
0 |
0m:01s |
0m:01s |
175MB |
8/16/2023 8:59:32 PM |
(fpga_mapper) | Complete |
22 |
7 |
0 |
0m:03s |
0m:03s |
193MB |
8/16/2023 8:59:35 PM |
Area Summary |
|
Register bits | 109 |
I/O cells | 63 |
Block RAMs
(v_ram) | 0 |
DSPs
(dsp_used) | 0 |
ORCA LUTs
(total_luts) | 206 |
| |
Timing Summary |
|
Clock Name | Req Freq | Est Freq | Slack |
PHI2 | 2.9 MHz | 1.0 MHz | -1.832 |
RCLK | 62.5 MHz | 22.1 MHz | -0.784 |
nCCAS | 2.9 MHz | NA | NA |
nCRAS | 2.9 MHz | 1.0 MHz | -1.725 |
System | 100.0 MHz | NA | 15.472 |
Optimizations Summary |
Combined Clock Conversion | 4 / 0 |
| |
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