I/O Timing Report Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 5 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 6 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: M Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. // Design: RAM2GS // Package: TQFP100 // ncd File: ram2gs_lcmxo2_640hc_impl1.ncd // Version: Diamond (64-bit) 3.12.1.454 // Written on Thu Sep 21 05:40:03 2023 // M: Minimum Performance Grade // iotiming RAM2GS_LCMXO2_640HC_impl1.ncd RAM2GS_LCMXO2_640HC_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2GS/CPLD/LCMXO2-640HC/promote.xml I/O Timing Report (All units are in ns) Worst Case Results across Performance Grades (M, 6, 5, 4): // Input Setup and Hold Times Port Clock Edge Setup Performance_Grade Hold Performance_Grade ---------------------------------------------------------------------- CROW[0] nCRAS F 2.429 4 -0.163 M CROW[1] nCRAS F 1.927 4 -0.005 M Din[0] PHI2 F 5.424 4 3.636 4 Din[0] nCCAS F 1.913 4 -0.130 M Din[1] PHI2 F 5.162 4 3.516 4 Din[1] nCCAS F 2.007 4 -0.156 M Din[2] PHI2 F 5.078 4 3.516 4 Din[2] nCCAS F 0.876 4 0.346 4 Din[3] PHI2 F 6.152 4 3.516 4 Din[3] nCCAS F 0.245 4 0.869 4 Din[4] PHI2 F 5.240 4 3.516 4 Din[4] nCCAS F 0.714 4 0.460 4 Din[5] PHI2 F 6.035 4 3.516 4 Din[5] nCCAS F 0.751 4 0.419 4 Din[6] PHI2 F 4.496 4 3.636 4 Din[6] nCCAS F 1.518 4 -0.020 M Din[7] PHI2 F 4.936 4 3.636 4 Din[7] nCCAS F 1.852 4 -0.081 M MAin[0] PHI2 F 5.207 4 0.531 4 MAin[0] nCRAS F 1.658 4 0.036 M MAin[1] PHI2 F 3.450 4 0.460 4 MAin[1] nCRAS F 2.014 4 -0.043 M MAin[2] PHI2 F 7.941 4 -0.604 M MAin[2] nCRAS F 1.001 4 0.498 4 MAin[3] PHI2 F 8.770 4 -0.865 M MAin[3] nCRAS F 2.190 4 -0.151 M MAin[4] PHI2 F 9.575 4 -1.072 M MAin[4] nCRAS F 1.331 4 0.186 4 MAin[5] PHI2 F 9.093 4 -0.925 M MAin[5] nCRAS F 1.329 4 0.186 4 MAin[6] PHI2 F 9.450 4 -1.036 M MAin[6] nCRAS F 1.323 4 0.191 4 MAin[7] PHI2 F 8.247 4 -0.706 M MAin[7] nCRAS F 1.258 4 0.267 4 MAin[8] nCRAS F 0.994 4 0.504 4 MAin[9] nCRAS F 0.614 4 0.830 4 PHI2 RCLK R -0.005 M 2.116 4 nCCAS RCLK R 3.191 4 -0.531 M nCCAS nCRAS F 3.195 4 -0.341 M nCRAS RCLK R 2.797 4 -0.402 M nFWE PHI2 F 8.238 4 -0.666 M nFWE nCRAS F 1.140 4 0.400 4 // Clock to Output Delay Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade ------------------------------------------------------------------------ LED RCLK R 10.962 4 3.218 M LED nCRAS F 10.815 4 3.159 M RA[0] RCLK R 10.143 4 3.128 M RA[0] nCRAS F 11.178 4 3.358 M RA[10] RCLK R 7.578 4 2.578 M RA[11] PHI2 R 9.098 4 3.021 M RA[1] RCLK R 10.676 4 3.248 M RA[1] nCRAS F 11.215 4 3.370 M RA[2] RCLK R 11.199 4 3.402 M RA[2] nCRAS F 11.518 4 3.451 M RA[3] RCLK R 10.446 4 3.209 M RA[3] nCRAS F 11.264 4 3.364 M RA[4] RCLK R 10.446 4 3.209 M RA[4] nCRAS F 11.484 4 3.438 M RA[5] RCLK R 11.199 4 3.402 M RA[5] nCRAS F 11.264 4 3.364 M RA[6] RCLK R 11.424 4 3.444 M RA[6] nCRAS F 11.388 4 3.388 M RA[7] RCLK R 11.112 4 3.370 M RA[7] nCRAS F 11.608 4 3.487 M RA[8] RCLK R 10.916 4 3.308 M RA[8] nCRAS F 11.380 4 3.415 M RA[9] RCLK R 11.115 4 3.362 M RA[9] nCRAS F 11.201 4 3.380 M RBA[0] nCRAS F 8.645 4 2.828 M RBA[1] nCRAS F 8.645 4 2.828 M RCKE RCLK R 8.593 4 2.793 M RDQMH RCLK R 10.909 4 3.327 M RDQML RCLK R 10.348 4 3.207 M RD[0] nCCAS F 8.761 4 2.984 M RD[1] nCCAS F 8.761 4 2.984 M RD[2] nCCAS F 8.761 4 2.984 M RD[3] nCCAS F 8.761 4 2.984 M RD[4] nCCAS F 8.761 4 2.984 M RD[5] nCCAS F 8.761 4 2.984 M RD[6] nCCAS F 8.761 4 2.984 M RD[7] nCCAS F 8.761 4 2.984 M nRCAS RCLK R 7.578 4 2.578 M nRCS RCLK R 7.578 4 2.578 M nRRAS RCLK R 7.578 4 2.578 M nRWE RCLK R 7.558 4 2.585 M WARNING: you must also run trce with hold speed: 4 WARNING: you must also run trce with setup speed: M