mirror of
https://github.com/garrettsworkshop/RAM2GS.git
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27 lines
1.3 KiB
Plaintext
27 lines
1.3 KiB
Plaintext
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Report for cell RAM2GS.verilog
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Register bits: 92 of 256 (36%)
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PIC Latch: 0
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I/O cells: 67
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Cell usage:
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cell count Res Usage(%)
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BB 8 100.0
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CCU2 9 100.0
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FD1P3AX 11 100.0
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FD1S3AX 59 100.0
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FD1S3AY 5 100.0
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FD1S3IX 14 100.0
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FD1S3JX 3 100.0
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GSR 1 100.0
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IB 26 100.0
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INV 8 100.0
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OB 33 100.0
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ORCALUT4 119 100.0
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PFUMX 2 100.0
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PUR 1 100.0
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VHI 1 100.0
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VLO 1 100.0
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TOTAL 301
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