RAM2GS/CPLD/MAXV/output_files/RAM2GS.fit.smsg

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2023-08-13 03:53:25 +00:00
Extra Info (176273): Performing register packing on registers with non-logic cell location assignments
Extra Info (176274): Completed register packing on registers with non-logic cell location assignments
Extra Info (176244): Moving registers into LUTs to improve timing and density
Extra Info (176245): Finished moving registers into LUTs: elapsed time is 00:00:00