diff --git a/Docs.sch b/Docs.sch
index b0c42cb..5471356 100644
--- a/Docs.sch
+++ b/Docs.sch
@@ -4,10 +4,10 @@ EELAYER END
 $Descr A4 11693 8268
 encoding utf-8
 Sheet 2 2
-Title ""
-Date ""
-Rev ""
-Comp ""
+Title "GW4201D (RAM2GS II)"
+Date "2020-08-02"
+Rev "1.0"
+Comp "Garrett's Workshop"
 Comment1 ""
 Comment2 ""
 Comment3 ""
diff --git a/Documentation/Description.txt b/Documentation/Description.txt
deleted file mode 100644
index 0b6bba3..0000000
--- a/Documentation/Description.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-RAM2GS II (GW4201D) expands the Apple IIgs's 
-fast memory to 8 MB. 
-
-
-Low-Power, SDRAM-Based Design
-----------------------------------------
-Thanks to a modern, low-power design, 
-RAM2GS II uses a maximum of 0.15 watts when idle
-(30 mA @ 5V) and 0.3W in active use (60 mA @ 5V). 
-Unlike other IIgs expansion RAM cards, which are 
-built with vintage asynchronous DRAM chips, 
-RAM2GS II uses modern SDRAM. This design allows for 
-low power consumption and improved reliability 
-over other memory cards using 15+ year old chips. 
-
-
-Small Size, Low-Profile
-----------------------------------------
-RAM2GS II features a small board outline and is the 
-thinnest Apple IIgs expansion memory card ever produced, 
-at under 4mm thin. Small and thin dimensions improve 
-the mechanical compatibility between RAM2GS II and 
-peripheral cards installed into the IIgs's Slot 7.
-
-
-Adjustable Capacity, Highly Compatible
-----------------------------------------
-The Apple IIgs can utilize up to 8 MB of fast memory, 
-but due to limitations of the Apple IIgs hardware, 
-not all 8 MB is considered "DMA-compatible."
-Only 4 MB of the 8 MB provided by an expansion RAM 
-card such as the RAM2GS II is DMA-compatible, 
-and peripheral cards which use DMA are 
-not able to access expansion memory beyond 4 MB. 
-RAM2GS II implements an adjustable capacity 
-feature, allowing the user to select between 
-fully DMA-compatible 4 MB capacity, or
-partially DMA-compatible 8MB capacity.
-Capacity settings can be set temporarily 
-or saved in nonvolatile memory. 
-The capacity adjustment utility is available on 
-_RAM2GS II's support page_.
-
-
-Ecologically Friendly, Gold-Plated PCB
-----------------------------------------
-RAM2GS II features a lead-free, ENIG gold-plated,
-4-layer PCB and is fully EU RoHS-compliant. 
-All units are tested extensively before shipment. 
-Only new parts are used to build RAM2GS II, 
-and all RAM2GS II cards are manufactured in our 
-semi-automated facility in Columbus, Ohio, 
-in the United States. 
-
-
-Open-Source Design
-----------------------------------------
-RAM2GS II's design is fully open-source. 
-The schematics, board layouts, CPLD firmware, 
-and utility software are all freely available 
-for commercial and noncommercial use. 
-To download the design files, visit the 
-_Garrett's Workshop GitHub page_. 
diff --git a/Documentation/Placement.pdf b/Documentation/Placement.pdf
index 7ee4de6..e7ed6a7 100644
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diff --git a/Documentation/Schematic.pdf b/Documentation/Schematic.pdf
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index 0000000..c0245d3
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diff --git a/RAM2GS.kicad_pcb b/RAM2GS.kicad_pcb
index a5dc902..bc49ed7 100644
--- a/RAM2GS.kicad_pcb
+++ b/RAM2GS.kicad_pcb
@@ -10,6 +10,13 @@
   )
 
   (page A4)
+  (title_block
+    (title "GW4203D (RAM2GS II)")
+    (date 2020-08-02)
+    (rev 1.0)
+    (company "Garrett's Workshop")
+  )
+
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     )
   )
 
-  (module stdpads:TSSOP-20_4.4x6.5mm_P0.65mm (layer F.Cu) (tedit 5EE296B4) (tstamp 5E96A451)
+  (module stdpads:TSSOP-20_4.4x6.5mm_P0.65mm (layer F.Cu) (tedit 5EE296B4) (tstamp 5F273F52)
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@@ -2896,7 +2903,7 @@
   (module stdpads:R_0805 (layer F.Cu) (tedit 5F027DD1) (tstamp 5EED1618)
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-    (path /5EED7F16)
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diff --git a/RAM2GS.pro b/RAM2GS.pro
index 1d9d8bc..a8a7b86 100644
--- a/RAM2GS.pro
+++ b/RAM2GS.pro
@@ -1,4 +1,4 @@
-update=Sunday, July 05, 2020 at 10:26:01 PM
+update=Sunday, August 02, 2020 at 06:25:20 PM
 version=1
 last_client=kicad
 [general]
@@ -12,16 +12,6 @@ NetIExt=net
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 PageLayoutDescrFile=
@@ -272,3 +262,13 @@ uViaDrill=0.1
 dPairWidth=0.2
 dPairGap=0.25
 dPairViaGap=0.25
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diff --git a/RAM2GS.sch b/RAM2GS.sch
new file mode 100644
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--- /dev/null
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@@ -0,0 +1,1915 @@
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+NoConn ~ 4850 950 
+$Comp
+L GW_Logic:74245 U4
+U 1 1 5E950437
+P 3500 1500
+F 0 "U4" H 3500 2100 50  0000 C CNN
+F 1 "74AHCT245" H 3500 900 50  0000 C CNN
+F 2 "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm" H 3500 850 50  0001 C TNN
+F 3 "" H 3500 1600 60  0001 C CNN
+	1    3500 1500
+	1    0    0    -1  
+$EndComp
+$Comp
+L GW_Logic:74245 U7
+U 1 1 5E9535D4
+P 3500 5400
+F 0 "U7" H 3500 6000 50  0000 C CNN
+F 1 "74LVT245" H 3500 4800 50  0000 C CNN
+F 2 "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm" H 3500 4750 50  0001 C TNN
+F 3 "" H 3500 5500 60  0001 C CNN
+	1    3500 5400
+	1    0    0    -1  
+$EndComp
+NoConn ~ 7250 1200
+Wire Wire Line
+	5850 900  5950 900 
+Wire Wire Line
+	5850 5700 5950 5700
+Connection ~ 5850 900 
+Connection ~ 5950 900 
+Wire Wire Line
+	5950 900  6050 900 
+Connection ~ 6050 900 
+Wire Wire Line
+	6050 900  6150 900 
+Connection ~ 6150 900 
+Wire Wire Line
+	6150 900  6250 900 
+Connection ~ 6250 900 
+Wire Wire Line
+	6250 900  6350 900 
+Connection ~ 6350 900 
+Wire Wire Line
+	6350 900  6450 900 
+Connection ~ 6450 900 
+Wire Wire Line
+	6450 900  6550 900 
+Connection ~ 6550 5700
+Connection ~ 5950 5700
+Wire Wire Line
+	5950 5700 6050 5700
+Connection ~ 6050 5700
+Wire Wire Line
+	6050 5700 6150 5700
+Connection ~ 6150 5700
+Wire Wire Line
+	6150 5700 6250 5700
+Connection ~ 6250 5700
+Wire Wire Line
+	6250 5700 6350 5700
+Connection ~ 6350 5700
+Wire Wire Line
+	6350 5700 6450 5700
+Connection ~ 6450 5700
+Wire Wire Line
+	6450 5700 6550 5700
+NoConn ~ 2700 5250
+NoConn ~ 2700 5350
+Wire Wire Line
+	2250 5450 2250 5150
+Wire Wire Line
+	2250 5150 2300 5150
+Connection ~ 2250 5450
+Wire Wire Line
+	2250 5450 2200 5450
+NoConn ~ 2300 5250
+NoConn ~ 2300 5350
+Connection ~ 4100 950 
+$Comp
+L Device:R_Small R3
+U 1 1 5F2CC469
+P 4000 1150
+F 0 "R3" V 3850 1150 50  0000 C BNN
+F 1 "100" V 3950 1150 50  0000 C BNN
+F 2 "stdpads:R_0805" H 4000 1150 50  0001 C CNN
+F 3 "~" H 4000 1150 50  0001 C CNN
+	1    4000 1150
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	3900 1050 4100 1050
+Text Label 4900 1050 0    50   ~ 0
+~CSEL~
+$EndSCHEMATC