Apple-2-HW/RAM2GS
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Fix RAM4GS-ExtSPI.v

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This commit is contained in:
Zane Kaminski 2021-04-29 19:25:21 -04:00
parent f92d35975a
commit a9a06f5e5e
1 changed files with 5 additions and 24 deletions
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29
Hardware/src/RAM4GS-ExtSPI.v
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@ -2,8 +2,7 @@ module RAM4GS(PHI2, MAin, CROW, Din, Dout,
nCCAS, nCRAS, nFWE, nCCAS, nCRAS, nFWE,
RBA, RA, RD, nRCS, RCLK, RCKE, RBA, RA, RD, nRCS, RCLK, RCKE,
nRWE, nRRAS, nRCAS, RDQMH, RDQML, nRWE, nRRAS, nRCAS, RDQMH, RDQML,
nUFMCSout, UFMCLKout, UFMSDIout, UFMSDOout, nUFMCS, UFMCLK, UFMSDI, UFMSDO);
nUFMCSin , UFMCLKin , UFMSDIin , UFMSDOin);
/* 65816 Phase 2 Clock */ /* 65816 Phase 2 Clock */
input PHI2; input PHI2;
@ -54,20 +53,10 @@ module RAM4GS(PHI2, MAin, CROW, Din, Dout,
inout [7:0] RD = (~nCCAS & ~nFWE) ? WRD[7:0] : 8'bZ; inout [7:0] RD = (~nCCAS & ~nFWE) ? WRD[7:0] : 8'bZ;
/* UFM Interface */ /* UFM Interface */
reg nUFMCS = 1; output reg nUFMCS = 1;
reg UFMCLK = 0; output reg UFMCLK = 0;
reg UFMSDI = 0; output reg UFMSDI = 0;
wire UFMSDO; input UFMSDO;
wire UFMOsc;
alta_ufms u_alta_ufms (
.i_ufm_set (1'b1),
.i_osc_ena (1'b1),
.i_ufm_flash_csn (nUFMCS),
.i_ufm_flash_sclk (UFMCLK),
.i_ufm_flash_sdi (UFMSDI),
.o_ufm_flash_sdo (UFMSDO),
.o_osc (UFMOsc)
);
/* UFM Command Interface */ /* UFM Command Interface */
reg C1Submitted = 0; reg C1Submitted = 0;
@ -326,14 +315,6 @@ module RAM4GS(PHI2, MAin, CROW, Din, Dout,
end end
/* UFM Control */ /* UFM Control */
output nUFMCSout = nUFMCS;
output UFMCLKout = UFMCLK;
output UFMSDIout = UFMSDI;
output UFMSDOout = UFMSDO;
input nUFMCSin;
input UFMCLKin;
input UFMSDIin;
input UFMSDOin;
always @(posedge RCLK) begin always @(posedge RCLK) begin
if (~InitReady && FS[17:10]==8'h00) begin if (~InitReady && FS[17:10]==8'h00) begin
nUFMCS <= 1'b1; nUFMCS <= 1'b1;