From f094702a69e6ff70e6451660a3d4c96ab4d2dcab Mon Sep 17 00:00:00 2001 From: Zane Kaminski Date: Sun, 20 Aug 2023 14:08:30 -0400 Subject: [PATCH] Still good? --- CPLD/MAXII/RAM2GS.qsf | 494 +++++++++--------- CPLD/MAXII/RAM2GS.qws | Bin 0 -> 619 bytes .../db/RAM2GS-MAXII.quiproj.11208.rdr.flock | 0 CPLD/MAXII/db/RAM2GS.tmw_info | 6 - CPLD/MAXV/RAM2GS.qsf | 494 +++++++++--------- CPLD/MAXV/RAM2GS.qws | Bin 0 -> 619 bytes .../db/RAM2GS-MAXV.quiproj.13204.rdr.flock | 0 CPLD/MAXV/db/RAM2GS.tmw_info | 6 - 8 files changed, 494 insertions(+), 506 deletions(-) create mode 100644 CPLD/MAXII/RAM2GS.qws delete mode 100644 CPLD/MAXII/db/RAM2GS-MAXII.quiproj.11208.rdr.flock delete mode 100644 CPLD/MAXII/db/RAM2GS.tmw_info create mode 100644 CPLD/MAXV/RAM2GS.qws delete mode 100644 CPLD/MAXV/db/RAM2GS-MAXV.quiproj.13204.rdr.flock delete mode 100644 CPLD/MAXV/db/RAM2GS.tmw_info diff --git a/CPLD/MAXII/RAM2GS.qsf b/CPLD/MAXII/RAM2GS.qsf index 75d4864..fc80933 100644 --- a/CPLD/MAXII/RAM2GS.qsf +++ b/CPLD/MAXII/RAM2GS.qsf @@ -1,247 +1,247 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 2019 Intel Corporation. All rights reserved. -# Your use of Intel Corporation's design tools, logic functions -# and other software and tools, and any partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Intel Program License -# Subscription Agreement, the Intel Quartus Prime License Agreement, -# the Intel FPGA IP License Agreement, or other applicable license -# agreement, including, without limitation, that your use is for -# the sole purpose of programming logic devices manufactured by -# Intel and sold by Intel or its authorized distributors. Please -# refer to the applicable agreement for further details, at -# https://fpgasoftware.intel.com/eula. -# -# -------------------------------------------------------------------------- # -# -# Quartus Prime -# Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition -# Date created = 18:27:39 August 12, 2023 -# -# -------------------------------------------------------------------------- # -# -# Notes: -# -# 1) The default values for assignments are stored in the file: -# RAM2GS_assignment_defaults.qdf -# If this file doesn't exist, see file: -# assignment_defaults.qdf -# -# 2) Altera recommends that you do not modify this file. This -# file is updated automatically by the Quartus Prime software -# and any changes you make may be lost or overwritten. -# -# -------------------------------------------------------------------------- # - - -set_global_assignment -name FAMILY "MAX II" -set_global_assignment -name DEVICE EPM240T100C5 -set_global_assignment -name TOP_LEVEL_ENTITY RAM2GS -set_global_assignment -name ORIGINAL_QUARTUS_VERSION 19.1.0 -set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:27:39 AUGUST 12, 2023" -set_global_assignment -name LAST_QUARTUS_VERSION "19.1.0 Lite Edition" -set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files -set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 -set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 -set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP -set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100 -set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5 -set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" -set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 3.3V -set_global_assignment -name NUM_PARALLEL_PROCESSORS 4 -set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR" -set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING GROUND" - - -set_location_assignment PIN_12 -to RCLK - -set_location_assignment PIN_52 -to PHI2 - -set_location_assignment PIN_67 -to nCRAS - -set_location_assignment PIN_53 -to nCCAS - -set_location_assignment PIN_48 -to nFWE - -set_location_assignment PIN_49 -to MAin[0] -set_location_assignment PIN_51 -to MAin[1] -set_location_assignment PIN_50 -to MAin[2] -set_location_assignment PIN_71 -to MAin[3] -set_location_assignment PIN_70 -to MAin[4] -set_location_assignment PIN_69 -to MAin[5] -set_location_assignment PIN_72 -to MAin[6] -set_location_assignment PIN_68 -to MAin[7] -set_location_assignment PIN_73 -to MAin[8] -set_location_assignment PIN_74 -to MAin[9] - -set_location_assignment PIN_54 -to CROW[0] -set_location_assignment PIN_55 -to CROW[1] - -set_location_assignment PIN_35 -to Din[2] -set_location_assignment PIN_36 -to Din[1] -set_location_assignment PIN_37 -to Din[3] -set_location_assignment PIN_38 -to Din[5] -set_location_assignment PIN_39 -to Din[4] -set_location_assignment PIN_40 -to Din[7] -set_location_assignment PIN_41 -to Din[6] -set_location_assignment PIN_42 -to Din[0] - -set_location_assignment PIN_33 -to Dout[0] -set_location_assignment PIN_57 -to Dout[1] -set_location_assignment PIN_56 -to Dout[2] -set_location_assignment PIN_47 -to Dout[3] -set_location_assignment PIN_44 -to Dout[4] -set_location_assignment PIN_28 -to Dout[5] -set_location_assignment PIN_34 -to Dout[6] -set_location_assignment PIN_43 -to Dout[7] - -set_location_assignment PIN_8 -to RCKE - -set_location_assignment PIN_3 -to nRCS - -set_location_assignment PIN_100 -to nRWE - -set_location_assignment PIN_6 -to nRRAS - -set_location_assignment PIN_4 -to nRCAS - -set_location_assignment PIN_5 -to RBA[0] -set_location_assignment PIN_14 -to RBA[1] - -set_location_assignment PIN_18 -to RA[0] -set_location_assignment PIN_20 -to RA[1] -set_location_assignment PIN_30 -to RA[2] -set_location_assignment PIN_27 -to RA[3] -set_location_assignment PIN_26 -to RA[4] -set_location_assignment PIN_29 -to RA[5] -set_location_assignment PIN_21 -to RA[6] -set_location_assignment PIN_19 -to RA[7] -set_location_assignment PIN_17 -to RA[8] -set_location_assignment PIN_15 -to RA[9] -set_location_assignment PIN_16 -to RA[10] -set_location_assignment PIN_7 -to RA[11] - -set_location_assignment PIN_2 -to RDQMH - -set_location_assignment PIN_98 -to RDQML - -set_location_assignment PIN_96 -to RD[0] -set_location_assignment PIN_90 -to RD[1] -set_location_assignment PIN_89 -to RD[2] -set_location_assignment PIN_99 -to RD[3] -set_location_assignment PIN_92 -to RD[4] -set_location_assignment PIN_91 -to RD[5] -set_location_assignment PIN_95 -to RD[6] -set_location_assignment PIN_97 -to RD[7] - -set_location_assignment PIN_88 -to LED - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCLK - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHI2 - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CROW -set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to CROW - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCRAS -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCRAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCCAS -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCCAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Din -set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to Din - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MAin -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to MAin - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nFWE -set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to nFWE - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Dout -set_instance_assignment -name SLOW_SLEW_RATE OFF -to Dout -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to Dout -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to Dout -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to Dout - -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED -set_instance_assignment -name SLOW_SLEW_RATE ON -to LED -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to LED -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to LED -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to LED - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RA -set_instance_assignment -name SLOW_SLEW_RATE ON -to RA -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RA -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RA -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RA - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RBA -set_instance_assignment -name SLOW_SLEW_RATE ON -to RBA -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RBA -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RBA -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RBA -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RBA - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCS -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCS -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCS -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCKE -set_instance_assignment -name SLOW_SLEW_RATE ON -to RCKE -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RCKE -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RCKE -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RCKE -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RCKE - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRRAS -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRRAS -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRRAS -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRRAS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRRAS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRRAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCAS -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCAS -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCAS -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCAS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCAS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRWE -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRWE -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRWE -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRWE -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRWE -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRWE - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQMH -set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQMH -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQMH -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQMH -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQMH - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQML -set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQML -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQML -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQML -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQML - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RD -set_instance_assignment -name SLOW_SLEW_RATE ON -to RD -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RD -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY ON -to RD -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RD -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to RD - -set_global_assignment -name SDC_FILE ../RAM2GS.sdc -set_global_assignment -name VERILOG_FILE "../RAM2GS-MAX.v" -set_global_assignment -name QIP_FILE UFM.qip -set_global_assignment -name MIF_FILE ../RAM2GS.mif -set_global_assignment -name SDC_FILE "../RAM2GS-MAX.sdc" +# -------------------------------------------------------------------------- # +# +# Copyright (C) 2019 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and any partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details, at +# https://fpgasoftware.intel.com/eula. +# +# -------------------------------------------------------------------------- # +# +# Quartus Prime +# Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition +# Date created = 18:27:39 August 12, 2023 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# RAM2GS_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus Prime software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "MAX II" +set_global_assignment -name DEVICE EPM240T100C5 +set_global_assignment -name TOP_LEVEL_ENTITY RAM2GS +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 19.1.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:27:39 AUGUST 12, 2023" +set_global_assignment -name LAST_QUARTUS_VERSION "19.1.0 Lite Edition" +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100 +set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" +set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 3.3V +set_global_assignment -name NUM_PARALLEL_PROCESSORS 4 +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR" +set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING GROUND" + + +set_location_assignment PIN_12 -to RCLK + +set_location_assignment PIN_52 -to PHI2 + +set_location_assignment PIN_67 -to nCRAS + +set_location_assignment PIN_53 -to nCCAS + +set_location_assignment PIN_48 -to nFWE + +set_location_assignment PIN_49 -to MAin[0] +set_location_assignment PIN_51 -to MAin[1] +set_location_assignment PIN_50 -to MAin[2] +set_location_assignment PIN_71 -to MAin[3] +set_location_assignment PIN_70 -to MAin[4] +set_location_assignment PIN_69 -to MAin[5] +set_location_assignment PIN_72 -to MAin[6] +set_location_assignment PIN_68 -to MAin[7] +set_location_assignment PIN_73 -to MAin[8] +set_location_assignment PIN_74 -to MAin[9] + +set_location_assignment PIN_54 -to CROW[0] +set_location_assignment PIN_55 -to CROW[1] + +set_location_assignment PIN_35 -to Din[2] +set_location_assignment PIN_36 -to Din[1] +set_location_assignment PIN_37 -to Din[3] +set_location_assignment PIN_38 -to Din[5] +set_location_assignment PIN_39 -to Din[4] +set_location_assignment PIN_40 -to Din[7] +set_location_assignment PIN_41 -to Din[6] +set_location_assignment PIN_42 -to Din[0] + +set_location_assignment PIN_33 -to Dout[0] +set_location_assignment PIN_57 -to Dout[1] +set_location_assignment PIN_56 -to Dout[2] +set_location_assignment PIN_47 -to Dout[3] +set_location_assignment PIN_44 -to Dout[4] +set_location_assignment PIN_28 -to Dout[5] +set_location_assignment PIN_34 -to Dout[6] +set_location_assignment PIN_43 -to Dout[7] + +set_location_assignment PIN_8 -to RCKE + +set_location_assignment PIN_3 -to nRCS + +set_location_assignment PIN_100 -to nRWE + +set_location_assignment PIN_6 -to nRRAS + +set_location_assignment PIN_4 -to nRCAS + +set_location_assignment PIN_5 -to RBA[0] +set_location_assignment PIN_14 -to RBA[1] + +set_location_assignment PIN_18 -to RA[0] +set_location_assignment PIN_20 -to RA[1] +set_location_assignment PIN_30 -to RA[2] +set_location_assignment PIN_27 -to RA[3] +set_location_assignment PIN_26 -to RA[4] +set_location_assignment PIN_29 -to RA[5] +set_location_assignment PIN_21 -to RA[6] +set_location_assignment PIN_19 -to RA[7] +set_location_assignment PIN_17 -to RA[8] +set_location_assignment PIN_15 -to RA[9] +set_location_assignment PIN_16 -to RA[10] +set_location_assignment PIN_7 -to RA[11] + +set_location_assignment PIN_2 -to RDQMH + +set_location_assignment PIN_98 -to RDQML + +set_location_assignment PIN_96 -to RD[0] +set_location_assignment PIN_90 -to RD[1] +set_location_assignment PIN_89 -to RD[2] +set_location_assignment PIN_99 -to RD[3] +set_location_assignment PIN_92 -to RD[4] +set_location_assignment PIN_91 -to RD[5] +set_location_assignment PIN_95 -to RD[6] +set_location_assignment PIN_97 -to RD[7] + +set_location_assignment PIN_88 -to LED + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCLK + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHI2 + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CROW +set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to CROW + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCRAS +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCRAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCCAS +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCCAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Din +set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to Din + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MAin +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to MAin + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nFWE +set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to nFWE + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Dout +set_instance_assignment -name SLOW_SLEW_RATE OFF -to Dout +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to Dout +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to Dout +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to Dout + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED +set_instance_assignment -name SLOW_SLEW_RATE ON -to LED +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to LED +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to LED +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to LED + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RA +set_instance_assignment -name SLOW_SLEW_RATE ON -to RA +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RA +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RA +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RA + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RBA +set_instance_assignment -name SLOW_SLEW_RATE ON -to RBA +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RBA +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RBA +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RBA +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RBA + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCS +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCS +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCS +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCKE +set_instance_assignment -name SLOW_SLEW_RATE ON -to RCKE +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RCKE +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RCKE +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RCKE +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RCKE + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRRAS +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRRAS +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRRAS +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRRAS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRRAS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRRAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCAS +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCAS +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCAS +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCAS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCAS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRWE +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRWE +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRWE +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRWE +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRWE +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRWE + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQMH +set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQMH +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQMH +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQMH +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQMH + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQML +set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQML +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQML +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQML +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQML + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RD +set_instance_assignment -name SLOW_SLEW_RATE ON -to RD +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RD +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY ON -to RD +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RD +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to RD + +set_global_assignment -name SDC_FILE ../RAM2GS.sdc +set_global_assignment -name VERILOG_FILE "../RAM2GS-MAX.v" +set_global_assignment -name QIP_FILE UFM.qip +set_global_assignment -name MIF_FILE ../RAM2GS.mif +set_global_assignment -name SDC_FILE "../RAM2GS-MAX.sdc" diff --git a/CPLD/MAXII/RAM2GS.qws b/CPLD/MAXII/RAM2GS.qws new file mode 100644 index 0000000000000000000000000000000000000000..8675db02e2fb0085458557aa50ec8bf8651e9974 GIT binary patch literal 619 zcmbV}Jx;?w5QU#N6p=`g15i*PWFZ+PAxM;n0vakrAA;?K$bd~SqClL9gV4}&7DC{g z%|Zi0B4f?IdF%OkySpFj%hq(Mp>9=cpnH{?s(@AOrOHE61Rm=_nReC34Kt0DXb0XS zFHx5-!xJhy+VfF|sD}^99kKTLy8L_mz^r%l#NwlOW447c*0pAiD0*Xw(Nv-B28A^W zQ!w*bc+C^on4&t=yB0-fT8ucdUhtLRO|Ur&1dxr{Tjv!{gB#V%T#P}#xk7o e>i=!Fqt}<`@3*o!63^&X7oi_J=aS~eojw8n8E3Ho literal 0 HcmV?d00001 diff --git a/CPLD/MAXII/db/RAM2GS-MAXII.quiproj.11208.rdr.flock b/CPLD/MAXII/db/RAM2GS-MAXII.quiproj.11208.rdr.flock deleted file mode 100644 index e69de29..0000000 diff --git a/CPLD/MAXII/db/RAM2GS.tmw_info b/CPLD/MAXII/db/RAM2GS.tmw_info deleted file mode 100644 index 90dde79..0000000 --- a/CPLD/MAXII/db/RAM2GS.tmw_info +++ /dev/null @@ -1,6 +0,0 @@ -start_full_compilation:s:00:01:33 -start_analysis_synthesis:s:00:00:41-start_full_compilation -start_analysis_elaboration:s-start_full_compilation -start_fitter:s:00:00:20-start_full_compilation -start_assembler:s:00:00:07-start_full_compilation -start_timing_analyzer:s:00:00:25-start_full_compilation diff --git a/CPLD/MAXV/RAM2GS.qsf b/CPLD/MAXV/RAM2GS.qsf index 45a6945..00e467a 100644 --- a/CPLD/MAXV/RAM2GS.qsf +++ b/CPLD/MAXV/RAM2GS.qsf @@ -1,247 +1,247 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 2019 Intel Corporation. All rights reserved. -# Your use of Intel Corporation's design tools, logic functions -# and other software and tools, and any partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Intel Program License -# Subscription Agreement, the Intel Quartus Prime License Agreement, -# the Intel FPGA IP License Agreement, or other applicable license -# agreement, including, without limitation, that your use is for -# the sole purpose of programming logic devices manufactured by -# Intel and sold by Intel or its authorized distributors. Please -# refer to the applicable agreement for further details, at -# https://fpgasoftware.intel.com/eula. -# -# -------------------------------------------------------------------------- # -# -# Quartus Prime -# Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition -# Date created = 18:28:29 August 12, 2023 -# -# -------------------------------------------------------------------------- # -# -# Notes: -# -# 1) The default values for assignments are stored in the file: -# RAM2GS_assignment_defaults.qdf -# If this file doesn't exist, see file: -# assignment_defaults.qdf -# -# 2) Altera recommends that you do not modify this file. This -# file is updated automatically by the Quartus Prime software -# and any changes you make may be lost or overwritten. -# -# -------------------------------------------------------------------------- # - - -set_global_assignment -name FAMILY "MAX V" -set_global_assignment -name DEVICE 5M240ZT100C5 -set_global_assignment -name TOP_LEVEL_ENTITY RAM2GS -set_global_assignment -name ORIGINAL_QUARTUS_VERSION 19.1.0 -set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:28:29 AUGUST 12, 2023" -set_global_assignment -name LAST_QUARTUS_VERSION "19.1.0 Lite Edition" -set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files -set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 -set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 -set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP -set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100 -set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5 -set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" -set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 1.8V -set_global_assignment -name NUM_PARALLEL_PROCESSORS 4 -set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR" -set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING GROUND" - - -set_location_assignment PIN_12 -to RCLK - -set_location_assignment PIN_52 -to PHI2 - -set_location_assignment PIN_67 -to nCRAS - -set_location_assignment PIN_53 -to nCCAS - -set_location_assignment PIN_48 -to nFWE - -set_location_assignment PIN_49 -to MAin[0] -set_location_assignment PIN_51 -to MAin[1] -set_location_assignment PIN_50 -to MAin[2] -set_location_assignment PIN_71 -to MAin[3] -set_location_assignment PIN_70 -to MAin[4] -set_location_assignment PIN_69 -to MAin[5] -set_location_assignment PIN_72 -to MAin[6] -set_location_assignment PIN_68 -to MAin[7] -set_location_assignment PIN_73 -to MAin[8] -set_location_assignment PIN_74 -to MAin[9] - -set_location_assignment PIN_54 -to CROW[0] -set_location_assignment PIN_55 -to CROW[1] - -set_location_assignment PIN_35 -to Din[2] -set_location_assignment PIN_36 -to Din[1] -set_location_assignment PIN_37 -to Din[3] -set_location_assignment PIN_38 -to Din[5] -set_location_assignment PIN_39 -to Din[4] -set_location_assignment PIN_40 -to Din[7] -set_location_assignment PIN_41 -to Din[6] -set_location_assignment PIN_42 -to Din[0] - -set_location_assignment PIN_33 -to Dout[0] -set_location_assignment PIN_57 -to Dout[1] -set_location_assignment PIN_56 -to Dout[2] -set_location_assignment PIN_47 -to Dout[3] -set_location_assignment PIN_44 -to Dout[4] -set_location_assignment PIN_28 -to Dout[5] -set_location_assignment PIN_34 -to Dout[6] -set_location_assignment PIN_43 -to Dout[7] - -set_location_assignment PIN_8 -to RCKE - -set_location_assignment PIN_3 -to nRCS - -set_location_assignment PIN_100 -to nRWE - -set_location_assignment PIN_6 -to nRRAS - -set_location_assignment PIN_4 -to nRCAS - -set_location_assignment PIN_5 -to RBA[0] -set_location_assignment PIN_14 -to RBA[1] - -set_location_assignment PIN_18 -to RA[0] -set_location_assignment PIN_20 -to RA[1] -set_location_assignment PIN_30 -to RA[2] -set_location_assignment PIN_27 -to RA[3] -set_location_assignment PIN_26 -to RA[4] -set_location_assignment PIN_29 -to RA[5] -set_location_assignment PIN_21 -to RA[6] -set_location_assignment PIN_19 -to RA[7] -set_location_assignment PIN_17 -to RA[8] -set_location_assignment PIN_15 -to RA[9] -set_location_assignment PIN_16 -to RA[10] -set_location_assignment PIN_7 -to RA[11] - -set_location_assignment PIN_2 -to RDQMH - -set_location_assignment PIN_98 -to RDQML - -set_location_assignment PIN_96 -to RD[0] -set_location_assignment PIN_90 -to RD[1] -set_location_assignment PIN_89 -to RD[2] -set_location_assignment PIN_99 -to RD[3] -set_location_assignment PIN_92 -to RD[4] -set_location_assignment PIN_91 -to RD[5] -set_location_assignment PIN_95 -to RD[6] -set_location_assignment PIN_97 -to RD[7] - -set_location_assignment PIN_88 -to LED - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCLK - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHI2 - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CROW -set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to CROW - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCRAS -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCRAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCCAS -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCCAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Din -set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to Din - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MAin -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to MAin - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nFWE -set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to nFWE - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Dout -set_instance_assignment -name SLOW_SLEW_RATE OFF -to Dout -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to Dout -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to Dout -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to Dout - -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED -set_instance_assignment -name SLOW_SLEW_RATE ON -to LED -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to LED -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to LED -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to LED - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RA -set_instance_assignment -name SLOW_SLEW_RATE ON -to RA -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RA -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RA -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RA - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RBA -set_instance_assignment -name SLOW_SLEW_RATE ON -to RBA -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RBA -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RBA -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RBA -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RBA - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCS -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCS -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCS -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCKE -set_instance_assignment -name SLOW_SLEW_RATE ON -to RCKE -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RCKE -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RCKE -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RCKE -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RCKE - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRRAS -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRRAS -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRRAS -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRRAS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRRAS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRRAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCAS -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCAS -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCAS -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCAS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCAS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCAS - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRWE -set_instance_assignment -name SLOW_SLEW_RATE ON -to nRWE -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRWE -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRWE -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRWE -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRWE - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQMH -set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQMH -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQMH -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQMH -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQMH - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQML -set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQML -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQML -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQML -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQML - -set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RD -set_instance_assignment -name SLOW_SLEW_RATE ON -to RD -set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RD -set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY ON -to RD -set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RD -set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to RD - -set_global_assignment -name SDC_FILE ../RAM2GS.sdc -set_global_assignment -name VERILOG_FILE "../RAM2GS-MAX.v" -set_global_assignment -name QIP_FILE UFM.qip -set_global_assignment -name MIF_FILE ../RAM2GS.mif -set_global_assignment -name SDC_FILE "../RAM2GS-MAX.sdc" +# -------------------------------------------------------------------------- # +# +# Copyright (C) 2019 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and any partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details, at +# https://fpgasoftware.intel.com/eula. +# +# -------------------------------------------------------------------------- # +# +# Quartus Prime +# Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition +# Date created = 18:28:29 August 12, 2023 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# RAM2GS_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus Prime software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "MAX V" +set_global_assignment -name DEVICE 5M240ZT100C5 +set_global_assignment -name TOP_LEVEL_ENTITY RAM2GS +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 19.1.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:28:29 AUGUST 12, 2023" +set_global_assignment -name LAST_QUARTUS_VERSION "19.1.0 Lite Edition" +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100 +set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" +set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 1.8V +set_global_assignment -name NUM_PARALLEL_PROCESSORS 4 +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR" +set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING GROUND" + + +set_location_assignment PIN_12 -to RCLK + +set_location_assignment PIN_52 -to PHI2 + +set_location_assignment PIN_67 -to nCRAS + +set_location_assignment PIN_53 -to nCCAS + +set_location_assignment PIN_48 -to nFWE + +set_location_assignment PIN_49 -to MAin[0] +set_location_assignment PIN_51 -to MAin[1] +set_location_assignment PIN_50 -to MAin[2] +set_location_assignment PIN_71 -to MAin[3] +set_location_assignment PIN_70 -to MAin[4] +set_location_assignment PIN_69 -to MAin[5] +set_location_assignment PIN_72 -to MAin[6] +set_location_assignment PIN_68 -to MAin[7] +set_location_assignment PIN_73 -to MAin[8] +set_location_assignment PIN_74 -to MAin[9] + +set_location_assignment PIN_54 -to CROW[0] +set_location_assignment PIN_55 -to CROW[1] + +set_location_assignment PIN_35 -to Din[2] +set_location_assignment PIN_36 -to Din[1] +set_location_assignment PIN_37 -to Din[3] +set_location_assignment PIN_38 -to Din[5] +set_location_assignment PIN_39 -to Din[4] +set_location_assignment PIN_40 -to Din[7] +set_location_assignment PIN_41 -to Din[6] +set_location_assignment PIN_42 -to Din[0] + +set_location_assignment PIN_33 -to Dout[0] +set_location_assignment PIN_57 -to Dout[1] +set_location_assignment PIN_56 -to Dout[2] +set_location_assignment PIN_47 -to Dout[3] +set_location_assignment PIN_44 -to Dout[4] +set_location_assignment PIN_28 -to Dout[5] +set_location_assignment PIN_34 -to Dout[6] +set_location_assignment PIN_43 -to Dout[7] + +set_location_assignment PIN_8 -to RCKE + +set_location_assignment PIN_3 -to nRCS + +set_location_assignment PIN_100 -to nRWE + +set_location_assignment PIN_6 -to nRRAS + +set_location_assignment PIN_4 -to nRCAS + +set_location_assignment PIN_5 -to RBA[0] +set_location_assignment PIN_14 -to RBA[1] + +set_location_assignment PIN_18 -to RA[0] +set_location_assignment PIN_20 -to RA[1] +set_location_assignment PIN_30 -to RA[2] +set_location_assignment PIN_27 -to RA[3] +set_location_assignment PIN_26 -to RA[4] +set_location_assignment PIN_29 -to RA[5] +set_location_assignment PIN_21 -to RA[6] +set_location_assignment PIN_19 -to RA[7] +set_location_assignment PIN_17 -to RA[8] +set_location_assignment PIN_15 -to RA[9] +set_location_assignment PIN_16 -to RA[10] +set_location_assignment PIN_7 -to RA[11] + +set_location_assignment PIN_2 -to RDQMH + +set_location_assignment PIN_98 -to RDQML + +set_location_assignment PIN_96 -to RD[0] +set_location_assignment PIN_90 -to RD[1] +set_location_assignment PIN_89 -to RD[2] +set_location_assignment PIN_99 -to RD[3] +set_location_assignment PIN_92 -to RD[4] +set_location_assignment PIN_91 -to RD[5] +set_location_assignment PIN_95 -to RD[6] +set_location_assignment PIN_97 -to RD[7] + +set_location_assignment PIN_88 -to LED + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCLK + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHI2 + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CROW +set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to CROW + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCRAS +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCRAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCCAS +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCCAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Din +set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to Din + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MAin +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to MAin + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nFWE +set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to nFWE + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Dout +set_instance_assignment -name SLOW_SLEW_RATE OFF -to Dout +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to Dout +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to Dout +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to Dout + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED +set_instance_assignment -name SLOW_SLEW_RATE ON -to LED +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to LED +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to LED +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to LED + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RA +set_instance_assignment -name SLOW_SLEW_RATE ON -to RA +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RA +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RA +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RA + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RBA +set_instance_assignment -name SLOW_SLEW_RATE ON -to RBA +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RBA +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RBA +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RBA +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RBA + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCS +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCS +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCS +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCKE +set_instance_assignment -name SLOW_SLEW_RATE ON -to RCKE +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RCKE +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RCKE +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RCKE +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RCKE + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRRAS +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRRAS +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRRAS +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRRAS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRRAS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRRAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCAS +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRCAS +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRCAS +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRCAS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCAS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCAS + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRWE +set_instance_assignment -name SLOW_SLEW_RATE ON -to nRWE +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to nRWE +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to nRWE +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRWE +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRWE + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQMH +set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQMH +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQMH +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQMH +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQMH + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQML +set_instance_assignment -name SLOW_SLEW_RATE ON -to RDQML +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RDQML +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY OFF -to RDQML +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RDQML + +set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RD +set_instance_assignment -name SLOW_SLEW_RATE ON -to RD +set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to RD +set_instance_assignment -name ENABLE_BUS_HOLD_CIRCUITRY ON -to RD +set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RD +set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to RD + +set_global_assignment -name SDC_FILE ../RAM2GS.sdc +set_global_assignment -name VERILOG_FILE "../RAM2GS-MAX.v" +set_global_assignment -name QIP_FILE UFM.qip +set_global_assignment -name MIF_FILE ../RAM2GS.mif +set_global_assignment -name SDC_FILE "../RAM2GS-MAX.sdc" diff --git a/CPLD/MAXV/RAM2GS.qws b/CPLD/MAXV/RAM2GS.qws new file mode 100644 index 0000000000000000000000000000000000000000..8675db02e2fb0085458557aa50ec8bf8651e9974 GIT binary patch literal 619 zcmbV}Jx;?w5QU#N6p=`g15i*PWFZ+PAxM;n0vakrAA;?K$bd~SqClL9gV4}&7DC{g z%|Zi0B4f?IdF%OkySpFj%hq(Mp>9=cpnH{?s(@AOrOHE61Rm=_nReC34Kt0DXb0XS zFHx5-!xJhy+VfF|sD}^99kKTLy8L_mz^r%l#NwlOW447c*0pAiD0*Xw(Nv-B28A^W zQ!w*bc+C^on4&t=yB0-fT8ucdUhtLRO|Ur&1dxr{Tjv!{gB#V%T#P}#xk7o e>i=!Fqt}<`@3*o!63^&X7oi_J=aS~eojw8n8E3Ho literal 0 HcmV?d00001 diff --git a/CPLD/MAXV/db/RAM2GS-MAXV.quiproj.13204.rdr.flock b/CPLD/MAXV/db/RAM2GS-MAXV.quiproj.13204.rdr.flock deleted file mode 100644 index e69de29..0000000 diff --git a/CPLD/MAXV/db/RAM2GS.tmw_info b/CPLD/MAXV/db/RAM2GS.tmw_info deleted file mode 100644 index 728857c..0000000 --- a/CPLD/MAXV/db/RAM2GS.tmw_info +++ /dev/null @@ -1,6 +0,0 @@ -start_full_compilation:s:00:01:58 -start_analysis_synthesis:s:00:00:41-start_full_compilation -start_analysis_elaboration:s-start_full_compilation -start_fitter:s:00:00:48-start_full_compilation -start_assembler:s:00:00:07-start_full_compilation -start_timing_analyzer:s:00:00:22-start_full_compilation