I/O Timing Report Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-1200HC Package: TQFP100 Performance: 5 Package Status: Final Version 1.44. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-1200HC Package: TQFP100 Performance: 6 Package Status: Final Version 1.44. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-1200HC Package: TQFP100 Performance: M Package Status: Final Version 1.44. Performance Hardware Data Status: Final Version 34.4. // Design: RAM2GS // Package: TQFP100 // ncd File: ram2gs_lcmxo2_1200hc_impl1.ncd // Version: Diamond (64-bit) 3.12.1.454 // Written on Sat Nov 18 02:06:17 2023 // M: Minimum Performance Grade // iotiming RAM2GS_LCMXO2_1200HC_impl1.ncd RAM2GS_LCMXO2_1200HC_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2GS/CPLD/LCMXO2-1200HC/promote.xml I/O Timing Report (All units are in ns) Worst Case Results across Performance Grades (M, 6, 5, 4): // Input Setup and Hold Times Port Clock Edge Setup Performance_Grade Hold Performance_Grade ---------------------------------------------------------------------- CROW[0] nCRAS F 3.288 4 -0.390 M CROW[1] nCRAS F 2.823 4 -0.285 M Din[0] PHI2 F 6.398 4 4.293 4 Din[0] nCCAS F 1.411 4 -0.004 M Din[1] PHI2 F 3.916 4 4.173 4 Din[1] nCCAS F 1.877 4 -0.123 M Din[2] PHI2 F 6.180 4 4.173 4 Din[2] nCCAS F 1.548 4 -0.062 M Din[3] PHI2 F 5.536 4 4.173 4 Din[3] nCCAS F 0.467 4 0.734 4 Din[4] PHI2 F 3.611 4 4.173 4 Din[4] nCCAS F 1.533 4 -0.043 M Din[5] PHI2 F 5.673 4 4.173 4 Din[5] nCCAS F 1.663 4 -0.072 M Din[6] PHI2 F 5.355 4 4.293 4 Din[6] nCCAS F 2.807 4 -0.352 M Din[7] PHI2 F 5.296 4 4.293 4 Din[7] nCCAS F 1.914 4 -0.136 M MAin[0] PHI2 F 4.091 4 1.414 4 MAin[0] nCRAS F 1.207 4 0.347 4 MAin[1] PHI2 F 3.273 4 1.759 4 MAin[1] nCRAS F 1.077 4 0.460 4 MAin[2] PHI2 F 8.126 4 -0.351 M MAin[2] nCRAS F 0.671 4 0.850 4 MAin[3] PHI2 F 8.831 4 -0.579 M MAin[3] nCRAS F 1.100 4 0.463 4 MAin[4] PHI2 F 8.415 4 -0.447 M MAin[4] nCRAS F 1.390 4 0.207 4 MAin[5] PHI2 F 9.742 4 -0.803 M MAin[5] nCRAS F 1.269 4 0.218 4 MAin[6] PHI2 F 7.970 4 -0.325 M MAin[6] nCRAS F 1.165 4 0.337 4 MAin[7] PHI2 F 8.481 4 -0.438 M MAin[7] nCRAS F 0.761 4 0.673 4 MAin[8] nCRAS F 1.261 4 0.223 4 MAin[9] nCRAS F 0.756 4 0.667 4 PHI2 RCLK R -0.133 M 2.360 4 nCCAS RCLK R 4.128 4 -0.675 M nCCAS nCRAS F 4.568 4 -0.666 M nCRAS RCLK R 3.070 4 -0.412 M nFWE PHI2 F 8.979 4 -0.603 M nFWE nCRAS F 1.467 4 0.144 4 // Clock to Output Delay Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade ------------------------------------------------------------------------ LED RCLK R 11.034 4 3.119 M LED nCRAS F 11.531 4 3.339 M RA[0] RCLK R 11.682 4 3.586 M RA[0] nCRAS F 11.704 4 3.483 M RA[10] RCLK R 7.888 4 2.711 M RA[11] PHI2 R 9.755 4 3.200 M RA[1] RCLK R 11.454 4 3.535 M RA[1] nCRAS F 11.216 4 3.347 M RA[2] RCLK R 12.084 4 3.693 M RA[2] nCRAS F 11.742 4 3.501 M RA[3] RCLK R 12.131 4 3.715 M RA[3] nCRAS F 11.857 4 3.533 M RA[4] RCLK R 11.966 4 3.684 M RA[4] nCRAS F 12.319 4 3.650 M RA[5] RCLK R 11.928 4 3.670 M RA[5] nCRAS F 11.637 4 3.446 M RA[6] RCLK R 11.419 4 3.523 M RA[6] nCRAS F 11.718 4 3.486 M RA[7] RCLK R 11.988 4 3.651 M RA[7] nCRAS F 12.274 4 3.636 M RA[8] RCLK R 11.660 4 3.582 M RA[8] nCRAS F 11.098 4 3.343 M RA[9] RCLK R 11.454 4 3.547 M RA[9] nCRAS F 11.134 4 3.314 M RBA[0] nCRAS F 8.903 4 2.891 M RBA[1] nCRAS F 8.883 4 2.898 M RCKE RCLK R 9.774 4 3.159 M RCLKout RCLK R 7.101 4 2.108 M RDQMH RCLK R 10.733 4 3.351 M RDQML RCLK R 10.683 4 3.364 M RD[0] nCCAS F 8.977 4 3.012 M RD[1] nCCAS F 8.977 4 3.012 M RD[2] nCCAS F 8.977 4 3.012 M RD[3] nCCAS F 8.977 4 3.012 M RD[4] nCCAS F 8.977 4 3.012 M RD[5] nCCAS F 8.977 4 3.012 M RD[6] nCCAS F 8.977 4 3.012 M RD[7] nCCAS F 8.977 4 3.012 M nRCAS RCLK R 7.822 4 2.706 M nRCS RCLK R 7.822 4 2.706 M nRRAS RCLK R 7.822 4 2.706 M nRWE RCLK R 7.803 4 2.713 M WARNING: you must also run trce with hold speed: 4 WARNING: you must also run trce with setup speed: M