PAD Specification File *************************** PART TYPE: LCMXO2-640HC Performance Grade: 4 PACKAGE: TQFP100 Package Status: Final Version 1.39 Tue Aug 15 05:03:32 2023 Pinout by Port Name: +-----------+----------+---------------+-------+-----------+-----------+----------------------------------------------------------+ | Port Name | Pin/Bank | Buffer Type | Site | PG Enable | BC Enable | Properties | +-----------+----------+---------------+-------+-----------+-----------+----------------------------------------------------------+ | CROW[0] | 10/3 | LVCMOS25_IN | PL3D | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | CROW[1] | 16/3 | LVCMOS25_IN | PL6A | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[0] | 3/3 | LVCMOS25_IN | PL2C | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[1] | 96/0 | LVCMOS25_IN | PT6D | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[2] | 88/0 | LVCMOS25_IN | PT9A | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[3] | 97/0 | LVCMOS25_IN | PT6C | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[4] | 99/0 | LVCMOS25_IN | PT6A | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[5] | 98/0 | LVCMOS25_IN | PT6B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[6] | 2/3 | LVCMOS25_IN | PL2B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Din[7] | 1/3 | LVCMOS25_IN | PL2A | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | Dout[0] | 76/0 | LVCMOS25_OUT | PT11D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | Dout[1] | 86/0 | LVCMOS25_OUT | PT9C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | Dout[2] | 87/0 | LVCMOS25_OUT | PT9B | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | Dout[3] | 85/0 | LVCMOS25_OUT | PT9D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | Dout[4] | 83/0 | LVCMOS25_OUT | PT10B | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | Dout[5] | 84/0 | LVCMOS25_OUT | PT10A | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | Dout[6] | 78/0 | LVCMOS25_OUT | PT11A | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | Dout[7] | 82/0 | LVCMOS25_OUT | PT10C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | LED | 34/2 | LVCMOS25_OUT | PB6C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | MAin[0] | 14/3 | LVCMOS25_IN | PL5C | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[1] | 12/3 | LVCMOS25_IN | PL5A | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[2] | 13/3 | LVCMOS25_IN | PL5B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[3] | 21/3 | LVCMOS25_IN | PL7B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[4] | 20/3 | LVCMOS25_IN | PL7A | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[5] | 19/3 | LVCMOS25_IN | PL6D | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[6] | 24/3 | LVCMOS25_IN | PL7C | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[7] | 18/3 | LVCMOS25_IN | PL6C | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[8] | 25/3 | LVCMOS25_IN | PL7D | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | MAin[9] | 32/2 | LVCMOS25_IN | PB6B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | PHI2 | 8/3 | LVCMOS25_IN | PL3B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | RA[0] | 66/1 | LVCMOS25_OUT | PR3D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[10] | 64/1 | LVCMOS25_OUT | PR5B | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[11] | 59/1 | LVCMOS25_OUT | PR6B | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[1] | 67/1 | LVCMOS25_OUT | PR3C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[2] | 69/1 | LVCMOS25_OUT | PR3A | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[3] | 71/1 | LVCMOS25_OUT | PR2C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[4] | 74/1 | LVCMOS25_OUT | PR2B | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[5] | 70/1 | LVCMOS25_OUT | PR2D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[6] | 68/1 | LVCMOS25_OUT | PR3B | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[7] | 75/1 | LVCMOS25_OUT | PR2A | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[8] | 65/1 | LVCMOS25_OUT | PR5A | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RA[9] | 63/1 | LVCMOS25_OUT | PR5C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RBA[0] | 58/1 | LVCMOS25_OUT | PR6C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RBA[1] | 60/1 | LVCMOS25_OUT | PR6A | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RCKE | 53/1 | LVCMOS25_OUT | PR7B | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RCLK | 62/1 | LVCMOS25_IN | PR5D | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | RDQMH | 51/1 | LVCMOS25_OUT | PR7D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RDQML | 48/2 | LVCMOS25_OUT | PB14C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | RD[0] | 36/2 | LVCMOS25_BIDI | PB10A | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | RD[1] | 37/2 | LVCMOS25_BIDI | PB10B | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | RD[2] | 38/2 | LVCMOS25_BIDI | PB10C | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | RD[3] | 39/2 | LVCMOS25_BIDI | PB10D | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | RD[4] | 40/2 | LVCMOS25_BIDI | PB12A | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | RD[5] | 41/2 | LVCMOS25_BIDI | PB12B | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | RD[6] | 42/2 | LVCMOS25_BIDI | PB12C | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | RD[7] | 43/2 | LVCMOS25_BIDI | PB12D | | | DRIVE:8mA PULL:DOWN CLAMP:ON HYSTERESIS:SMALL SLEW:SLOW | | UFMCLK | 29/2 | LVCMOS25_OUT | PB4C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | UFMSDI | 30/2 | LVCMOS25_OUT | PB4D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | UFMSDO | 27/2 | LVCMOS25_IN | PB4A | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | nCCAS | 9/3 | LVCMOS25_IN | PL3C | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | nCRAS | 17/3 | LVCMOS25_IN | PL6B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | nFWE | 28/2 | LVCMOS25_IN | PB4B | | | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL | | nRCAS | 52/1 | LVCMOS25_OUT | PR7C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | nRCS | 57/1 | LVCMOS25_OUT | PR6D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | nRRAS | 54/1 | LVCMOS25_OUT | PR7A | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | nRWE | 49/2 | LVCMOS25_OUT | PB14D | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | | nUFMCS | 77/0 | LVCMOS25_OUT | PT11C | | | DRIVE:8mA PULL:DOWN SLEW:SLOW | +-----------+----------+---------------+-------+-----------+-----------+----------------------------------------------------------+ Vccio by Bank: +------+-------+ | Bank | Vccio | +------+-------+ | 0 | 2.5V | | 1 | 2.5V | | 2 | 2.5V | | 3 | 2.5V | +------+-------+ Vref by Bank: +------+-----+-----------------+---------+ | Vref | Pin | Bank # / Vref # | Load(s) | +------+-----+-----------------+---------+ +------+-----+-----------------+---------+ Pinout by Pin Number: +----------+-----------------------+------------+---------------+-------+---------------+-----------+-----------+ | Pin/Bank | Pin Info | Preference | Buffer Type | Site | Dual Function | PG Enable | BC Enable | +----------+-----------------------+------------+---------------+-------+---------------+-----------+-----------+ | 1/3 | Din[7] | LOCATED | LVCMOS25_IN | PL2A | | | | | 2/3 | Din[6] | LOCATED | LVCMOS25_IN | PL2B | | | | | 3/3 | Din[0] | LOCATED | LVCMOS25_IN | PL2C | PCLKT3_2 | | | | 4/3 | unused, PULL:DOWN | | | PL2D | PCLKC3_2 | | | | 7/3 | unused, PULL:DOWN | | | PL3A | | | | | 8/3 | PHI2 | LOCATED | LVCMOS25_IN | PL3B | | | | | 9/3 | nCCAS | LOCATED | LVCMOS25_IN | PL3C | | | | | 10/3 | CROW[0] | LOCATED | LVCMOS25_IN | PL3D | | | | | 12/3 | MAin[1] | LOCATED | LVCMOS25_IN | PL5A | PCLKT3_1 | | | | 13/3 | MAin[2] | LOCATED | LVCMOS25_IN | PL5B | PCLKC3_1 | | | | 14/3 | MAin[0] | LOCATED | LVCMOS25_IN | PL5C | | | | | 15/3 | unused, PULL:DOWN | | | PL5D | | | | | 16/3 | CROW[1] | LOCATED | LVCMOS25_IN | PL6A | | | | | 17/3 | nCRAS | LOCATED | LVCMOS25_IN | PL6B | | | | | 18/3 | MAin[7] | LOCATED | LVCMOS25_IN | PL6C | | | | | 19/3 | MAin[5] | LOCATED | LVCMOS25_IN | PL6D | | | | | 20/3 | MAin[4] | LOCATED | LVCMOS25_IN | PL7A | PCLKT3_0 | | | | 21/3 | MAin[3] | LOCATED | LVCMOS25_IN | PL7B | PCLKC3_0 | | | | 24/3 | MAin[6] | LOCATED | LVCMOS25_IN | PL7C | | | | | 25/3 | MAin[8] | LOCATED | LVCMOS25_IN | PL7D | | | | | 27/2 | UFMSDO | LOCATED | LVCMOS25_IN | PB4A | CSSPIN | | | | 28/2 | nFWE | LOCATED | LVCMOS25_IN | PB4B | | | | | 29/2 | UFMCLK | LOCATED | LVCMOS25_OUT | PB4C | | | | | 30/2 | UFMSDI | LOCATED | LVCMOS25_OUT | PB4D | | | | | 31/2 | unused, PULL:DOWN | | | PB6A | MCLK/CCLK | | | | 32/2 | MAin[9] | LOCATED | LVCMOS25_IN | PB6B | SO/SPISO | | | | 34/2 | LED | LOCATED | LVCMOS25_OUT | PB6C | PCLKT2_0 | | | | 35/2 | unused, PULL:DOWN | | | PB6D | PCLKC2_0 | | | | 36/2 | RD[0] | LOCATED | LVCMOS25_BIDI | PB10A | | | | | 37/2 | RD[1] | LOCATED | LVCMOS25_BIDI | PB10B | | | | | 38/2 | RD[2] | LOCATED | LVCMOS25_BIDI | PB10C | PCLKT2_1 | | | | 39/2 | RD[3] | LOCATED | LVCMOS25_BIDI | PB10D | PCLKC2_1 | | | | 40/2 | RD[4] | LOCATED | LVCMOS25_BIDI | PB12A | | | | | 41/2 | RD[5] | LOCATED | LVCMOS25_BIDI | PB12B | | | | | 42/2 | RD[6] | LOCATED | LVCMOS25_BIDI | PB12C | | | | | 43/2 | RD[7] | LOCATED | LVCMOS25_BIDI | PB12D | | | | | 45/2 | unused, PULL:DOWN | | | PB14A | | | | | 47/2 | unused, PULL:DOWN | | | PB14B | | | | | 48/2 | RDQML | LOCATED | LVCMOS25_OUT | PB14C | SN | | | | 49/2 | nRWE | LOCATED | LVCMOS25_OUT | PB14D | SI/SISPI | | | | 51/1 | RDQMH | LOCATED | LVCMOS25_OUT | PR7D | | | | | 52/1 | nRCAS | LOCATED | LVCMOS25_OUT | PR7C | | | | | 53/1 | RCKE | LOCATED | LVCMOS25_OUT | PR7B | | | | | 54/1 | nRRAS | LOCATED | LVCMOS25_OUT | PR7A | | | | | 57/1 | nRCS | LOCATED | LVCMOS25_OUT | PR6D | | | | | 58/1 | RBA[0] | LOCATED | LVCMOS25_OUT | PR6C | | | | | 59/1 | RA[11] | LOCATED | LVCMOS25_OUT | PR6B | | | | | 60/1 | RBA[1] | LOCATED | LVCMOS25_OUT | PR6A | | | | | 62/1 | RCLK | LOCATED | LVCMOS25_IN | PR5D | PCLKC1_0 | | | | 63/1 | RA[9] | LOCATED | LVCMOS25_OUT | PR5C | PCLKT1_0 | | | | 64/1 | RA[10] | LOCATED | LVCMOS25_OUT | PR5B | | | | | 65/1 | RA[8] | LOCATED | LVCMOS25_OUT | PR5A | | | | | 66/1 | RA[0] | LOCATED | LVCMOS25_OUT | PR3D | | | | | 67/1 | RA[1] | LOCATED | LVCMOS25_OUT | PR3C | | | | | 68/1 | RA[6] | LOCATED | LVCMOS25_OUT | PR3B | | | | | 69/1 | RA[2] | LOCATED | LVCMOS25_OUT | PR3A | | | | | 70/1 | RA[5] | LOCATED | LVCMOS25_OUT | PR2D | | | | | 71/1 | RA[3] | LOCATED | LVCMOS25_OUT | PR2C | | | | | 74/1 | RA[4] | LOCATED | LVCMOS25_OUT | PR2B | | | | | 75/1 | RA[7] | LOCATED | LVCMOS25_OUT | PR2A | | | | | 76/0 | Dout[0] | LOCATED | LVCMOS25_OUT | PT11D | DONE | | | | 77/0 | nUFMCS | | LVCMOS25_OUT | PT11C | INITN | | | | 78/0 | Dout[6] | LOCATED | LVCMOS25_OUT | PT11A | | | | | 81/0 | unused, PULL:DOWN | | | PT10D | PROGRAMN | | | | 82/0 | Dout[7] | LOCATED | LVCMOS25_OUT | PT10C | JTAGENB | | | | 83/0 | Dout[4] | LOCATED | LVCMOS25_OUT | PT10B | | | | | 84/0 | Dout[5] | LOCATED | LVCMOS25_OUT | PT10A | | | | | 85/0 | Dout[3] | LOCATED | LVCMOS25_OUT | PT9D | SDA/PCLKC0_0 | | | | 86/0 | Dout[1] | LOCATED | LVCMOS25_OUT | PT9C | SCL/PCLKT0_0 | | | | 87/0 | Dout[2] | LOCATED | LVCMOS25_OUT | PT9B | PCLKC0_1 | | | | 88/0 | Din[2] | LOCATED | LVCMOS25_IN | PT9A | PCLKT0_1 | | | | 90/0 | Reserved: sysCONFIG | | | PT7D | TMS | | | | 91/0 | Reserved: sysCONFIG | | | PT7C | TCK | | | | 94/0 | Reserved: sysCONFIG | | | PT7B | TDI | | | | 95/0 | Reserved: sysCONFIG | | | PT7A | TDO | | | | 96/0 | Din[1] | LOCATED | LVCMOS25_IN | PT6D | | | | | 97/0 | Din[3] | LOCATED | LVCMOS25_IN | PT6C | | | | | 98/0 | Din[5] | LOCATED | LVCMOS25_IN | PT6B | | | | | 99/0 | Din[4] | LOCATED | LVCMOS25_IN | PT6A | | | | | PT11B/0 | unused, PULL:DOWN | | | PT11B | | | | +----------+-----------------------+------------+---------------+-------+---------------+-----------+-----------+ sysCONFIG Pins: +----------+--------------------+--------------------+----------+-------------+-------------------+ | Pad Name | sysCONFIG Pin Name | sysCONFIG Settings | Pin/Bank | Buffer Type | Config Pull Mode | +----------+--------------------+--------------------+----------+-------------+-------------------+ | PT7D | TMS | JTAG_PORT=ENABLE | 90/0 | | PULLUP | | PT7C | TCK/TEST_CLK | JTAG_PORT=ENABLE | 91/0 | | NO pull up/down | | PT7B | TDI/MD7 | JTAG_PORT=ENABLE | 94/0 | | PULLUP | | PT7A | TDO | JTAG_PORT=ENABLE | 95/0 | | PULLUP | +----------+--------------------+--------------------+----------+-------------+-------------------+ Dedicated sysCONFIG Pins: List of All Pins' Locate Preferences Based on Final Placement After PAR to Help Users Lock Down ALL the Pins Easily (by Simply Copy & Paste): LOCATE COMP "CROW[0]" SITE "10"; LOCATE COMP "CROW[1]" SITE "16"; LOCATE COMP "Din[0]" SITE "3"; LOCATE COMP "Din[1]" SITE "96"; LOCATE COMP "Din[2]" SITE "88"; LOCATE COMP "Din[3]" SITE "97"; LOCATE COMP "Din[4]" SITE "99"; LOCATE COMP "Din[5]" SITE "98"; LOCATE COMP "Din[6]" SITE "2"; LOCATE COMP "Din[7]" SITE "1"; LOCATE COMP "Dout[0]" SITE "76"; LOCATE COMP "Dout[1]" SITE "86"; LOCATE COMP "Dout[2]" SITE "87"; LOCATE COMP "Dout[3]" SITE "85"; LOCATE COMP "Dout[4]" SITE "83"; LOCATE COMP "Dout[5]" SITE "84"; LOCATE COMP "Dout[6]" SITE "78"; LOCATE COMP "Dout[7]" SITE "82"; LOCATE COMP "LED" SITE "34"; LOCATE COMP "MAin[0]" SITE "14"; LOCATE COMP "MAin[1]" SITE "12"; LOCATE COMP "MAin[2]" SITE "13"; LOCATE COMP "MAin[3]" SITE "21"; LOCATE COMP "MAin[4]" SITE "20"; LOCATE COMP "MAin[5]" SITE "19"; LOCATE COMP "MAin[6]" SITE "24"; LOCATE COMP "MAin[7]" SITE "18"; LOCATE COMP "MAin[8]" SITE "25"; LOCATE COMP "MAin[9]" SITE "32"; LOCATE COMP "PHI2" SITE "8"; LOCATE COMP "RA[0]" SITE "66"; LOCATE COMP "RA[10]" SITE "64"; LOCATE COMP "RA[11]" SITE "59"; LOCATE COMP "RA[1]" SITE "67"; LOCATE COMP "RA[2]" SITE "69"; LOCATE COMP "RA[3]" SITE "71"; LOCATE COMP "RA[4]" SITE "74"; LOCATE COMP "RA[5]" SITE "70"; LOCATE COMP "RA[6]" SITE "68"; LOCATE COMP "RA[7]" SITE "75"; LOCATE COMP "RA[8]" SITE "65"; LOCATE COMP "RA[9]" SITE "63"; LOCATE COMP "RBA[0]" SITE "58"; LOCATE COMP "RBA[1]" SITE "60"; LOCATE COMP "RCKE" SITE "53"; LOCATE COMP "RCLK" SITE "62"; LOCATE COMP "RDQMH" SITE "51"; LOCATE COMP "RDQML" SITE "48"; LOCATE COMP "RD[0]" SITE "36"; LOCATE COMP "RD[1]" SITE "37"; LOCATE COMP "RD[2]" SITE "38"; LOCATE COMP "RD[3]" SITE "39"; LOCATE COMP "RD[4]" SITE "40"; LOCATE COMP "RD[5]" SITE "41"; LOCATE COMP "RD[6]" SITE "42"; LOCATE COMP "RD[7]" SITE "43"; LOCATE COMP "UFMCLK" SITE "29"; LOCATE COMP "UFMSDI" SITE "30"; LOCATE COMP "UFMSDO" SITE "27"; LOCATE COMP "nCCAS" SITE "9"; LOCATE COMP "nCRAS" SITE "17"; LOCATE COMP "nFWE" SITE "28"; LOCATE COMP "nRCAS" SITE "52"; LOCATE COMP "nRCS" SITE "57"; LOCATE COMP "nRRAS" SITE "54"; LOCATE COMP "nRWE" SITE "49"; LOCATE COMP "nUFMCS" SITE "77"; PAR: Place And Route Diamond (64-bit) 3.12.1.454. Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights reserved. Tue Aug 15 05:03:34 2023