I/O Timing Report Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-1200HC Package: TQFP100 Performance: 5 Package Status: Final Version 1.44. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-1200HC Package: TQFP100 Performance: 6 Package Status: Final Version 1.44. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_1200hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-1200HC Package: TQFP100 Performance: M Package Status: Final Version 1.44. Performance Hardware Data Status: Final Version 34.4. // Design: RAM2GS // Package: TQFP100 // ncd File: ram2gs_lcmxo2_1200hc_impl1.ncd // Version: Diamond (64-bit) 3.12.1.454 // Written on Thu Oct 19 23:51:14 2023 // M: Minimum Performance Grade // iotiming RAM2GS_LCMXO2_1200HC_impl1.ncd RAM2GS_LCMXO2_1200HC_impl1.prf -gui -msgset //Mac/iCloud/Repos/RAM2GS/CPLD/LCMXO2-1200HC/promote.xml I/O Timing Report (All units are in ns) Worst Case Results across Performance Grades (M, 6, 5, 4): // Input Setup and Hold Times Port Clock Edge Setup Performance_Grade Hold Performance_Grade ---------------------------------------------------------------------- CROW[0] nCRAS F 1.569 4 0.268 6 CROW[1] nCRAS F 1.013 4 0.820 4 Din[0] PHI2 F 5.478 4 4.293 4 Din[0] nCCAS F 2.010 4 -0.119 M Din[1] PHI2 F 4.088 4 4.173 4 Din[1] nCCAS F 0.601 4 0.796 4 Din[2] PHI2 F 4.967 4 4.173 4 Din[2] nCCAS F 0.811 4 0.583 4 Din[3] PHI2 F 3.810 4 4.173 4 Din[3] nCCAS F 1.136 4 0.322 4 Din[4] PHI2 F 4.400 4 4.173 4 Din[4] nCCAS F 0.762 4 0.590 4 Din[5] PHI2 F 5.595 4 4.173 4 Din[5] nCCAS F 0.779 4 0.576 4 Din[6] PHI2 F 5.120 4 4.293 4 Din[6] nCCAS F 2.036 4 -0.117 M Din[7] PHI2 F 5.630 4 4.293 4 Din[7] nCCAS F 2.301 4 -0.192 M MAin[0] PHI2 F 4.196 4 1.086 4 MAin[0] nCRAS F 0.152 6 1.567 4 MAin[1] PHI2 F 3.875 4 1.164 4 MAin[1] nCRAS F -0.177 M 2.102 4 MAin[2] PHI2 F 8.381 4 -0.693 M MAin[2] nCRAS F -0.315 M 2.358 4 MAin[3] PHI2 F 7.199 4 -0.405 M MAin[3] nCRAS F -0.173 M 1.962 4 MAin[4] PHI2 F 8.710 4 -0.769 M MAin[4] nCRAS F 0.292 4 1.419 4 MAin[5] PHI2 F 8.562 4 -0.730 M MAin[5] nCRAS F -0.055 M 1.752 4 MAin[6] PHI2 F 7.862 4 -0.604 M MAin[6] nCRAS F -0.126 M 1.965 4 MAin[7] PHI2 F 8.829 4 -0.836 M MAin[7] nCRAS F -0.122 M 1.960 4 MAin[8] nCRAS F -0.288 M 2.424 4 MAin[9] nCRAS F -0.212 M 2.196 4 PHI2 RCLK R -0.133 M 2.360 4 nCCAS RCLK R 3.627 4 -0.577 M nCCAS nCRAS F 3.154 4 -0.145 M nCRAS RCLK R 1.461 4 -0.017 M nFWE PHI2 F 6.933 4 -0.318 M nFWE nCRAS F 0.403 4 1.860 4 // Clock to Output Delay Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade ------------------------------------------------------------------------ LED RCLK R 10.948 4 3.270 M LED nCRAS F 12.507 4 3.690 M RA[0] RCLK R 13.208 4 4.000 M RA[0] nCRAS F 13.040 4 3.935 M RA[10] RCLK R 7.888 4 2.711 M RA[11] PHI2 R 9.755 4 3.200 M RA[1] RCLK R 13.332 4 4.024 M RA[1] nCRAS F 12.944 4 3.885 M RA[2] RCLK R 13.624 4 4.099 M RA[2] nCRAS F 13.220 4 3.993 M RA[3] RCLK R 13.506 4 4.055 M RA[3] nCRAS F 13.322 4 4.022 M RA[4] RCLK R 12.512 4 3.834 M RA[4] nCRAS F 14.534 4 4.331 M RA[5] RCLK R 13.530 4 4.069 M RA[5] nCRAS F 13.126 4 3.963 M RA[6] RCLK R 14.238 4 4.245 M RA[6] nCRAS F 13.589 4 4.077 M RA[7] RCLK R 13.759 4 4.129 M RA[7] nCRAS F 13.371 4 3.990 M RA[8] RCLK R 11.858 4 3.632 M RA[8] nCRAS F 13.338 4 4.026 M RA[9] RCLK R 11.007 4 3.423 M RA[9] nCRAS F 12.651 4 3.856 M RBA[0] nCRAS F 10.201 4 3.325 M RBA[1] nCRAS F 10.201 4 3.325 M RCKE RCLK R 9.754 4 3.167 M RCLKout RCLK R 7.971 4 2.504 M RDQMH RCLK R 11.153 4 3.458 M RDQML RCLK R 11.133 4 3.466 M RD[0] nCCAS F 9.354 4 3.132 M RD[1] nCCAS F 9.354 4 3.132 M RD[2] nCCAS F 9.354 4 3.132 M RD[3] nCCAS F 9.354 4 3.132 M RD[4] nCCAS F 9.354 4 3.132 M RD[5] nCCAS F 9.354 4 3.132 M RD[6] nCCAS F 9.354 4 3.132 M RD[7] nCCAS F 9.354 4 3.132 M nRCAS RCLK R 7.822 4 2.706 M nRCS RCLK R 7.822 4 2.706 M nRRAS RCLK R 7.822 4 2.706 M nRWE RCLK R 7.803 4 2.713 M WARNING: you must also run trce with hold speed: 4 WARNING: you must also run trce with setup speed: 6 WARNING: you must also run trce with hold speed: 6 WARNING: you must also run trce with setup speed: M