Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 5 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 6 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: M Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. // Design: RAM2GS // Package: TQFP100 // ncd File: ram2gs_lcmxo2_640hc_impl1.ncd // Version: Diamond (64-bit) 3.12.1.454 // Written on Tue Aug 15 05:03:37 2023 // M: Minimum Performance Grade // iotiming RAM2GS_LCMXO2_640HC_impl1.ncd RAM2GS_LCMXO2_640HC_impl1.prf -gui -msgset D:/OneDrive/Documents/GitHub/RAM2GS/CPLD/LCMXO2-640HC/promote.xml I/O Timing Report (All units are in ns) Worst Case Results across Performance Grades (M, 6, 5, 4): // Input Setup and Hold Times Port Clock Edge Setup Performance_Grade Hold Performance_Grade ---------------------------------------------------------------------- CROW[0] nCRAS F 0.993 4 0.541 4 CROW[1] nCRAS F 0.293 4 1.148 4 Din[0] PHI2 F 4.804 4 1.483 4 Din[0] nCCAS F 1.539 4 -0.150 M Din[1] PHI2 F 4.733 4 0.702 4 Din[1] nCCAS F 1.638 4 -0.177 M Din[2] PHI2 F 4.046 4 1.702 4 Din[2] nCCAS F 1.651 4 -0.121 M Din[3] PHI2 F 4.770 4 1.575 4 Din[3] nCCAS F 1.973 4 -0.207 M Din[4] PHI2 F 5.656 4 0.720 4 Din[4] nCCAS F 1.606 4 -0.156 M Din[5] PHI2 F 4.165 4 1.131 4 Din[5] nCCAS F 0.618 4 0.435 4 Din[6] PHI2 F 5.309 4 1.478 4 Din[6] nCCAS F 1.331 4 -0.053 M Din[7] PHI2 F 5.874 4 1.774 4 Din[7] nCCAS F 2.023 4 -0.205 M MAin[0] PHI2 F 5.149 4 0.137 M MAin[0] nCRAS F -0.022 M 1.415 4 MAin[1] PHI2 F 4.216 4 1.539 4 MAin[1] nCRAS F 1.716 4 -0.018 M MAin[2] PHI2 F 3.754 4 0.553 4 MAin[2] nCRAS F -0.164 M 1.715 4 MAin[3] PHI2 F 5.957 4 -0.100 M MAin[3] nCRAS F 0.033 4 1.356 4 MAin[4] PHI2 F 5.652 4 -0.180 M MAin[4] nCRAS F -0.173 M 1.726 4 MAin[5] PHI2 F 4.938 4 0.693 6 MAin[5] nCRAS F 0.005 4 1.395 4 MAin[6] PHI2 F 5.535 4 -0.147 M MAin[6] nCRAS F 0.012 4 1.387 4 MAin[7] PHI2 F 5.951 4 -0.083 M MAin[7] nCRAS F 0.858 4 0.664 4 MAin[8] nCRAS F 0.526 4 0.915 4 MAin[9] nCRAS F 0.038 4 1.342 4 PHI2 RCLK R 2.772 4 -0.342 M UFMSDO RCLK R 0.780 4 0.632 4 nCCAS RCLK R 0.557 4 0.872 4 nCCAS nCRAS F 2.108 4 -0.053 M nCRAS RCLK R 2.536 4 -0.169 M nFWE PHI2 F 5.830 4 0.629 4 nFWE nCRAS F 1.386 4 0.176 4 // Clock to Output Delay Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade ------------------------------------------------------------------------ LED RCLK R 11.611 4 3.288 M LED nCRAS F 12.009 4 3.367 M RA[0] RCLK R 12.268 4 3.492 M RA[0] nCRAS F 11.741 4 3.284 M RA[10] RCLK R 10.004 4 2.964 M RA[11] PHI2 R 10.669 4 3.160 M RA[1] RCLK R 12.975 4 3.665 M RA[1] nCRAS F 11.918 4 3.321 M RA[2] RCLK R 12.531 4 3.533 M RA[2] nCRAS F 11.755 4 3.277 M RA[3] RCLK R 11.851 4 3.375 M RA[3] nCRAS F 12.624 4 3.513 M RA[4] RCLK R 13.380 4 3.775 M RA[4] nCRAS F 12.857 4 3.569 M RA[5] RCLK R 12.767 4 3.632 M RA[5] nCRAS F 12.469 4 3.456 M RA[6] RCLK R 12.163 4 3.468 M RA[6] nCRAS F 12.141 4 3.394 M RA[7] RCLK R 11.990 4 3.375 M RA[7] nCRAS F 12.172 4 3.381 M RA[8] RCLK R 11.712 4 3.314 M RA[8] nCRAS F 12.431 4 3.457 M RA[9] RCLK R 11.412 4 3.233 M RA[9] nCRAS F 12.128 4 3.377 M RBA[0] nCRAS F 10.844 4 3.124 M RBA[1] nCRAS F 10.216 4 2.967 M RCKE RCLK R 10.964 4 3.209 M RDQMH RCLK R 12.109 4 3.426 M RDQML RCLK R 10.974 4 3.140 M RD[0] nCCAS F 8.747 4 2.603 M RD[1] nCCAS F 8.747 4 2.603 M RD[2] nCCAS F 8.737 4 2.605 M RD[3] nCCAS F 9.239 4 2.740 M RD[4] nCCAS F 9.283 4 2.726 M RD[5] nCCAS F 9.355 4 2.761 M RD[6] nCCAS F 9.106 4 2.681 M RD[7] nCCAS F 9.181 4 2.711 M UFMCLK RCLK R 10.078 4 3.002 M UFMSDI RCLK R 10.108 4 2.996 M nRCAS RCLK R 10.525 4 3.100 M nRCS RCLK R 10.119 4 2.984 M nRRAS RCLK R 10.200 4 3.024 M nRWE RCLK R 9.984 4 2.972 M nUFMCS RCLK R 10.165 4 3.020 M WARNING: you must also run trce with hold speed: 4 WARNING: you must also run trce with hold speed: 6 WARNING: you must also run trce with setup speed: M