I/O Timing Report Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 5 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 6 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file ram2gs_lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: M Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. // Design: RAM2GS // Package: TQFP100 // ncd File: ram2gs_lcmxo2_640hc_impl1.ncd // Version: Diamond (64-bit) 3.12.1.454 // Written on Tue Aug 15 22:56:41 2023 // M: Minimum Performance Grade // iotiming RAM2GS_LCMXO2_640HC_impl1.ncd RAM2GS_LCMXO2_640HC_impl1.prf -gui -msgset D:/OneDrive/Documents/GitHub/RAM2GS/CPLD/LCMXO2-640HC/promote.xml I/O Timing Report (All units are in ns) Worst Case Results across Performance Grades (M, 6, 5, 4): // Input Setup and Hold Times Port Clock Edge Setup Performance_Grade Hold Performance_Grade ---------------------------------------------------------------------- CROW[0] nCRAS F 3.268 4 -0.395 M CROW[1] nCRAS F 1.999 4 -0.040 M Din[0] PHI2 F 4.389 4 3.636 4 Din[0] nCCAS F 0.646 4 0.538 4 Din[1] PHI2 F 4.456 4 3.516 4 Din[1] nCCAS F 1.108 4 0.143 4 Din[2] PHI2 F 4.106 4 3.516 4 Din[2] nCCAS F 1.315 4 0.036 M Din[3] PHI2 F 4.427 4 3.516 4 Din[3] nCCAS F 1.893 4 -0.089 M Din[4] PHI2 F 4.612 4 3.516 4 Din[4] nCCAS F 0.714 4 0.460 4 Din[5] PHI2 F 4.805 4 3.516 4 Din[5] nCCAS F 1.636 4 -0.054 M Din[6] PHI2 F 4.266 4 3.636 4 Din[6] nCCAS F 1.078 4 0.185 4 Din[7] PHI2 F 5.607 4 3.636 4 Din[7] nCCAS F 2.050 4 -0.188 M MAin[0] PHI2 F 6.493 4 -0.289 M MAin[0] nCRAS F 0.832 4 0.632 4 MAin[1] PHI2 F 5.109 4 0.055 M MAin[1] nCRAS F 1.627 4 0.047 M MAin[2] PHI2 F 5.349 4 0.695 4 MAin[2] nCRAS F 1.684 4 0.048 M MAin[3] PHI2 F 7.301 4 -0.533 M MAin[3] nCRAS F 1.660 4 0.035 M MAin[4] PHI2 F 6.167 4 -0.223 M MAin[4] nCRAS F 1.339 4 0.181 4 MAin[5] PHI2 F 6.923 4 -0.449 M MAin[5] nCRAS F 1.082 4 0.412 4 MAin[6] PHI2 F 6.784 4 -0.408 M MAin[6] nCRAS F 0.961 4 0.423 4 MAin[7] PHI2 F 6.547 4 -0.171 M MAin[7] nCRAS F 1.331 4 0.186 4 MAin[8] nCRAS F 0.454 4 0.874 4 MAin[9] nCRAS F 0.782 4 0.684 4 PHI2 RCLK R -0.312 M 3.167 4 UFMSDO RCLK R 0.397 4 0.958 4 nCCAS RCLK R 2.272 4 -0.095 M nCCAS nCRAS F 3.094 4 -0.308 M nCRAS RCLK R 1.843 4 0.009 M nFWE PHI2 F 5.987 4 -0.179 M nFWE nCRAS F 0.594 4 0.839 4 // Clock to Output Delay Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade ------------------------------------------------------------------------ LED RCLK R 11.623 4 3.337 M LED nCRAS F 10.867 4 3.086 M RA[0] RCLK R 10.387 4 3.085 M RA[0] nCRAS F 10.473 4 3.018 M RA[10] RCLK R 8.141 4 2.620 M RA[11] PHI2 R 8.610 4 2.756 M RA[1] RCLK R 11.208 4 3.281 M RA[1] nCRAS F 10.655 4 3.096 M RA[2] RCLK R 11.477 4 3.355 M RA[2] nCRAS F 10.655 4 3.096 M RA[3] RCLK R 10.954 4 3.201 M RA[3] nCRAS F 10.693 4 3.092 M RA[4] RCLK R 12.338 4 3.584 M RA[4] nCRAS F 10.776 4 3.099 M RA[5] RCLK R 11.516 4 3.347 M RA[5] nCRAS F 11.072 4 3.177 M RA[6] RCLK R 11.068 4 3.255 M RA[6] nCRAS F 10.655 4 3.096 M RA[7] RCLK R 10.823 4 3.207 M RA[7] nCRAS F 11.129 4 3.214 M RA[8] RCLK R 11.034 4 3.275 M RA[8] nCRAS F 10.664 4 3.099 M RA[9] RCLK R 10.925 4 3.239 M RA[9] nCRAS F 10.710 4 3.093 M RBA[0] nCRAS F 8.157 4 2.563 M RBA[1] nCRAS F 8.157 4 2.563 M RCKE RCLK R 8.141 4 2.620 M RDQMH RCLK R 11.337 4 3.355 M RDQML RCLK R 10.800 4 3.223 M RD[0] nCCAS F 7.888 4 2.510 M RD[1] nCCAS F 7.888 4 2.510 M RD[2] nCCAS F 7.888 4 2.510 M RD[3] nCCAS F 7.888 4 2.510 M RD[4] nCCAS F 7.888 4 2.510 M RD[5] nCCAS F 7.888 4 2.510 M RD[6] nCCAS F 7.888 4 2.510 M RD[7] nCCAS F 7.888 4 2.510 M UFMCLK RCLK R 8.121 4 2.627 M UFMSDI RCLK R 8.121 4 2.627 M nRCAS RCLK R 8.141 4 2.620 M nRCS RCLK R 8.141 4 2.620 M nRRAS RCLK R 8.141 4 2.620 M nRWE RCLK R 8.121 4 2.627 M nUFMCS RCLK R 8.121 4 2.627 M WARNING: you must also run trce with hold speed: 4 WARNING: you must also run trce with setup speed: M