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Report for cell RAM2GS.verilog

Register bits: 90 of 640 (14%)
PIC Latch:       0
I/O cells:       67
                                          Cell usage:
                               cell       count    Res Usage(%)
                                 BB        8       100.0
                              CCU2D       10       100.0
                            FD1P3AX       11       100.0
                            FD1S3AX       49       100.0
                            FD1S3AY        1       100.0
                            FD1S3IX        3       100.0
                                GSR        1       100.0
                                 IB       26       100.0
                           IFS1P3DX        9       100.0
                                INV        7       100.0
                                 OB       33       100.0
                           OFS1P3BX        4       100.0
                           OFS1P3DX       12       100.0
                           OFS1P3JX        1       100.0
                           ORCALUT4      135       100.0
                              PFUMX        1       100.0
                                PUR        1       100.0
                                VHI        1       100.0
                                VLO        1       100.0
                            
                         TOTAL           314