Loading design for application iotiming from file lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 5 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: 6 Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. Loading design for application iotiming from file lcmxo2_640hc_impl1.ncd. Design name: RAM2GS NCD version: 3.3 Vendor: LATTICE Device: LCMXO2-640HC Package: TQFP100 Performance: M Package Status: Final Version 1.39. Performance Hardware Data Status: Final Version 34.4. // Design: RAM2GS // Package: TQFP100 // ncd File: lcmxo2_640hc_impl1.ncd // Version: Diamond (64-bit) 3.12.1.454 // Written on Sat Aug 19 21:55:13 2023 // M: Minimum Performance Grade // iotiming LCMXO2_640HC_impl1.ncd LCMXO2_640HC_impl1.prf -gui -msgset Y:/Repos/RAM2GS/CPLD/LCMXO2-640HC/promote.xml I/O Timing Report (All units are in ns) Worst Case Results across Performance Grades (M, 6, 5, 4): // Input Setup and Hold Times Port Clock Edge Setup Performance_Grade Hold Performance_Grade ---------------------------------------------------------------------- CROW[0] nCRAS F 2.553 4 -0.117 M CROW[1] nCRAS F 2.019 4 0.001 M Din[0] PHI2 F 4.715 4 3.636 4 Din[0] nCCAS F 0.790 4 0.535 4 Din[1] PHI2 F 5.021 4 3.516 4 Din[1] nCCAS F 1.086 4 0.264 4 Din[2] PHI2 F 3.385 4 3.516 4 Din[2] nCCAS F 0.282 4 0.948 4 Din[3] PHI2 F 4.644 4 3.516 4 Din[3] nCCAS F 1.278 4 0.095 4 Din[4] PHI2 F 4.335 4 3.516 4 Din[4] nCCAS F 2.446 4 -0.199 M Din[5] PHI2 F 3.662 4 3.516 4 Din[5] nCCAS F 0.907 4 0.402 4 Din[6] PHI2 F 4.869 4 3.636 4 Din[6] nCCAS F 1.378 4 0.023 M Din[7] PHI2 F 4.138 4 3.636 4 Din[7] nCCAS F 2.072 4 -0.120 M MAin[0] PHI2 F 5.613 4 0.006 M MAin[0] nCRAS F 0.244 4 1.146 4 MAin[1] PHI2 F 3.409 4 0.354 6 MAin[1] nCRAS F 0.244 4 1.146 4 MAin[2] PHI2 F 5.391 4 0.132 M MAin[2] nCRAS F 0.250 4 1.141 4 MAin[3] PHI2 F 4.627 4 0.087 M MAin[3] nCRAS F 0.507 4 0.910 4 MAin[4] PHI2 F 5.665 4 -0.133 M MAin[4] nCRAS F 0.675 4 0.777 4 MAin[5] PHI2 F 5.569 4 0.129 M MAin[5] nCRAS F 0.050 4 1.238 4 MAin[6] PHI2 F 5.717 4 -0.141 M MAin[6] nCRAS F 0.242 4 1.146 4 MAin[7] PHI2 F 5.943 4 -0.173 M MAin[7] nCRAS F 0.170 4 1.228 4 MAin[8] nCRAS F 0.759 4 0.696 4 MAin[9] nCRAS F 0.516 4 0.891 4 PHI2 RCLK R -0.312 M 3.167 4 nCCAS RCLK R 2.600 4 -0.176 M nCCAS nCRAS F 3.106 4 -0.235 M nCRAS RCLK R 1.803 4 -0.055 M nFWE PHI2 F 4.680 4 0.261 M nFWE nCRAS F 2.234 4 1.143 4 // Clock to Output Delay Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade ------------------------------------------------------------------------ LED RCLK R 9.922 4 2.878 M LED nCRAS F 10.555 4 3.057 M RA[0] RCLK R 11.638 4 3.406 M RA[0] nCRAS F 11.771 4 3.430 M RA[10] RCLK R 8.141 4 2.620 M RA[11] PHI2 R 8.610 4 2.756 M RA[1] RCLK R 11.674 4 3.407 M RA[1] nCRAS F 10.635 4 3.155 M RA[2] RCLK R 12.933 4 3.729 M RA[2] nCRAS F 11.858 4 3.449 M RA[3] RCLK R 12.587 4 3.664 M RA[3] nCRAS F 11.255 4 3.298 M RA[4] RCLK R 11.721 4 3.433 M RA[4] nCRAS F 11.153 4 3.297 M RA[5] RCLK R 12.544 4 3.620 M RA[5] nCRAS F 11.480 4 3.360 M RA[6] RCLK R 12.984 4 3.775 M RA[6] nCRAS F 11.528 4 3.407 M RA[7] RCLK R 12.553 4 3.625 M RA[7] nCRAS F 11.610 4 3.368 M RA[8] RCLK R 11.836 4 3.453 M RA[8] nCRAS F 10.797 4 3.201 M RA[9] RCLK R 11.182 4 3.271 M RA[9] nCRAS F 11.135 4 3.279 M RBA[0] nCRAS F 8.439 4 2.703 M RBA[1] nCRAS F 8.439 4 2.703 M RCKE RCLK R 10.083 4 3.081 M RDQMH RCLK R 11.381 4 3.325 M RDQML RCLK R 10.735 4 3.173 M RD[0] nCCAS F 8.223 4 2.594 M RD[1] nCCAS F 8.223 4 2.594 M RD[2] nCCAS F 8.223 4 2.594 M RD[3] nCCAS F 8.223 4 2.594 M RD[4] nCCAS F 8.223 4 2.594 M RD[5] nCCAS F 8.223 4 2.594 M RD[6] nCCAS F 8.223 4 2.594 M RD[7] nCCAS F 8.223 4 2.594 M nRCAS RCLK R 8.141 4 2.620 M nRCS RCLK R 8.141 4 2.620 M nRRAS RCLK R 8.141 4 2.620 M nRWE RCLK R 8.121 4 2.627 M WARNING: you must also run trce with hold speed: 4 WARNING: you must also run trce with hold speed: 6 WARNING: you must also run trce with setup speed: M