# -------------------------------------------------------------------------- # # # Copyright (C) 1991-2013 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any output files from any of the foregoing # (including device programming or simulation files), and any # associated documentation or information are expressly subject # to the terms and conditions of the Altera Program License # Subscription Agreement, Altera MegaCore Function License # Agreement, or other applicable license agreement, including, # without limitation, that your use is for the sole purpose of # programming logic devices manufactured by Altera and sold by # Altera or its authorized distributors. Please refer to the # applicable agreement for further details. # # -------------------------------------------------------------------------- # # # Quartus II 32-bit # Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version # Date created = 21:16:34 March 08, 2020 # # -------------------------------------------------------------------------- # # # Notes: # # 1) The default values for assignments are stored in the file: # RAM4GS_assignment_defaults.qdf # If this file doesn't exist, see file: # assignment_defaults.qdf # # 2) Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus II software # and any changes you make may be lost or overwritten. # # -------------------------------------------------------------------------- # set_global_assignment -name FAMILY "MAX II" set_global_assignment -name DEVICE EPM240T100C5 set_global_assignment -name TOP_LEVEL_ENTITY RAM4GS set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1" set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:16:34 MARCH 08, 2020" set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" set_global_assignment -name SDC_FILE constraints.sdc set_global_assignment -name VERILOG_FILE RAM4GS.v set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE BALANCED set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO PATHS AND MINIMUM TPD PATHS" set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON set_global_assignment -name FITTER_EFFORT "STANDARD FIT" set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER OFF set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %" set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF set_global_assignment -name SMART_RECOMPILE OFF set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 10 set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 10 set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING "PACK ALL IO REGISTERS" set_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY ON set_global_assignment -name SAFE_STATE_MACHINE ON set_location_assignment PIN_12 -to RCLK set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCLK set_location_assignment PIN_52 -to PHI2 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHI2 set_location_assignment PIN_67 -to nCRAS set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCRAS set_location_assignment PIN_53 -to nCCAS set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nCCAS set_location_assignment PIN_48 -to nFWE set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nFWE set_location_assignment PIN_49 -to MAin[0] set_location_assignment PIN_51 -to MAin[1] set_location_assignment PIN_50 -to MAin[2] set_location_assignment PIN_71 -to MAin[3] set_location_assignment PIN_70 -to MAin[4] set_location_assignment PIN_69 -to MAin[5] set_location_assignment PIN_72 -to MAin[6] set_location_assignment PIN_68 -to MAin[7] set_location_assignment PIN_73 -to MAin[8] set_location_assignment PIN_74 -to MAin[9] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to MAin set_location_assignment PIN_54 -to CROW[0] set_location_assignment PIN_55 -to CROW[1] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CROW set_location_assignment PIN_35 -to Din[2] set_location_assignment PIN_36 -to Din[1] set_location_assignment PIN_37 -to Din[3] set_location_assignment PIN_38 -to Din[5] set_location_assignment PIN_39 -to Din[4] set_location_assignment PIN_40 -to Din[7] set_location_assignment PIN_41 -to Din[6] set_location_assignment PIN_42 -to Din[0] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Din set_location_assignment PIN_33 -to Dout[0] set_location_assignment PIN_57 -to Dout[1] set_location_assignment PIN_56 -to Dout[2] set_location_assignment PIN_47 -to Dout[3] set_location_assignment PIN_44 -to Dout[4] set_location_assignment PIN_28 -to Dout[5] set_location_assignment PIN_34 -to Dout[6] set_location_assignment PIN_43 -to Dout[7] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to Dout set_location_assignment PIN_8 -to RCKE set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RCKE set_location_assignment PIN_3 -to nRCS set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCS set_location_assignment PIN_100 -to nRWE set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRWE set_location_assignment PIN_6 -to nRRAS set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRRAS set_location_assignment PIN_4 -to nRCAS set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to nRCAS set_location_assignment PIN_5 -to RBA[0] set_location_assignment PIN_14 -to RBA[1] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RBA set_location_assignment PIN_18 -to RA[0] set_location_assignment PIN_20 -to RA[1] set_location_assignment PIN_30 -to RA[2] set_location_assignment PIN_27 -to RA[3] set_location_assignment PIN_26 -to RA[4] set_location_assignment PIN_29 -to RA[5] set_location_assignment PIN_21 -to RA[6] set_location_assignment PIN_19 -to RA[7] set_location_assignment PIN_17 -to RA[8] set_location_assignment PIN_15 -to RA[9] set_location_assignment PIN_16 -to RA[10] set_location_assignment PIN_7 -to RA[11] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RA set_location_assignment PIN_2 -to RDQMH set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQMH set_location_assignment PIN_98 -to RDQML set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RDQML set_location_assignment PIN_96 -to RD[0] set_location_assignment PIN_90 -to RD[1] set_location_assignment PIN_89 -to RD[2] set_location_assignment PIN_99 -to RD[3] set_location_assignment PIN_92 -to RD[4] set_location_assignment PIN_91 -to RD[5] set_location_assignment PIN_95 -to RD[6] set_location_assignment PIN_97 -to RD[7] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to RD set_global_assignment -name MIF_FILE RAM4GS.mif set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCRAS set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to nCCAS set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to nFWE set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to MAin set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to CROW set_instance_assignment -name PAD_TO_CORE_DELAY 1 -to Din set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to Dout set_instance_assignment -name SLOW_SLEW_RATE OFF -to Dout set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RCKE set_instance_assignment -name SLOW_SLEW_RATE OFF -to RCKE set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RCKE set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCS set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRCS set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCS set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRWE set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRWE set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRWE set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRRAS set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRRAS set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRRAS set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to nRCAS set_instance_assignment -name SLOW_SLEW_RATE OFF -to nRCAS set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to nRCAS set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to RBA set_instance_assignment -name SLOW_SLEW_RATE OFF -to RBA set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to RBA set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RA set_instance_assignment -name SLOW_SLEW_RATE OFF -to RA set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RDQMH set_instance_assignment -name SLOW_SLEW_RATE OFF -to RDQMH set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RDQML set_instance_assignment -name SLOW_SLEW_RATE OFF -to RDQML set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to RD set_instance_assignment -name SLOW_SLEW_RATE ON -to RD set_instance_assignment -name PAD_TO_CORE_DELAY 0 -to RD set_global_assignment -name QIP_FILE UFM.qip