RAM2GS/CPLD/LCMXO2-640HC/RAM2GS_LCMXO2_640HC.ldf
2023-08-15 05:05:47 -04:00

18 lines
826 B
XML

<?xml version="1.0" encoding="UTF-8"?>
<BaliProject version="3.2" title="RAM2GS_LCMXO2_640HC" device="LCMXO2-640HC-4TG100C" default_implementation="impl1">
<Options/>
<Implementation title="impl1" dir="impl1" description="impl1" synthesis="lse" default_strategy="Strategy1">
<Options def_top="RAM2GS"/>
<Source name="../RAM2GS-SPI.v" type="Verilog" type_short="Verilog">
<Options top_module="RAM2GS"/>
</Source>
<Source name="impl1/impl1.xcf" type="Programming Project File" type_short="Programming">
<Options/>
</Source>
<Source name="RAM2GS_LCMXO2_640HC.lpf" type="Logic Preference" type_short="LPF">
<Options/>
</Source>
</Implementation>
<Strategy name="Strategy1" file="RAM2GS_LCMXO2_640HC1.sty"/>
</BaliProject>