mirror of
https://github.com/garrettsworkshop/RAM2GS.git
synced 2024-11-26 23:52:19 +00:00
65 lines
2.7 KiB
Plaintext
65 lines
2.7 KiB
Plaintext
#Build: Synplify Pro (R) R-2021.03L-SP1, Build 093R, Aug 10 2021
|
|
#install: C:\lscc\diamond\3.12\synpbase
|
|
#OS: Windows 8 6.2
|
|
#Hostname: ZANEPC
|
|
|
|
# Tue Aug 15 21:52:16 2023
|
|
|
|
#Implementation: impl1
|
|
|
|
|
|
Copyright (C) 1994-2021 Synopsys, Inc.
|
|
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
|
|
and may only be used pursuant to the terms and conditions of a written license agreement
|
|
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
|
|
Synopsys software or the associated documentation is strictly prohibited.
|
|
Tool: Synplify Pro (R)
|
|
Build: R-2021.03L-SP1
|
|
Install: C:\lscc\diamond\3.12\synpbase
|
|
OS: Windows 6.2
|
|
|
|
Hostname: ZANEPC
|
|
|
|
Implementation : impl1
|
|
Synopsys HDL Compiler, Version comp202103synp2, Build 093R, Built Aug 10 2021 09:15:36, @
|
|
|
|
@N|Running in 64-bit mode
|
|
###########################################################[
|
|
|
|
Copyright (C) 1994-2021 Synopsys, Inc.
|
|
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
|
|
and may only be used pursuant to the terms and conditions of a written license agreement
|
|
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
|
|
Synopsys software or the associated documentation is strictly prohibited.
|
|
Tool: Synplify Pro (R)
|
|
Build: R-2021.03L-SP1
|
|
Install: C:\lscc\diamond\3.12\synpbase
|
|
OS: Windows 6.2
|
|
|
|
Hostname: ZANEPC
|
|
|
|
Implementation : impl1
|
|
Synopsys Verilog Compiler, Version comp202103synp2, Build 093R, Built Aug 10 2021 09:15:36, @
|
|
|
|
@N|Running in 64-bit mode
|
|
@I::"C:\lscc\diamond\3.12\synpbase\lib\lucent\machxo.v" (library work)
|
|
@I::"C:\lscc\diamond\3.12\synpbase\lib\lucent\pmi_def.v" (library work)
|
|
@I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__)
|
|
@I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\umr_capim.v" (library snps_haps)
|
|
@I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\scemi_objects.v" (library snps_haps)
|
|
@I::"C:\lscc\diamond\3.12\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps)
|
|
@I::"D:\OneDrive\Documents\GitHub\RAM2GS\CPLD\RAM2GS-SPI.v" (library work)
|
|
@E: CG419 :"D:\OneDrive\Documents\GitHub\RAM2GS\CPLD\RAM2GS-SPI.v":60:16:60:16|Port assignments allowed for only variable types.
|
|
@E: CG342 :"D:\OneDrive\Documents\GitHub\RAM2GS\CPLD\RAM2GS-SPI.v":292:4:292:12|Expecting target variable, found CmdEnable -- possible misspelling
|
|
@E: CS187 :"D:\OneDrive\Documents\GitHub\RAM2GS\CPLD\RAM2GS-SPI.v":411:0:411:8|Expecting endmodule
|
|
3 syntax errors
|
|
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
|
# Tue Aug 15 21:52:17 2023
|
|
|
|
###########################################################]
|
|
@END
|
|
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
|
# Tue Aug 15 21:52:17 2023
|
|
|
|
###########################################################]
|