RAM2GS/CPLD/LCMXO2-640HC/REFB.lpc

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[Device]
Family=machxo2
PartType=LCMXO2-640HC
PartName=LCMXO2-640HC-4TG100C
SpeedGrade=4
Package=TQFP100
OperatingCondition=COM
Status=S
[IP]
VendorName=Lattice Semiconductor Corporation
CoreType=LPM
CoreStatus=Demo
CoreName=EFB
CoreRevision=1.2
ModuleName=REFB
SourceFormat=Verilog HDL
ParameterFileVersion=1.0
Date=08/16/2023
Time=20:52:02
[Parameters]
Verilog=1
VHDL=0
EDIF=1
Destination=Synplicity
Expression=BusA(0 to 7)
Order=Big Endian [MSB:LSB]
IO=0
freq=
i2c1=0
i2c1config=0
i2c1_addr=7-Bit Addressing
i2c1_ce=0
i2c1_freq=100
i2c1_sa=10000
i2c1_we=0
i2c2=0
i2c2_addr=7-Bit Addressing
i2c2_ce=0
i2c2_freq=100
i2c2_sa=10000
i2c2_we=0
ufm_addr=7-Bit Addressing
ufm_sa=10000
pll=0
pll_cnt=1
spi=0
spi_clkinv=0
spi_cs=1
spi_en=0
spi_freq=1
spi_lsb=0
spi_mode=Slave
spi_ib=0
spi_ph=0
spi_hs=0
spi_rxo=0
spi_rxr=0
spi_txo=0
spi_txr=0
spi_we=0
static_tc=Static
tc=0
tc_clkinv=Positive
tc_ctr=1
tc_div=1
tc_ipcap=0
tc_mode=CTCM
tc_ocr=32767
tc_oflow=1
tc_o=TOGGLE
tc_opcomp=0
tc_osc=0
tc_sa_oflow=0
tc_top=65535
ufm=1
ufm0=0
ufm1=0
ufm2=0
ufm3=0
ufm_cfg0=0
ufm_cfg1=0
wb_clk_freq=62.5
ufm_usage=SHARED_EBR_TAG
ufm_ebr=190
ufm_remain=
mem_size=1
ufm_start=
ufm_init=0
memfile=
ufm_dt=hex
ufm0_ebr=
mem_size0=1
ufm0_init=0
memfile0=
ufm0_dt=hex
ufm1_ebr=
mem_size1=1
ufm1_init=0
memfile1=
ufm1_dt=hex
ufm2_ebr=
mem_size2=1
ufm2_init=0
memfile2=
ufm2_dt=hex
ufm3_ebr=
mem_size3=1
ufm3_init=0
memfile3=
ufm3_dt=hex
ufm_cfg0_ebr=
mem_size_cfg0=1
ufm_cfg0_init=0
memfile_cfg0=
ufm_cfg0_dt=hex
ufm_cfg1_ebr=
mem_size_cfg1=1
ufm_cfg1_init=0
memfile_cfg1=
ufm_cfg1_dt=hex
wb=1
boot_option=Internal
efb_ufm=0
boot_option_internal=Single Boot
internal_ufm0=0
internal_ufm1=0
efb_ufm_boot=
tamperdr=0
t_pwd=0
t_lockflash=0
t_manmode=0
t_jtagport=0
t_sspiport=0
t_sic2port=0
t_wbport=0
t_portlock=0
[Command]
cmd_line= -w -n REFB -lang verilog -synth synplify -bus_exp 7 -bb -type efb -arch xo2c00 -freq 62.5 -ufm -ufm_ebr 190 -mem_size 1 -ufm_0 -wb -dev 640