145 lines
3.9 KiB
Plaintext
145 lines
3.9 KiB
Plaintext
[ START MERGED ]
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RASr2_i RASr2
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XOR8MEG.CN PHI2_c
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XOR8MEG_3_u_0_am XOR8MEG
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nCRAS_c_i nCRAS_c
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[ END MERGED ]
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[ START CLIPPED ]
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GND
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ufmefb/VCC
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ufmefb/GND
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FS_s_0_S1[17]
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FS_s_0_COUT[17]
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ufmefb/CFGSTDBY
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ufmefb/CFGWAKE
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ufmefb/wbc_ufm_irq
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ufmefb/TCOC
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ufmefb/TCINT
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ufmefb/SPIIRQO
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ufmefb/SPICSNEN
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ufmefb/SPIMCSN7
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ufmefb/SPIMCSN6
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ufmefb/SPIMCSN5
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ufmefb/SPIMCSN4
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ufmefb/SPIMCSN3
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ufmefb/SPIMCSN2
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ufmefb/SPIMCSN1
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ufmefb/SPIMCSN0
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ufmefb/SPIMOSIEN
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ufmefb/SPIMOSIO
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ufmefb/SPIMISOEN
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ufmefb/SPIMISOO
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ufmefb/SPISCKEN
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ufmefb/SPISCKO
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ufmefb/I2C2IRQO
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ufmefb/I2C1IRQO
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ufmefb/I2C2SDAOEN
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ufmefb/I2C2SDAO
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ufmefb/I2C2SCLOEN
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ufmefb/I2C2SCLO
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ufmefb/I2C1SDAOEN
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ufmefb/I2C1SDAO
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ufmefb/I2C1SCLOEN
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ufmefb/I2C1SCLO
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ufmefb/PLLDATO0
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ufmefb/PLLDATO1
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ufmefb/PLLDATO2
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ufmefb/PLLDATO3
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ufmefb/PLLDATO4
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ufmefb/PLLDATO5
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ufmefb/PLLDATO6
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ufmefb/PLLDATO7
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ufmefb/PLLADRO0
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ufmefb/PLLADRO1
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ufmefb/PLLADRO2
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ufmefb/PLLADRO3
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ufmefb/PLLADRO4
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ufmefb/PLLWEO
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ufmefb/PLL1STBO
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ufmefb/PLL0STBO
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ufmefb/PLLRSTO
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ufmefb/PLLCLKO
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ufmefb/wb_dat_o_1[2]
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ufmefb/wb_dat_o_1[3]
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ufmefb/wb_dat_o_1[4]
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ufmefb/wb_dat_o_1[5]
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ufmefb/wb_dat_o_1[6]
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ufmefb/wb_dat_o_1[7]
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FS_cry_0_S0[0]
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N_1
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[ END CLIPPED ]
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[ START DESIGN PREFS ]
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SCHEMATIC START ;
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# map: version Diamond (64-bit) 3.12.1.454 -- WARNING: Map write only section -- Sat Aug 19 21:54:57 2023
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SYSCONFIG SDM_PORT=DISABLE SLAVE_SPI_PORT=DISABLE I2C_PORT=DISABLE MASTER_SPI_PORT=DISABLE COMPRESS_CONFIG=ON CONFIGURATION=CFG MY_ASSP=OFF ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF MCCLK_FREQ=2.08 JTAG_PORT=ENABLE ENABLE_TRANSFR=DISABLE SHAREDEBRINIT=DISABLE MUX_CONFIGURATION_PORTS=DISABLE BACKGROUND_RECONFIG=OFF INBUF=ON ;
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LOCATE COMP "RD[0]" SITE "36" ;
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LOCATE COMP "Dout[0]" SITE "76" ;
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LOCATE COMP "PHI2" SITE "8" ;
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LOCATE COMP "RDQML" SITE "48" ;
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LOCATE COMP "RDQMH" SITE "51" ;
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LOCATE COMP "nRCAS" SITE "52" ;
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LOCATE COMP "nRRAS" SITE "54" ;
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LOCATE COMP "nRWE" SITE "49" ;
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LOCATE COMP "RCKE" SITE "53" ;
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LOCATE COMP "RCLK" SITE "62" ;
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LOCATE COMP "nRCS" SITE "57" ;
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LOCATE COMP "RD[7]" SITE "43" ;
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LOCATE COMP "RD[6]" SITE "42" ;
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LOCATE COMP "RD[5]" SITE "41" ;
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LOCATE COMP "RD[4]" SITE "40" ;
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LOCATE COMP "RD[3]" SITE "39" ;
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LOCATE COMP "RD[2]" SITE "38" ;
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LOCATE COMP "RD[1]" SITE "37" ;
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LOCATE COMP "RA[11]" SITE "59" ;
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LOCATE COMP "RA[10]" SITE "64" ;
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LOCATE COMP "RA[9]" SITE "63" ;
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LOCATE COMP "RA[8]" SITE "65" ;
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LOCATE COMP "RA[7]" SITE "75" ;
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LOCATE COMP "RA[6]" SITE "68" ;
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LOCATE COMP "RA[5]" SITE "70" ;
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LOCATE COMP "RA[4]" SITE "74" ;
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LOCATE COMP "RA[3]" SITE "71" ;
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LOCATE COMP "RA[2]" SITE "69" ;
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LOCATE COMP "RA[1]" SITE "67" ;
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LOCATE COMP "RA[0]" SITE "66" ;
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LOCATE COMP "RBA[1]" SITE "60" ;
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LOCATE COMP "RBA[0]" SITE "58" ;
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LOCATE COMP "LED" SITE "34" ;
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LOCATE COMP "nFWE" SITE "15" ;
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LOCATE COMP "nCRAS" SITE "17" ;
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LOCATE COMP "nCCAS" SITE "9" ;
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LOCATE COMP "Dout[7]" SITE "82" ;
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LOCATE COMP "Dout[6]" SITE "78" ;
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LOCATE COMP "Dout[5]" SITE "84" ;
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LOCATE COMP "Dout[4]" SITE "83" ;
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LOCATE COMP "Dout[3]" SITE "85" ;
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LOCATE COMP "Dout[2]" SITE "87" ;
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LOCATE COMP "Dout[1]" SITE "86" ;
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LOCATE COMP "Din[7]" SITE "1" ;
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LOCATE COMP "Din[6]" SITE "2" ;
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LOCATE COMP "Din[5]" SITE "98" ;
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LOCATE COMP "Din[4]" SITE "99" ;
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LOCATE COMP "Din[3]" SITE "97" ;
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LOCATE COMP "Din[2]" SITE "88" ;
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LOCATE COMP "Din[1]" SITE "96" ;
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LOCATE COMP "Din[0]" SITE "3" ;
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LOCATE COMP "CROW[1]" SITE "16" ;
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LOCATE COMP "CROW[0]" SITE "10" ;
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LOCATE COMP "MAin[9]" SITE "32" ;
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LOCATE COMP "MAin[8]" SITE "25" ;
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LOCATE COMP "MAin[7]" SITE "18" ;
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LOCATE COMP "MAin[6]" SITE "24" ;
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LOCATE COMP "MAin[5]" SITE "19" ;
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LOCATE COMP "MAin[4]" SITE "20" ;
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LOCATE COMP "MAin[3]" SITE "21" ;
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LOCATE COMP "MAin[2]" SITE "13" ;
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LOCATE COMP "MAin[1]" SITE "12" ;
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LOCATE COMP "MAin[0]" SITE "14" ;
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FREQUENCY PORT "PHI2" 2.900000 MHz ;
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FREQUENCY PORT "nCCAS" 2.900000 MHz ;
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FREQUENCY PORT "nCRAS" 2.900000 MHz ;
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FREQUENCY PORT "RCLK" 62.500000 MHz ;
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SCHEMATIC END ;
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[ END DESIGN PREFS ]
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